1 /* 2 * i6300esb: Watchdog timer driver for Intel 6300ESB chipset 3 * 4 * (c) Copyright 2004 Google Inc. 5 * (c) Copyright 2005 David Härdeman <david@2gen.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 * 12 * based on i810-tco.c which is in turn based on softdog.c 13 * 14 * The timer is implemented in the following I/O controller hubs: 15 * (See the intel documentation on http://developer.intel.com.) 16 * 6300ESB chip : document number 300641-004 17 * 18 * 2004YYZZ Ross Biro 19 * Initial version 0.01 20 * 2004YYZZ Ross Biro 21 * Version 0.02 22 * 20050210 David Härdeman <david@2gen.com> 23 * Ported driver to kernel 2.6 24 * 20171016 Radu Rendec <rrendec@arista.com> 25 * Change driver to use the watchdog subsystem 26 * Add support for multiple 6300ESB devices 27 */ 28 29 /* 30 * Includes, defines, variables, module parameters, ... 31 */ 32 33 #include <linux/module.h> 34 #include <linux/types.h> 35 #include <linux/kernel.h> 36 #include <linux/fs.h> 37 #include <linux/mm.h> 38 #include <linux/miscdevice.h> 39 #include <linux/watchdog.h> 40 #include <linux/pci.h> 41 #include <linux/ioport.h> 42 #include <linux/uaccess.h> 43 #include <linux/io.h> 44 45 /* Module and version information */ 46 #define ESB_MODULE_NAME "i6300ESB timer" 47 48 /* PCI configuration registers */ 49 #define ESB_CONFIG_REG 0x60 /* Config register */ 50 #define ESB_LOCK_REG 0x68 /* WDT lock register */ 51 52 /* Memory mapped registers */ 53 #define ESB_TIMER1_REG(w) ((w)->base + 0x00)/* Timer1 value after each reset */ 54 #define ESB_TIMER2_REG(w) ((w)->base + 0x04)/* Timer2 value after each reset */ 55 #define ESB_GINTSR_REG(w) ((w)->base + 0x08)/* General Interrupt Status Reg */ 56 #define ESB_RELOAD_REG(w) ((w)->base + 0x0c)/* Reload register */ 57 58 /* Lock register bits */ 59 #define ESB_WDT_FUNC (0x01 << 2) /* Watchdog functionality */ 60 #define ESB_WDT_ENABLE (0x01 << 1) /* Enable WDT */ 61 #define ESB_WDT_LOCK (0x01 << 0) /* Lock (nowayout) */ 62 63 /* Config register bits */ 64 #define ESB_WDT_REBOOT (0x01 << 5) /* Enable reboot on timeout */ 65 #define ESB_WDT_FREQ (0x01 << 2) /* Decrement frequency */ 66 #define ESB_WDT_INTTYPE (0x03 << 0) /* Interrupt type on timer1 timeout */ 67 68 /* Reload register bits */ 69 #define ESB_WDT_TIMEOUT (0x01 << 9) /* Watchdog timed out */ 70 #define ESB_WDT_RELOAD (0x01 << 8) /* prevent timeout */ 71 72 /* Magic constants */ 73 #define ESB_UNLOCK1 0x80 /* Step 1 to unlock reset registers */ 74 #define ESB_UNLOCK2 0x86 /* Step 2 to unlock reset registers */ 75 76 /* module parameters */ 77 /* 30 sec default heartbeat (1 < heartbeat < 2*1023) */ 78 #define ESB_HEARTBEAT_MIN 1 79 #define ESB_HEARTBEAT_MAX 2046 80 #define ESB_HEARTBEAT_DEFAULT 30 81 #define ESB_HEARTBEAT_RANGE __MODULE_STRING(ESB_HEARTBEAT_MIN) \ 82 "<heartbeat<" __MODULE_STRING(ESB_HEARTBEAT_MAX) 83 static int heartbeat; /* in seconds */ 84 module_param(heartbeat, int, 0); 85 MODULE_PARM_DESC(heartbeat, 86 "Watchdog heartbeat in seconds. (" ESB_HEARTBEAT_RANGE 87 ", default=" __MODULE_STRING(ESB_HEARTBEAT_DEFAULT) ")"); 88 89 static bool nowayout = WATCHDOG_NOWAYOUT; 90 module_param(nowayout, bool, 0); 91 MODULE_PARM_DESC(nowayout, 92 "Watchdog cannot be stopped once started (default=" 93 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 94 95 /* internal variables */ 96 struct esb_dev { 97 struct watchdog_device wdd; 98 void __iomem *base; 99 struct pci_dev *pdev; 100 }; 101 102 #define to_esb_dev(wptr) container_of(wptr, struct esb_dev, wdd) 103 104 /* 105 * Some i6300ESB specific functions 106 */ 107 108 /* 109 * Prepare for reloading the timer by unlocking the proper registers. 110 * This is performed by first writing 0x80 followed by 0x86 to the 111 * reload register. After this the appropriate registers can be written 112 * to once before they need to be unlocked again. 113 */ 114 static inline void esb_unlock_registers(struct esb_dev *edev) 115 { 116 writew(ESB_UNLOCK1, ESB_RELOAD_REG(edev)); 117 writew(ESB_UNLOCK2, ESB_RELOAD_REG(edev)); 118 } 119 120 static int esb_timer_start(struct watchdog_device *wdd) 121 { 122 struct esb_dev *edev = to_esb_dev(wdd); 123 int _wdd_nowayout = test_bit(WDOG_NO_WAY_OUT, &wdd->status); 124 u8 val; 125 126 esb_unlock_registers(edev); 127 writew(ESB_WDT_RELOAD, ESB_RELOAD_REG(edev)); 128 /* Enable or Enable + Lock? */ 129 val = ESB_WDT_ENABLE | (_wdd_nowayout ? ESB_WDT_LOCK : 0x00); 130 pci_write_config_byte(edev->pdev, ESB_LOCK_REG, val); 131 return 0; 132 } 133 134 static int esb_timer_stop(struct watchdog_device *wdd) 135 { 136 struct esb_dev *edev = to_esb_dev(wdd); 137 u8 val; 138 139 /* First, reset timers as suggested by the docs */ 140 esb_unlock_registers(edev); 141 writew(ESB_WDT_RELOAD, ESB_RELOAD_REG(edev)); 142 /* Then disable the WDT */ 143 pci_write_config_byte(edev->pdev, ESB_LOCK_REG, 0x0); 144 pci_read_config_byte(edev->pdev, ESB_LOCK_REG, &val); 145 146 /* Returns 0 if the timer was disabled, non-zero otherwise */ 147 return val & ESB_WDT_ENABLE; 148 } 149 150 static int esb_timer_keepalive(struct watchdog_device *wdd) 151 { 152 struct esb_dev *edev = to_esb_dev(wdd); 153 154 esb_unlock_registers(edev); 155 writew(ESB_WDT_RELOAD, ESB_RELOAD_REG(edev)); 156 /* FIXME: Do we need to flush anything here? */ 157 return 0; 158 } 159 160 static int esb_timer_set_heartbeat(struct watchdog_device *wdd, 161 unsigned int time) 162 { 163 struct esb_dev *edev = to_esb_dev(wdd); 164 u32 val; 165 166 /* We shift by 9, so if we are passed a value of 1 sec, 167 * val will be 1 << 9 = 512, then write that to two 168 * timers => 2 * 512 = 1024 (which is decremented at 1KHz) 169 */ 170 val = time << 9; 171 172 /* Write timer 1 */ 173 esb_unlock_registers(edev); 174 writel(val, ESB_TIMER1_REG(edev)); 175 176 /* Write timer 2 */ 177 esb_unlock_registers(edev); 178 writel(val, ESB_TIMER2_REG(edev)); 179 180 /* Reload */ 181 esb_unlock_registers(edev); 182 writew(ESB_WDT_RELOAD, ESB_RELOAD_REG(edev)); 183 184 /* FIXME: Do we need to flush everything out? */ 185 186 /* Done */ 187 wdd->timeout = time; 188 return 0; 189 } 190 191 /* 192 * Watchdog Subsystem Interfaces 193 */ 194 195 static struct watchdog_info esb_info = { 196 .identity = ESB_MODULE_NAME, 197 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, 198 }; 199 200 static const struct watchdog_ops esb_ops = { 201 .owner = THIS_MODULE, 202 .start = esb_timer_start, 203 .stop = esb_timer_stop, 204 .set_timeout = esb_timer_set_heartbeat, 205 .ping = esb_timer_keepalive, 206 }; 207 208 /* 209 * Data for PCI driver interface 210 */ 211 static const struct pci_device_id esb_pci_tbl[] = { 212 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9), }, 213 { 0, }, /* End of list */ 214 }; 215 MODULE_DEVICE_TABLE(pci, esb_pci_tbl); 216 217 /* 218 * Init & exit routines 219 */ 220 221 static unsigned char esb_getdevice(struct esb_dev *edev) 222 { 223 if (pci_enable_device(edev->pdev)) { 224 dev_err(&edev->pdev->dev, "failed to enable device\n"); 225 goto err_devput; 226 } 227 228 if (pci_request_region(edev->pdev, 0, ESB_MODULE_NAME)) { 229 dev_err(&edev->pdev->dev, "failed to request region\n"); 230 goto err_disable; 231 } 232 233 edev->base = pci_ioremap_bar(edev->pdev, 0); 234 if (edev->base == NULL) { 235 /* Something's wrong here, BASEADDR has to be set */ 236 dev_err(&edev->pdev->dev, "failed to get BASEADDR\n"); 237 goto err_release; 238 } 239 240 /* Done */ 241 dev_set_drvdata(&edev->pdev->dev, edev); 242 return 1; 243 244 err_release: 245 pci_release_region(edev->pdev, 0); 246 err_disable: 247 pci_disable_device(edev->pdev); 248 err_devput: 249 return 0; 250 } 251 252 static void esb_initdevice(struct esb_dev *edev) 253 { 254 u8 val1; 255 u16 val2; 256 257 /* 258 * Config register: 259 * Bit 5 : 0 = Enable WDT_OUTPUT 260 * Bit 2 : 0 = set the timer frequency to the PCI clock 261 * divided by 2^15 (approx 1KHz). 262 * Bits 1:0 : 11 = WDT_INT_TYPE Disabled. 263 * The watchdog has two timers, it can be setup so that the 264 * expiry of timer1 results in an interrupt and the expiry of 265 * timer2 results in a reboot. We set it to not generate 266 * any interrupts as there is not much we can do with it 267 * right now. 268 */ 269 pci_write_config_word(edev->pdev, ESB_CONFIG_REG, 0x0003); 270 271 /* Check that the WDT isn't already locked */ 272 pci_read_config_byte(edev->pdev, ESB_LOCK_REG, &val1); 273 if (val1 & ESB_WDT_LOCK) 274 dev_warn(&edev->pdev->dev, "nowayout already set\n"); 275 276 /* Set the timer to watchdog mode and disable it for now */ 277 pci_write_config_byte(edev->pdev, ESB_LOCK_REG, 0x00); 278 279 /* Check if the watchdog was previously triggered */ 280 esb_unlock_registers(edev); 281 val2 = readw(ESB_RELOAD_REG(edev)); 282 if (val2 & ESB_WDT_TIMEOUT) 283 edev->wdd.bootstatus = WDIOF_CARDRESET; 284 285 /* Reset WDT_TIMEOUT flag and timers */ 286 esb_unlock_registers(edev); 287 writew((ESB_WDT_TIMEOUT | ESB_WDT_RELOAD), ESB_RELOAD_REG(edev)); 288 289 /* And set the correct timeout value */ 290 esb_timer_set_heartbeat(&edev->wdd, edev->wdd.timeout); 291 } 292 293 static int esb_probe(struct pci_dev *pdev, 294 const struct pci_device_id *ent) 295 { 296 struct esb_dev *edev; 297 int ret; 298 299 edev = devm_kzalloc(&pdev->dev, sizeof(*edev), GFP_KERNEL); 300 if (!edev) 301 return -ENOMEM; 302 303 /* Check whether or not the hardware watchdog is there */ 304 edev->pdev = pdev; 305 if (!esb_getdevice(edev)) 306 return -ENODEV; 307 308 /* Initialize the watchdog and make sure it does not run */ 309 edev->wdd.info = &esb_info; 310 edev->wdd.ops = &esb_ops; 311 edev->wdd.min_timeout = ESB_HEARTBEAT_MIN; 312 edev->wdd.max_timeout = ESB_HEARTBEAT_MAX; 313 edev->wdd.timeout = ESB_HEARTBEAT_DEFAULT; 314 if (watchdog_init_timeout(&edev->wdd, heartbeat, NULL)) 315 dev_info(&pdev->dev, 316 "heartbeat value must be " ESB_HEARTBEAT_RANGE 317 ", using %u\n", edev->wdd.timeout); 318 watchdog_set_nowayout(&edev->wdd, nowayout); 319 watchdog_stop_on_reboot(&edev->wdd); 320 watchdog_stop_on_unregister(&edev->wdd); 321 esb_initdevice(edev); 322 323 /* Register the watchdog so that userspace has access to it */ 324 ret = watchdog_register_device(&edev->wdd); 325 if (ret != 0) { 326 dev_err(&pdev->dev, 327 "cannot register watchdog device (err=%d)\n", ret); 328 goto err_unmap; 329 } 330 dev_info(&pdev->dev, 331 "initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n", 332 edev->base, edev->wdd.timeout, nowayout); 333 return 0; 334 335 err_unmap: 336 iounmap(edev->base); 337 pci_release_region(edev->pdev, 0); 338 pci_disable_device(edev->pdev); 339 return ret; 340 } 341 342 static void esb_remove(struct pci_dev *pdev) 343 { 344 struct esb_dev *edev = dev_get_drvdata(&pdev->dev); 345 346 watchdog_unregister_device(&edev->wdd); 347 iounmap(edev->base); 348 pci_release_region(edev->pdev, 0); 349 pci_disable_device(edev->pdev); 350 } 351 352 static struct pci_driver esb_driver = { 353 .name = ESB_MODULE_NAME, 354 .id_table = esb_pci_tbl, 355 .probe = esb_probe, 356 .remove = esb_remove, 357 }; 358 359 module_pci_driver(esb_driver); 360 361 MODULE_AUTHOR("Ross Biro and David Härdeman"); 362 MODULE_DESCRIPTION("Watchdog driver for Intel 6300ESB chipsets"); 363 MODULE_LICENSE("GPL"); 364