1 /* 2 * HPE WatchDog Driver 3 * based on 4 * 5 * SoftDog 0.05: A Software Watchdog Device 6 * 7 * (c) Copyright 2015 Hewlett Packard Enterprise Development LP 8 * Thomas Mingarelli <thomas.mingarelli@hpe.com> 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * version 2 as published by the Free Software Foundation 13 * 14 */ 15 16 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 17 18 #include <linux/device.h> 19 #include <linux/fs.h> 20 #include <linux/io.h> 21 #include <linux/bitops.h> 22 #include <linux/kernel.h> 23 #include <linux/miscdevice.h> 24 #include <linux/module.h> 25 #include <linux/moduleparam.h> 26 #include <linux/pci.h> 27 #include <linux/pci_ids.h> 28 #include <linux/types.h> 29 #include <linux/uaccess.h> 30 #include <linux/watchdog.h> 31 #ifdef CONFIG_HPWDT_NMI_DECODING 32 #include <linux/dmi.h> 33 #include <linux/spinlock.h> 34 #include <linux/nmi.h> 35 #include <linux/kdebug.h> 36 #include <linux/notifier.h> 37 #include <asm/cacheflush.h> 38 #endif /* CONFIG_HPWDT_NMI_DECODING */ 39 #include <asm/nmi.h> 40 #include <asm/frame.h> 41 42 #define HPWDT_VERSION "1.3.3" 43 #define SECS_TO_TICKS(secs) ((secs) * 1000 / 128) 44 #define TICKS_TO_SECS(ticks) ((ticks) * 128 / 1000) 45 #define HPWDT_MAX_TIMER TICKS_TO_SECS(65535) 46 #define DEFAULT_MARGIN 30 47 48 static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */ 49 static unsigned int reload; /* the computed soft_margin */ 50 static bool nowayout = WATCHDOG_NOWAYOUT; 51 static char expect_release; 52 static unsigned long hpwdt_is_open; 53 54 static void __iomem *pci_mem_addr; /* the PCI-memory address */ 55 static unsigned long __iomem *hpwdt_timer_reg; 56 static unsigned long __iomem *hpwdt_timer_con; 57 58 static const struct pci_device_id hpwdt_devices[] = { 59 { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) }, /* iLO2 */ 60 { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) }, /* iLO3 */ 61 {0}, /* terminate list */ 62 }; 63 MODULE_DEVICE_TABLE(pci, hpwdt_devices); 64 65 #ifdef CONFIG_HPWDT_NMI_DECODING 66 #define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */ 67 #define CRU_BIOS_SIGNATURE_VALUE 0x55524324 68 #define PCI_BIOS32_PARAGRAPH_LEN 16 69 #define PCI_ROM_BASE1 0x000F0000 70 #define ROM_SIZE 0x10000 71 72 struct bios32_service_dir { 73 u32 signature; 74 u32 entry_point; 75 u8 revision; 76 u8 length; 77 u8 checksum; 78 u8 reserved[5]; 79 }; 80 81 /* type 212 */ 82 struct smbios_cru64_info { 83 u8 type; 84 u8 byte_length; 85 u16 handle; 86 u32 signature; 87 u64 physical_address; 88 u32 double_length; 89 u32 double_offset; 90 }; 91 #define SMBIOS_CRU64_INFORMATION 212 92 93 /* type 219 */ 94 struct smbios_proliant_info { 95 u8 type; 96 u8 byte_length; 97 u16 handle; 98 u32 power_features; 99 u32 omega_features; 100 u32 reserved; 101 u32 misc_features; 102 }; 103 #define SMBIOS_ICRU_INFORMATION 219 104 105 106 struct cmn_registers { 107 union { 108 struct { 109 u8 ral; 110 u8 rah; 111 u16 rea2; 112 }; 113 u32 reax; 114 } u1; 115 union { 116 struct { 117 u8 rbl; 118 u8 rbh; 119 u8 reb2l; 120 u8 reb2h; 121 }; 122 u32 rebx; 123 } u2; 124 union { 125 struct { 126 u8 rcl; 127 u8 rch; 128 u16 rec2; 129 }; 130 u32 recx; 131 } u3; 132 union { 133 struct { 134 u8 rdl; 135 u8 rdh; 136 u16 red2; 137 }; 138 u32 redx; 139 } u4; 140 141 u32 resi; 142 u32 redi; 143 u16 rds; 144 u16 res; 145 u32 reflags; 146 } __attribute__((packed)); 147 148 static unsigned int hpwdt_nmi_decoding; 149 static unsigned int allow_kdump = 1; 150 static unsigned int is_icru; 151 static unsigned int is_uefi; 152 static DEFINE_SPINLOCK(rom_lock); 153 static void *cru_rom_addr; 154 static struct cmn_registers cmn_regs; 155 156 extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs, 157 unsigned long *pRomEntry); 158 159 #ifdef CONFIG_X86_32 160 /* --32 Bit Bios------------------------------------------------------------ */ 161 162 #define HPWDT_ARCH 32 163 164 asm(".text \n\t" 165 ".align 4 \n\t" 166 ".globl asminline_call \n" 167 "asminline_call: \n\t" 168 "pushl %ebp \n\t" 169 "movl %esp, %ebp \n\t" 170 "pusha \n\t" 171 "pushf \n\t" 172 "push %es \n\t" 173 "push %ds \n\t" 174 "pop %es \n\t" 175 "movl 8(%ebp),%eax \n\t" 176 "movl 4(%eax),%ebx \n\t" 177 "movl 8(%eax),%ecx \n\t" 178 "movl 12(%eax),%edx \n\t" 179 "movl 16(%eax),%esi \n\t" 180 "movl 20(%eax),%edi \n\t" 181 "movl (%eax),%eax \n\t" 182 "push %cs \n\t" 183 "call *12(%ebp) \n\t" 184 "pushf \n\t" 185 "pushl %eax \n\t" 186 "movl 8(%ebp),%eax \n\t" 187 "movl %ebx,4(%eax) \n\t" 188 "movl %ecx,8(%eax) \n\t" 189 "movl %edx,12(%eax) \n\t" 190 "movl %esi,16(%eax) \n\t" 191 "movl %edi,20(%eax) \n\t" 192 "movw %ds,24(%eax) \n\t" 193 "movw %es,26(%eax) \n\t" 194 "popl %ebx \n\t" 195 "movl %ebx,(%eax) \n\t" 196 "popl %ebx \n\t" 197 "movl %ebx,28(%eax) \n\t" 198 "pop %es \n\t" 199 "popf \n\t" 200 "popa \n\t" 201 "leave \n\t" 202 "ret \n\t" 203 ".previous"); 204 205 206 /* 207 * cru_detect 208 * 209 * Routine Description: 210 * This function uses the 32-bit BIOS Service Directory record to 211 * search for a $CRU record. 212 * 213 * Return Value: 214 * 0 : SUCCESS 215 * <0 : FAILURE 216 */ 217 static int cru_detect(unsigned long map_entry, 218 unsigned long map_offset) 219 { 220 void *bios32_map; 221 unsigned long *bios32_entrypoint; 222 unsigned long cru_physical_address; 223 unsigned long cru_length; 224 unsigned long physical_bios_base = 0; 225 unsigned long physical_bios_offset = 0; 226 int retval = -ENODEV; 227 228 bios32_map = ioremap(map_entry, (2 * PAGE_SIZE)); 229 230 if (bios32_map == NULL) 231 return -ENODEV; 232 233 bios32_entrypoint = bios32_map + map_offset; 234 235 cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE; 236 237 set_memory_x((unsigned long)bios32_map, 2); 238 asminline_call(&cmn_regs, bios32_entrypoint); 239 240 if (cmn_regs.u1.ral != 0) { 241 pr_warn("Call succeeded but with an error: 0x%x\n", 242 cmn_regs.u1.ral); 243 } else { 244 physical_bios_base = cmn_regs.u2.rebx; 245 physical_bios_offset = cmn_regs.u4.redx; 246 cru_length = cmn_regs.u3.recx; 247 cru_physical_address = 248 physical_bios_base + physical_bios_offset; 249 250 /* If the values look OK, then map it in. */ 251 if ((physical_bios_base + physical_bios_offset)) { 252 cru_rom_addr = 253 ioremap(cru_physical_address, cru_length); 254 if (cru_rom_addr) { 255 set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK, 256 (cru_length + PAGE_SIZE - 1) >> PAGE_SHIFT); 257 retval = 0; 258 } 259 } 260 261 pr_debug("CRU Base Address: 0x%lx\n", physical_bios_base); 262 pr_debug("CRU Offset Address: 0x%lx\n", physical_bios_offset); 263 pr_debug("CRU Length: 0x%lx\n", cru_length); 264 pr_debug("CRU Mapped Address: %p\n", &cru_rom_addr); 265 } 266 iounmap(bios32_map); 267 return retval; 268 } 269 270 /* 271 * bios_checksum 272 */ 273 static int bios_checksum(const char __iomem *ptr, int len) 274 { 275 char sum = 0; 276 int i; 277 278 /* 279 * calculate checksum of size bytes. This should add up 280 * to zero if we have a valid header. 281 */ 282 for (i = 0; i < len; i++) 283 sum += ptr[i]; 284 285 return ((sum == 0) && (len > 0)); 286 } 287 288 /* 289 * bios32_present 290 * 291 * Routine Description: 292 * This function finds the 32-bit BIOS Service Directory 293 * 294 * Return Value: 295 * 0 : SUCCESS 296 * <0 : FAILURE 297 */ 298 static int bios32_present(const char __iomem *p) 299 { 300 struct bios32_service_dir *bios_32_ptr; 301 int length; 302 unsigned long map_entry, map_offset; 303 304 bios_32_ptr = (struct bios32_service_dir *) p; 305 306 /* 307 * Search for signature by checking equal to the swizzled value 308 * instead of calling another routine to perform a strcmp. 309 */ 310 if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) { 311 length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN; 312 if (bios_checksum(p, length)) { 313 /* 314 * According to the spec, we're looking for the 315 * first 4KB-aligned address below the entrypoint 316 * listed in the header. The Service Directory code 317 * is guaranteed to occupy no more than 2 4KB pages. 318 */ 319 map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1); 320 map_offset = bios_32_ptr->entry_point - map_entry; 321 322 return cru_detect(map_entry, map_offset); 323 } 324 } 325 return -ENODEV; 326 } 327 328 static int detect_cru_service(void) 329 { 330 char __iomem *p, *q; 331 int rc = -1; 332 333 /* 334 * Search from 0x0f0000 through 0x0fffff, inclusive. 335 */ 336 p = ioremap(PCI_ROM_BASE1, ROM_SIZE); 337 if (p == NULL) 338 return -ENOMEM; 339 340 for (q = p; q < p + ROM_SIZE; q += 16) { 341 rc = bios32_present(q); 342 if (!rc) 343 break; 344 } 345 iounmap(p); 346 return rc; 347 } 348 /* ------------------------------------------------------------------------- */ 349 #endif /* CONFIG_X86_32 */ 350 #ifdef CONFIG_X86_64 351 /* --64 Bit Bios------------------------------------------------------------ */ 352 353 #define HPWDT_ARCH 64 354 355 asm(".text \n\t" 356 ".align 4 \n\t" 357 ".globl asminline_call \n\t" 358 ".type asminline_call, @function \n\t" 359 "asminline_call: \n\t" 360 FRAME_BEGIN 361 "pushq %rax \n\t" 362 "pushq %rbx \n\t" 363 "pushq %rdx \n\t" 364 "pushq %r12 \n\t" 365 "pushq %r9 \n\t" 366 "movq %rsi, %r12 \n\t" 367 "movq %rdi, %r9 \n\t" 368 "movl 4(%r9),%ebx \n\t" 369 "movl 8(%r9),%ecx \n\t" 370 "movl 12(%r9),%edx \n\t" 371 "movl 16(%r9),%esi \n\t" 372 "movl 20(%r9),%edi \n\t" 373 "movl (%r9),%eax \n\t" 374 "call *%r12 \n\t" 375 "pushfq \n\t" 376 "popq %r12 \n\t" 377 "movl %eax, (%r9) \n\t" 378 "movl %ebx, 4(%r9) \n\t" 379 "movl %ecx, 8(%r9) \n\t" 380 "movl %edx, 12(%r9) \n\t" 381 "movl %esi, 16(%r9) \n\t" 382 "movl %edi, 20(%r9) \n\t" 383 "movq %r12, %rax \n\t" 384 "movl %eax, 28(%r9) \n\t" 385 "popq %r9 \n\t" 386 "popq %r12 \n\t" 387 "popq %rdx \n\t" 388 "popq %rbx \n\t" 389 "popq %rax \n\t" 390 FRAME_END 391 "ret \n\t" 392 ".previous"); 393 394 /* 395 * dmi_find_cru 396 * 397 * Routine Description: 398 * This function checks whether or not a SMBIOS/DMI record is 399 * the 64bit CRU info or not 400 */ 401 static void dmi_find_cru(const struct dmi_header *dm, void *dummy) 402 { 403 struct smbios_cru64_info *smbios_cru64_ptr; 404 unsigned long cru_physical_address; 405 406 if (dm->type == SMBIOS_CRU64_INFORMATION) { 407 smbios_cru64_ptr = (struct smbios_cru64_info *) dm; 408 if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) { 409 cru_physical_address = 410 smbios_cru64_ptr->physical_address + 411 smbios_cru64_ptr->double_offset; 412 cru_rom_addr = ioremap(cru_physical_address, 413 smbios_cru64_ptr->double_length); 414 set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK, 415 smbios_cru64_ptr->double_length >> PAGE_SHIFT); 416 } 417 } 418 } 419 420 static int detect_cru_service(void) 421 { 422 cru_rom_addr = NULL; 423 424 dmi_walk(dmi_find_cru, NULL); 425 426 /* if cru_rom_addr has been set then we found a CRU service */ 427 return ((cru_rom_addr != NULL) ? 0 : -ENODEV); 428 } 429 /* ------------------------------------------------------------------------- */ 430 #endif /* CONFIG_X86_64 */ 431 #endif /* CONFIG_HPWDT_NMI_DECODING */ 432 433 /* 434 * Watchdog operations 435 */ 436 static void hpwdt_start(void) 437 { 438 reload = SECS_TO_TICKS(soft_margin); 439 iowrite16(reload, hpwdt_timer_reg); 440 iowrite8(0x85, hpwdt_timer_con); 441 } 442 443 static void hpwdt_stop(void) 444 { 445 unsigned long data; 446 447 data = ioread8(hpwdt_timer_con); 448 data &= 0xFE; 449 iowrite8(data, hpwdt_timer_con); 450 } 451 452 static void hpwdt_ping(void) 453 { 454 iowrite16(reload, hpwdt_timer_reg); 455 } 456 457 static int hpwdt_change_timer(int new_margin) 458 { 459 if (new_margin < 1 || new_margin > HPWDT_MAX_TIMER) { 460 pr_warn("New value passed in is invalid: %d seconds\n", 461 new_margin); 462 return -EINVAL; 463 } 464 465 soft_margin = new_margin; 466 pr_debug("New timer passed in is %d seconds\n", new_margin); 467 reload = SECS_TO_TICKS(soft_margin); 468 469 return 0; 470 } 471 472 static int hpwdt_time_left(void) 473 { 474 return TICKS_TO_SECS(ioread16(hpwdt_timer_reg)); 475 } 476 477 #ifdef CONFIG_HPWDT_NMI_DECODING 478 /* 479 * NMI Handler 480 */ 481 static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs) 482 { 483 unsigned long rom_pl; 484 static int die_nmi_called; 485 486 if (!hpwdt_nmi_decoding) 487 return NMI_DONE; 488 489 spin_lock_irqsave(&rom_lock, rom_pl); 490 if (!die_nmi_called && !is_icru && !is_uefi) 491 asminline_call(&cmn_regs, cru_rom_addr); 492 die_nmi_called = 1; 493 spin_unlock_irqrestore(&rom_lock, rom_pl); 494 495 if (allow_kdump) 496 hpwdt_stop(); 497 498 if (!is_icru && !is_uefi) { 499 if (cmn_regs.u1.ral == 0) { 500 nmi_panic(regs, "An NMI occurred, but unable to determine source.\n"); 501 return NMI_HANDLED; 502 } 503 } 504 nmi_panic(regs, "An NMI occurred. Depending on your system the reason " 505 "for the NMI is logged in any one of the following " 506 "resources:\n" 507 "1. Integrated Management Log (IML)\n" 508 "2. OA Syslog\n" 509 "3. OA Forward Progress Log\n" 510 "4. iLO Event Log"); 511 512 return NMI_HANDLED; 513 } 514 #endif /* CONFIG_HPWDT_NMI_DECODING */ 515 516 /* 517 * /dev/watchdog handling 518 */ 519 static int hpwdt_open(struct inode *inode, struct file *file) 520 { 521 /* /dev/watchdog can only be opened once */ 522 if (test_and_set_bit(0, &hpwdt_is_open)) 523 return -EBUSY; 524 525 /* Start the watchdog */ 526 hpwdt_start(); 527 hpwdt_ping(); 528 529 return nonseekable_open(inode, file); 530 } 531 532 static int hpwdt_release(struct inode *inode, struct file *file) 533 { 534 /* Stop the watchdog */ 535 if (expect_release == 42) { 536 hpwdt_stop(); 537 } else { 538 pr_crit("Unexpected close, not stopping watchdog!\n"); 539 hpwdt_ping(); 540 } 541 542 expect_release = 0; 543 544 /* /dev/watchdog is being closed, make sure it can be re-opened */ 545 clear_bit(0, &hpwdt_is_open); 546 547 return 0; 548 } 549 550 static ssize_t hpwdt_write(struct file *file, const char __user *data, 551 size_t len, loff_t *ppos) 552 { 553 /* See if we got the magic character 'V' and reload the timer */ 554 if (len) { 555 if (!nowayout) { 556 size_t i; 557 558 /* note: just in case someone wrote the magic character 559 * five months ago... */ 560 expect_release = 0; 561 562 /* scan to see whether or not we got the magic char. */ 563 for (i = 0; i != len; i++) { 564 char c; 565 if (get_user(c, data + i)) 566 return -EFAULT; 567 if (c == 'V') 568 expect_release = 42; 569 } 570 } 571 572 /* someone wrote to us, we should reload the timer */ 573 hpwdt_ping(); 574 } 575 576 return len; 577 } 578 579 static const struct watchdog_info ident = { 580 .options = WDIOF_SETTIMEOUT | 581 WDIOF_KEEPALIVEPING | 582 WDIOF_MAGICCLOSE, 583 .identity = "HPE iLO2+ HW Watchdog Timer", 584 }; 585 586 static long hpwdt_ioctl(struct file *file, unsigned int cmd, 587 unsigned long arg) 588 { 589 void __user *argp = (void __user *)arg; 590 int __user *p = argp; 591 int new_margin, options; 592 int ret = -ENOTTY; 593 594 switch (cmd) { 595 case WDIOC_GETSUPPORT: 596 ret = 0; 597 if (copy_to_user(argp, &ident, sizeof(ident))) 598 ret = -EFAULT; 599 break; 600 601 case WDIOC_GETSTATUS: 602 case WDIOC_GETBOOTSTATUS: 603 ret = put_user(0, p); 604 break; 605 606 case WDIOC_KEEPALIVE: 607 hpwdt_ping(); 608 ret = 0; 609 break; 610 611 case WDIOC_SETOPTIONS: 612 ret = get_user(options, p); 613 if (ret) 614 break; 615 616 if (options & WDIOS_DISABLECARD) 617 hpwdt_stop(); 618 619 if (options & WDIOS_ENABLECARD) { 620 hpwdt_start(); 621 hpwdt_ping(); 622 } 623 break; 624 625 case WDIOC_SETTIMEOUT: 626 ret = get_user(new_margin, p); 627 if (ret) 628 break; 629 630 ret = hpwdt_change_timer(new_margin); 631 if (ret) 632 break; 633 634 hpwdt_ping(); 635 /* Fall */ 636 case WDIOC_GETTIMEOUT: 637 ret = put_user(soft_margin, p); 638 break; 639 640 case WDIOC_GETTIMELEFT: 641 ret = put_user(hpwdt_time_left(), p); 642 break; 643 } 644 return ret; 645 } 646 647 /* 648 * Kernel interfaces 649 */ 650 static const struct file_operations hpwdt_fops = { 651 .owner = THIS_MODULE, 652 .llseek = no_llseek, 653 .write = hpwdt_write, 654 .unlocked_ioctl = hpwdt_ioctl, 655 .open = hpwdt_open, 656 .release = hpwdt_release, 657 }; 658 659 static struct miscdevice hpwdt_miscdev = { 660 .minor = WATCHDOG_MINOR, 661 .name = "watchdog", 662 .fops = &hpwdt_fops, 663 }; 664 665 /* 666 * Init & Exit 667 */ 668 669 #ifdef CONFIG_HPWDT_NMI_DECODING 670 #ifdef CONFIG_X86_LOCAL_APIC 671 static void hpwdt_check_nmi_decoding(struct pci_dev *dev) 672 { 673 /* 674 * If nmi_watchdog is turned off then we can turn on 675 * our nmi decoding capability. 676 */ 677 hpwdt_nmi_decoding = 1; 678 } 679 #else 680 static void hpwdt_check_nmi_decoding(struct pci_dev *dev) 681 { 682 dev_warn(&dev->dev, "NMI decoding is disabled. " 683 "Your kernel does not support a NMI Watchdog.\n"); 684 } 685 #endif /* CONFIG_X86_LOCAL_APIC */ 686 687 /* 688 * dmi_find_icru 689 * 690 * Routine Description: 691 * This function checks whether or not we are on an iCRU-based server. 692 * This check is independent of architecture and needs to be made for 693 * any ProLiant system. 694 */ 695 static void dmi_find_icru(const struct dmi_header *dm, void *dummy) 696 { 697 struct smbios_proliant_info *smbios_proliant_ptr; 698 699 if (dm->type == SMBIOS_ICRU_INFORMATION) { 700 smbios_proliant_ptr = (struct smbios_proliant_info *) dm; 701 if (smbios_proliant_ptr->misc_features & 0x01) 702 is_icru = 1; 703 if (smbios_proliant_ptr->misc_features & 0x408) 704 is_uefi = 1; 705 } 706 } 707 708 static int hpwdt_init_nmi_decoding(struct pci_dev *dev) 709 { 710 int retval; 711 712 /* 713 * On typical CRU-based systems we need to map that service in 714 * the BIOS. For 32 bit Operating Systems we need to go through 715 * the 32 Bit BIOS Service Directory. For 64 bit Operating 716 * Systems we get that service through SMBIOS. 717 * 718 * On systems that support the new iCRU service all we need to 719 * do is call dmi_walk to get the supported flag value and skip 720 * the old cru detect code. 721 */ 722 dmi_walk(dmi_find_icru, NULL); 723 if (!is_icru && !is_uefi) { 724 725 /* 726 * We need to map the ROM to get the CRU service. 727 * For 32 bit Operating Systems we need to go through the 32 Bit 728 * BIOS Service Directory 729 * For 64 bit Operating Systems we get that service through SMBIOS. 730 */ 731 retval = detect_cru_service(); 732 if (retval < 0) { 733 dev_warn(&dev->dev, 734 "Unable to detect the %d Bit CRU Service.\n", 735 HPWDT_ARCH); 736 return retval; 737 } 738 739 /* 740 * We know this is the only CRU call we need to make so lets keep as 741 * few instructions as possible once the NMI comes in. 742 */ 743 cmn_regs.u1.rah = 0x0D; 744 cmn_regs.u1.ral = 0x02; 745 } 746 747 /* 748 * Only one function can register for NMI_UNKNOWN 749 */ 750 retval = register_nmi_handler(NMI_UNKNOWN, hpwdt_pretimeout, 0, "hpwdt"); 751 if (retval) 752 goto error; 753 retval = register_nmi_handler(NMI_SERR, hpwdt_pretimeout, 0, "hpwdt"); 754 if (retval) 755 goto error1; 756 retval = register_nmi_handler(NMI_IO_CHECK, hpwdt_pretimeout, 0, "hpwdt"); 757 if (retval) 758 goto error2; 759 760 dev_info(&dev->dev, 761 "HPE Watchdog Timer Driver: NMI decoding initialized" 762 ", allow kernel dump: %s (default = 1/ON)\n", 763 (allow_kdump == 0) ? "OFF" : "ON"); 764 return 0; 765 766 error2: 767 unregister_nmi_handler(NMI_SERR, "hpwdt"); 768 error1: 769 unregister_nmi_handler(NMI_UNKNOWN, "hpwdt"); 770 error: 771 dev_warn(&dev->dev, 772 "Unable to register a die notifier (err=%d).\n", 773 retval); 774 if (cru_rom_addr) 775 iounmap(cru_rom_addr); 776 return retval; 777 } 778 779 static void hpwdt_exit_nmi_decoding(void) 780 { 781 unregister_nmi_handler(NMI_UNKNOWN, "hpwdt"); 782 unregister_nmi_handler(NMI_SERR, "hpwdt"); 783 unregister_nmi_handler(NMI_IO_CHECK, "hpwdt"); 784 if (cru_rom_addr) 785 iounmap(cru_rom_addr); 786 } 787 #else /* !CONFIG_HPWDT_NMI_DECODING */ 788 static void hpwdt_check_nmi_decoding(struct pci_dev *dev) 789 { 790 } 791 792 static int hpwdt_init_nmi_decoding(struct pci_dev *dev) 793 { 794 return 0; 795 } 796 797 static void hpwdt_exit_nmi_decoding(void) 798 { 799 } 800 #endif /* CONFIG_HPWDT_NMI_DECODING */ 801 802 static int hpwdt_init_one(struct pci_dev *dev, 803 const struct pci_device_id *ent) 804 { 805 int retval; 806 807 /* 808 * Check if we can do NMI decoding or not 809 */ 810 hpwdt_check_nmi_decoding(dev); 811 812 /* 813 * First let's find out if we are on an iLO2+ server. We will 814 * not run on a legacy ASM box. 815 * So we only support the G5 ProLiant servers and higher. 816 */ 817 if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) { 818 dev_warn(&dev->dev, 819 "This server does not have an iLO2+ ASIC.\n"); 820 return -ENODEV; 821 } 822 823 /* 824 * Ignore all auxilary iLO devices with the following PCI ID 825 */ 826 if (dev->subsystem_device == 0x1979) 827 return -ENODEV; 828 829 if (pci_enable_device(dev)) { 830 dev_warn(&dev->dev, 831 "Not possible to enable PCI Device: 0x%x:0x%x.\n", 832 ent->vendor, ent->device); 833 return -ENODEV; 834 } 835 836 pci_mem_addr = pci_iomap(dev, 1, 0x80); 837 if (!pci_mem_addr) { 838 dev_warn(&dev->dev, 839 "Unable to detect the iLO2+ server memory.\n"); 840 retval = -ENOMEM; 841 goto error_pci_iomap; 842 } 843 hpwdt_timer_reg = pci_mem_addr + 0x70; 844 hpwdt_timer_con = pci_mem_addr + 0x72; 845 846 /* Make sure that timer is disabled until /dev/watchdog is opened */ 847 hpwdt_stop(); 848 849 /* Make sure that we have a valid soft_margin */ 850 if (hpwdt_change_timer(soft_margin)) 851 hpwdt_change_timer(DEFAULT_MARGIN); 852 853 /* Initialize NMI Decoding functionality */ 854 retval = hpwdt_init_nmi_decoding(dev); 855 if (retval != 0) 856 goto error_init_nmi_decoding; 857 858 retval = misc_register(&hpwdt_miscdev); 859 if (retval < 0) { 860 dev_warn(&dev->dev, 861 "Unable to register miscdev on minor=%d (err=%d).\n", 862 WATCHDOG_MINOR, retval); 863 goto error_misc_register; 864 } 865 866 dev_info(&dev->dev, "HPE Watchdog Timer Driver: %s" 867 ", timer margin: %d seconds (nowayout=%d).\n", 868 HPWDT_VERSION, soft_margin, nowayout); 869 return 0; 870 871 error_misc_register: 872 hpwdt_exit_nmi_decoding(); 873 error_init_nmi_decoding: 874 pci_iounmap(dev, pci_mem_addr); 875 error_pci_iomap: 876 pci_disable_device(dev); 877 return retval; 878 } 879 880 static void hpwdt_exit(struct pci_dev *dev) 881 { 882 if (!nowayout) 883 hpwdt_stop(); 884 885 misc_deregister(&hpwdt_miscdev); 886 hpwdt_exit_nmi_decoding(); 887 pci_iounmap(dev, pci_mem_addr); 888 pci_disable_device(dev); 889 } 890 891 static struct pci_driver hpwdt_driver = { 892 .name = "hpwdt", 893 .id_table = hpwdt_devices, 894 .probe = hpwdt_init_one, 895 .remove = hpwdt_exit, 896 }; 897 898 MODULE_AUTHOR("Tom Mingarelli"); 899 MODULE_DESCRIPTION("hp watchdog driver"); 900 MODULE_LICENSE("GPL"); 901 MODULE_VERSION(HPWDT_VERSION); 902 903 module_param(soft_margin, int, 0); 904 MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds"); 905 906 module_param(nowayout, bool, 0); 907 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" 908 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 909 910 #ifdef CONFIG_HPWDT_NMI_DECODING 911 module_param(allow_kdump, int, 0); 912 MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs"); 913 #endif /* !CONFIG_HPWDT_NMI_DECODING */ 914 915 module_pci_driver(hpwdt_driver); 916