1 /*************************************************************************** 2 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> * 3 * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> * 4 * Copyright (C) 2010 Giel van Schijndel <me@mortis.eu> * 5 * * 6 * This program is free software; you can redistribute it and/or modify * 7 * it under the terms of the GNU General Public License as published by * 8 * the Free Software Foundation; either version 2 of the License, or * 9 * (at your option) any later version. * 10 * * 11 * This program is distributed in the hope that it will be useful, * 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of * 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * 14 * GNU General Public License for more details. * 15 * * 16 * You should have received a copy of the GNU General Public License * 17 * along with this program; if not, write to the * 18 * Free Software Foundation, Inc., * 19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * 20 ***************************************************************************/ 21 22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 23 24 #include <linux/err.h> 25 #include <linux/fs.h> 26 #include <linux/init.h> 27 #include <linux/io.h> 28 #include <linux/ioport.h> 29 #include <linux/miscdevice.h> 30 #include <linux/module.h> 31 #include <linux/mutex.h> 32 #include <linux/notifier.h> 33 #include <linux/reboot.h> 34 #include <linux/uaccess.h> 35 #include <linux/watchdog.h> 36 37 #define DRVNAME "f71808e_wdt" 38 39 #define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */ 40 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */ 41 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */ 42 43 #define SIO_REG_LDSEL 0x07 /* Logical device select */ 44 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ 45 #define SIO_REG_DEVREV 0x22 /* Device revision */ 46 #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ 47 #define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */ 48 #define SIO_F81866_REG_PORT_SEL 0x27 /* F81866 Multi-Function Register */ 49 #define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */ 50 #define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */ 51 #define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */ 52 #define SIO_F81866_REG_GPIO1 0x2c /* F81866 GPIO1 Enable Register */ 53 #define SIO_REG_ENABLE 0x30 /* Logical device enable */ 54 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ 55 56 #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */ 57 #define SIO_F71808_ID 0x0901 /* Chipset ID */ 58 #define SIO_F71858_ID 0x0507 /* Chipset ID */ 59 #define SIO_F71862_ID 0x0601 /* Chipset ID */ 60 #define SIO_F71868_ID 0x1106 /* Chipset ID */ 61 #define SIO_F71869_ID 0x0814 /* Chipset ID */ 62 #define SIO_F71869A_ID 0x1007 /* Chipset ID */ 63 #define SIO_F71882_ID 0x0541 /* Chipset ID */ 64 #define SIO_F71889_ID 0x0723 /* Chipset ID */ 65 #define SIO_F81865_ID 0x0704 /* Chipset ID */ 66 #define SIO_F81866_ID 0x1010 /* Chipset ID */ 67 68 #define F71808FG_REG_WDO_CONF 0xf0 69 #define F71808FG_REG_WDT_CONF 0xf5 70 #define F71808FG_REG_WD_TIME 0xf6 71 72 #define F71808FG_FLAG_WDOUT_EN 7 73 74 #define F71808FG_FLAG_WDTMOUT_STS 6 75 #define F71808FG_FLAG_WD_EN 5 76 #define F71808FG_FLAG_WD_PULSE 4 77 #define F71808FG_FLAG_WD_UNIT 3 78 79 #define F81865_REG_WDO_CONF 0xfa 80 #define F81865_FLAG_WDOUT_EN 0 81 82 /* Default values */ 83 #define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */ 84 #define WATCHDOG_MAX_TIMEOUT (60 * 255) 85 #define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for 86 watchdog signal */ 87 #define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output 88 pin number 63 */ 89 90 static unsigned short force_id; 91 module_param(force_id, ushort, 0); 92 MODULE_PARM_DESC(force_id, "Override the detected device ID"); 93 94 static const int max_timeout = WATCHDOG_MAX_TIMEOUT; 95 static int timeout = WATCHDOG_TIMEOUT; /* default timeout in seconds */ 96 module_param(timeout, int, 0); 97 MODULE_PARM_DESC(timeout, 98 "Watchdog timeout in seconds. 1<= timeout <=" 99 __MODULE_STRING(WATCHDOG_MAX_TIMEOUT) " (default=" 100 __MODULE_STRING(WATCHDOG_TIMEOUT) ")"); 101 102 static unsigned int pulse_width = WATCHDOG_PULSE_WIDTH; 103 module_param(pulse_width, uint, 0); 104 MODULE_PARM_DESC(pulse_width, 105 "Watchdog signal pulse width. 0(=level), 1, 25, 30, 125, 150, 5000 or 6000 ms" 106 " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")"); 107 108 static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN; 109 module_param(f71862fg_pin, uint, 0); 110 MODULE_PARM_DESC(f71862fg_pin, 111 "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63" 112 " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")"); 113 114 static bool nowayout = WATCHDOG_NOWAYOUT; 115 module_param(nowayout, bool, 0444); 116 MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close"); 117 118 static unsigned int start_withtimeout; 119 module_param(start_withtimeout, uint, 0); 120 MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with" 121 " given initial timeout. Zero (default) disables this feature."); 122 123 enum chips { f71808fg, f71858fg, f71862fg, f71868, f71869, f71882fg, f71889fg, 124 f81865, f81866}; 125 126 static const char *f71808e_names[] = { 127 "f71808fg", 128 "f71858fg", 129 "f71862fg", 130 "f71868", 131 "f71869", 132 "f71882fg", 133 "f71889fg", 134 "f81865", 135 "f81866", 136 }; 137 138 /* Super-I/O Function prototypes */ 139 static inline int superio_inb(int base, int reg); 140 static inline int superio_inw(int base, int reg); 141 static inline void superio_outb(int base, int reg, u8 val); 142 static inline void superio_set_bit(int base, int reg, int bit); 143 static inline void superio_clear_bit(int base, int reg, int bit); 144 static inline int superio_enter(int base); 145 static inline void superio_select(int base, int ld); 146 static inline void superio_exit(int base); 147 148 struct watchdog_data { 149 unsigned short sioaddr; 150 enum chips type; 151 unsigned long opened; 152 struct mutex lock; 153 char expect_close; 154 struct watchdog_info ident; 155 156 unsigned short timeout; 157 u8 timer_val; /* content for the wd_time register */ 158 char minutes_mode; 159 u8 pulse_val; /* pulse width flag */ 160 char pulse_mode; /* enable pulse output mode? */ 161 char caused_reboot; /* last reboot was by the watchdog */ 162 }; 163 164 static struct watchdog_data watchdog = { 165 .lock = __MUTEX_INITIALIZER(watchdog.lock), 166 }; 167 168 /* Super I/O functions */ 169 static inline int superio_inb(int base, int reg) 170 { 171 outb(reg, base); 172 return inb(base + 1); 173 } 174 175 static int superio_inw(int base, int reg) 176 { 177 int val; 178 val = superio_inb(base, reg) << 8; 179 val |= superio_inb(base, reg + 1); 180 return val; 181 } 182 183 static inline void superio_outb(int base, int reg, u8 val) 184 { 185 outb(reg, base); 186 outb(val, base + 1); 187 } 188 189 static inline void superio_set_bit(int base, int reg, int bit) 190 { 191 unsigned long val = superio_inb(base, reg); 192 __set_bit(bit, &val); 193 superio_outb(base, reg, val); 194 } 195 196 static inline void superio_clear_bit(int base, int reg, int bit) 197 { 198 unsigned long val = superio_inb(base, reg); 199 __clear_bit(bit, &val); 200 superio_outb(base, reg, val); 201 } 202 203 static inline int superio_enter(int base) 204 { 205 /* Don't step on other drivers' I/O space by accident */ 206 if (!request_muxed_region(base, 2, DRVNAME)) { 207 pr_err("I/O address 0x%04x already in use\n", (int)base); 208 return -EBUSY; 209 } 210 211 /* according to the datasheet the key must be sent twice! */ 212 outb(SIO_UNLOCK_KEY, base); 213 outb(SIO_UNLOCK_KEY, base); 214 215 return 0; 216 } 217 218 static inline void superio_select(int base, int ld) 219 { 220 outb(SIO_REG_LDSEL, base); 221 outb(ld, base + 1); 222 } 223 224 static inline void superio_exit(int base) 225 { 226 outb(SIO_LOCK_KEY, base); 227 release_region(base, 2); 228 } 229 230 static int watchdog_set_timeout(int timeout) 231 { 232 if (timeout <= 0 233 || timeout > max_timeout) { 234 pr_err("watchdog timeout out of range\n"); 235 return -EINVAL; 236 } 237 238 mutex_lock(&watchdog.lock); 239 240 watchdog.timeout = timeout; 241 if (timeout > 0xff) { 242 watchdog.timer_val = DIV_ROUND_UP(timeout, 60); 243 watchdog.minutes_mode = true; 244 } else { 245 watchdog.timer_val = timeout; 246 watchdog.minutes_mode = false; 247 } 248 249 mutex_unlock(&watchdog.lock); 250 251 return 0; 252 } 253 254 static int watchdog_set_pulse_width(unsigned int pw) 255 { 256 int err = 0; 257 unsigned int t1 = 25, t2 = 125, t3 = 5000; 258 259 if (watchdog.type == f71868) { 260 t1 = 30; 261 t2 = 150; 262 t3 = 6000; 263 } 264 265 mutex_lock(&watchdog.lock); 266 267 if (pw <= 1) { 268 watchdog.pulse_val = 0; 269 } else if (pw <= t1) { 270 watchdog.pulse_val = 1; 271 } else if (pw <= t2) { 272 watchdog.pulse_val = 2; 273 } else if (pw <= t3) { 274 watchdog.pulse_val = 3; 275 } else { 276 pr_err("pulse width out of range\n"); 277 err = -EINVAL; 278 goto exit_unlock; 279 } 280 281 watchdog.pulse_mode = pw; 282 283 exit_unlock: 284 mutex_unlock(&watchdog.lock); 285 return err; 286 } 287 288 static int watchdog_keepalive(void) 289 { 290 int err = 0; 291 292 mutex_lock(&watchdog.lock); 293 err = superio_enter(watchdog.sioaddr); 294 if (err) 295 goto exit_unlock; 296 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 297 298 if (watchdog.minutes_mode) 299 /* select minutes for timer units */ 300 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, 301 F71808FG_FLAG_WD_UNIT); 302 else 303 /* select seconds for timer units */ 304 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, 305 F71808FG_FLAG_WD_UNIT); 306 307 /* Set timer value */ 308 superio_outb(watchdog.sioaddr, F71808FG_REG_WD_TIME, 309 watchdog.timer_val); 310 311 superio_exit(watchdog.sioaddr); 312 313 exit_unlock: 314 mutex_unlock(&watchdog.lock); 315 return err; 316 } 317 318 static int f71862fg_pin_configure(unsigned short ioaddr) 319 { 320 /* When ioaddr is non-zero the calling function has to take care of 321 mutex handling and superio preparation! */ 322 323 if (f71862fg_pin == 63) { 324 if (ioaddr) { 325 /* SPI must be disabled first to use this pin! */ 326 superio_clear_bit(ioaddr, SIO_REG_ROM_ADDR_SEL, 6); 327 superio_set_bit(ioaddr, SIO_REG_MFUNCT3, 4); 328 } 329 } else if (f71862fg_pin == 56) { 330 if (ioaddr) 331 superio_set_bit(ioaddr, SIO_REG_MFUNCT1, 1); 332 } else { 333 pr_err("Invalid argument f71862fg_pin=%d\n", f71862fg_pin); 334 return -EINVAL; 335 } 336 return 0; 337 } 338 339 static int watchdog_start(void) 340 { 341 int err; 342 u8 tmp; 343 344 /* Make sure we don't die as soon as the watchdog is enabled below */ 345 err = watchdog_keepalive(); 346 if (err) 347 return err; 348 349 mutex_lock(&watchdog.lock); 350 err = superio_enter(watchdog.sioaddr); 351 if (err) 352 goto exit_unlock; 353 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 354 355 /* Watchdog pin configuration */ 356 switch (watchdog.type) { 357 case f71808fg: 358 /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */ 359 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3); 360 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3); 361 break; 362 363 case f71862fg: 364 err = f71862fg_pin_configure(watchdog.sioaddr); 365 if (err) 366 goto exit_superio; 367 break; 368 369 case f71868: 370 case f71869: 371 /* GPIO14 --> WDTRST# */ 372 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4); 373 break; 374 375 case f71882fg: 376 /* Set pin 56 to WDTRST# */ 377 superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1); 378 break; 379 380 case f71889fg: 381 /* set pin 40 to WDTRST# */ 382 superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3, 383 superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf); 384 break; 385 386 case f81865: 387 /* Set pin 70 to WDTRST# */ 388 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 5); 389 break; 390 391 case f81866: 392 /* 393 * GPIO1 Control Register when 27h BIT3:2 = 01 & BIT0 = 0. 394 * The PIN 70(GPIO15/WDTRST) is controlled by 2Ch: 395 * BIT5: 0 -> WDTRST# 396 * 1 -> GPIO15 397 */ 398 tmp = superio_inb(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL); 399 tmp &= ~(BIT(3) | BIT(0)); 400 tmp |= BIT(2); 401 superio_outb(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, tmp); 402 403 superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_GPIO1, 5); 404 break; 405 406 default: 407 /* 408 * 'default' label to shut up the compiler and catch 409 * programmer errors 410 */ 411 err = -ENODEV; 412 goto exit_superio; 413 } 414 415 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 416 superio_set_bit(watchdog.sioaddr, SIO_REG_ENABLE, 0); 417 418 if (watchdog.type == f81865 || watchdog.type == f81866) 419 superio_set_bit(watchdog.sioaddr, F81865_REG_WDO_CONF, 420 F81865_FLAG_WDOUT_EN); 421 else 422 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDO_CONF, 423 F71808FG_FLAG_WDOUT_EN); 424 425 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, 426 F71808FG_FLAG_WD_EN); 427 428 if (watchdog.pulse_mode) { 429 /* Select "pulse" output mode with given duration */ 430 u8 wdt_conf = superio_inb(watchdog.sioaddr, 431 F71808FG_REG_WDT_CONF); 432 433 /* Set WD_PSWIDTH bits (1:0) */ 434 wdt_conf = (wdt_conf & 0xfc) | (watchdog.pulse_val & 0x03); 435 /* Set WD_PULSE to "pulse" mode */ 436 wdt_conf |= BIT(F71808FG_FLAG_WD_PULSE); 437 438 superio_outb(watchdog.sioaddr, F71808FG_REG_WDT_CONF, 439 wdt_conf); 440 } else { 441 /* Select "level" output mode */ 442 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, 443 F71808FG_FLAG_WD_PULSE); 444 } 445 446 exit_superio: 447 superio_exit(watchdog.sioaddr); 448 exit_unlock: 449 mutex_unlock(&watchdog.lock); 450 451 return err; 452 } 453 454 static int watchdog_stop(void) 455 { 456 int err = 0; 457 458 mutex_lock(&watchdog.lock); 459 err = superio_enter(watchdog.sioaddr); 460 if (err) 461 goto exit_unlock; 462 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 463 464 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, 465 F71808FG_FLAG_WD_EN); 466 467 superio_exit(watchdog.sioaddr); 468 469 exit_unlock: 470 mutex_unlock(&watchdog.lock); 471 472 return err; 473 } 474 475 static int watchdog_get_status(void) 476 { 477 int status = 0; 478 479 mutex_lock(&watchdog.lock); 480 status = (watchdog.caused_reboot) ? WDIOF_CARDRESET : 0; 481 mutex_unlock(&watchdog.lock); 482 483 return status; 484 } 485 486 static bool watchdog_is_running(void) 487 { 488 /* 489 * if we fail to determine the watchdog's status assume it to be 490 * running to be on the safe side 491 */ 492 bool is_running = true; 493 494 mutex_lock(&watchdog.lock); 495 if (superio_enter(watchdog.sioaddr)) 496 goto exit_unlock; 497 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 498 499 is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0)) 500 && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF) 501 & BIT(F71808FG_FLAG_WD_EN)); 502 503 superio_exit(watchdog.sioaddr); 504 505 exit_unlock: 506 mutex_unlock(&watchdog.lock); 507 return is_running; 508 } 509 510 /* /dev/watchdog api */ 511 512 static int watchdog_open(struct inode *inode, struct file *file) 513 { 514 int err; 515 516 /* If the watchdog is alive we don't need to start it again */ 517 if (test_and_set_bit(0, &watchdog.opened)) 518 return -EBUSY; 519 520 err = watchdog_start(); 521 if (err) { 522 clear_bit(0, &watchdog.opened); 523 return err; 524 } 525 526 if (nowayout) 527 __module_get(THIS_MODULE); 528 529 watchdog.expect_close = 0; 530 return stream_open(inode, file); 531 } 532 533 static int watchdog_release(struct inode *inode, struct file *file) 534 { 535 clear_bit(0, &watchdog.opened); 536 537 if (!watchdog.expect_close) { 538 watchdog_keepalive(); 539 pr_crit("Unexpected close, not stopping watchdog!\n"); 540 } else if (!nowayout) { 541 watchdog_stop(); 542 } 543 return 0; 544 } 545 546 /* 547 * watchdog_write: 548 * @file: file handle to the watchdog 549 * @buf: buffer to write 550 * @count: count of bytes 551 * @ppos: pointer to the position to write. No seeks allowed 552 * 553 * A write to a watchdog device is defined as a keepalive signal. Any 554 * write of data will do, as we we don't define content meaning. 555 */ 556 557 static ssize_t watchdog_write(struct file *file, const char __user *buf, 558 size_t count, loff_t *ppos) 559 { 560 if (count) { 561 if (!nowayout) { 562 size_t i; 563 564 /* In case it was set long ago */ 565 bool expect_close = false; 566 567 for (i = 0; i != count; i++) { 568 char c; 569 if (get_user(c, buf + i)) 570 return -EFAULT; 571 if (c == 'V') 572 expect_close = true; 573 } 574 575 /* Properly order writes across fork()ed processes */ 576 mutex_lock(&watchdog.lock); 577 watchdog.expect_close = expect_close; 578 mutex_unlock(&watchdog.lock); 579 } 580 581 /* someone wrote to us, we should restart timer */ 582 watchdog_keepalive(); 583 } 584 return count; 585 } 586 587 /* 588 * watchdog_ioctl: 589 * @inode: inode of the device 590 * @file: file handle to the device 591 * @cmd: watchdog command 592 * @arg: argument pointer 593 * 594 * The watchdog API defines a common set of functions for all watchdogs 595 * according to their available features. 596 */ 597 static long watchdog_ioctl(struct file *file, unsigned int cmd, 598 unsigned long arg) 599 { 600 int status; 601 int new_options; 602 int new_timeout; 603 union { 604 struct watchdog_info __user *ident; 605 int __user *i; 606 } uarg; 607 608 uarg.i = (int __user *)arg; 609 610 switch (cmd) { 611 case WDIOC_GETSUPPORT: 612 return copy_to_user(uarg.ident, &watchdog.ident, 613 sizeof(watchdog.ident)) ? -EFAULT : 0; 614 615 case WDIOC_GETSTATUS: 616 status = watchdog_get_status(); 617 if (status < 0) 618 return status; 619 return put_user(status, uarg.i); 620 621 case WDIOC_GETBOOTSTATUS: 622 return put_user(0, uarg.i); 623 624 case WDIOC_SETOPTIONS: 625 if (get_user(new_options, uarg.i)) 626 return -EFAULT; 627 628 if (new_options & WDIOS_DISABLECARD) 629 watchdog_stop(); 630 631 if (new_options & WDIOS_ENABLECARD) 632 return watchdog_start(); 633 /* fall through */ 634 635 case WDIOC_KEEPALIVE: 636 watchdog_keepalive(); 637 return 0; 638 639 case WDIOC_SETTIMEOUT: 640 if (get_user(new_timeout, uarg.i)) 641 return -EFAULT; 642 643 if (watchdog_set_timeout(new_timeout)) 644 return -EINVAL; 645 646 watchdog_keepalive(); 647 /* fall through */ 648 649 case WDIOC_GETTIMEOUT: 650 return put_user(watchdog.timeout, uarg.i); 651 652 default: 653 return -ENOTTY; 654 655 } 656 } 657 658 static int watchdog_notify_sys(struct notifier_block *this, unsigned long code, 659 void *unused) 660 { 661 if (code == SYS_DOWN || code == SYS_HALT) 662 watchdog_stop(); 663 return NOTIFY_DONE; 664 } 665 666 static const struct file_operations watchdog_fops = { 667 .owner = THIS_MODULE, 668 .llseek = no_llseek, 669 .open = watchdog_open, 670 .release = watchdog_release, 671 .write = watchdog_write, 672 .unlocked_ioctl = watchdog_ioctl, 673 }; 674 675 static struct miscdevice watchdog_miscdev = { 676 .minor = WATCHDOG_MINOR, 677 .name = "watchdog", 678 .fops = &watchdog_fops, 679 }; 680 681 static struct notifier_block watchdog_notifier = { 682 .notifier_call = watchdog_notify_sys, 683 }; 684 685 static int __init watchdog_init(int sioaddr) 686 { 687 int wdt_conf, err = 0; 688 689 /* No need to lock watchdog.lock here because no entry points 690 * into the module have been registered yet. 691 */ 692 watchdog.sioaddr = sioaddr; 693 watchdog.ident.options = WDIOC_SETTIMEOUT 694 | WDIOF_MAGICCLOSE 695 | WDIOF_KEEPALIVEPING; 696 697 snprintf(watchdog.ident.identity, 698 sizeof(watchdog.ident.identity), "%s watchdog", 699 f71808e_names[watchdog.type]); 700 701 err = superio_enter(sioaddr); 702 if (err) 703 return err; 704 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 705 706 wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF); 707 watchdog.caused_reboot = wdt_conf & BIT(F71808FG_FLAG_WDTMOUT_STS); 708 709 superio_exit(sioaddr); 710 711 err = watchdog_set_timeout(timeout); 712 if (err) 713 return err; 714 err = watchdog_set_pulse_width(pulse_width); 715 if (err) 716 return err; 717 718 err = register_reboot_notifier(&watchdog_notifier); 719 if (err) 720 return err; 721 722 err = misc_register(&watchdog_miscdev); 723 if (err) { 724 pr_err("cannot register miscdev on minor=%d\n", 725 watchdog_miscdev.minor); 726 goto exit_reboot; 727 } 728 729 if (start_withtimeout) { 730 if (start_withtimeout <= 0 731 || start_withtimeout > max_timeout) { 732 pr_err("starting timeout out of range\n"); 733 err = -EINVAL; 734 goto exit_miscdev; 735 } 736 737 err = watchdog_start(); 738 if (err) { 739 pr_err("cannot start watchdog timer\n"); 740 goto exit_miscdev; 741 } 742 743 mutex_lock(&watchdog.lock); 744 err = superio_enter(sioaddr); 745 if (err) 746 goto exit_unlock; 747 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 748 749 if (start_withtimeout > 0xff) { 750 /* select minutes for timer units */ 751 superio_set_bit(sioaddr, F71808FG_REG_WDT_CONF, 752 F71808FG_FLAG_WD_UNIT); 753 superio_outb(sioaddr, F71808FG_REG_WD_TIME, 754 DIV_ROUND_UP(start_withtimeout, 60)); 755 } else { 756 /* select seconds for timer units */ 757 superio_clear_bit(sioaddr, F71808FG_REG_WDT_CONF, 758 F71808FG_FLAG_WD_UNIT); 759 superio_outb(sioaddr, F71808FG_REG_WD_TIME, 760 start_withtimeout); 761 } 762 763 superio_exit(sioaddr); 764 mutex_unlock(&watchdog.lock); 765 766 if (nowayout) 767 __module_get(THIS_MODULE); 768 769 pr_info("watchdog started with initial timeout of %u sec\n", 770 start_withtimeout); 771 } 772 773 return 0; 774 775 exit_unlock: 776 mutex_unlock(&watchdog.lock); 777 exit_miscdev: 778 misc_deregister(&watchdog_miscdev); 779 exit_reboot: 780 unregister_reboot_notifier(&watchdog_notifier); 781 782 return err; 783 } 784 785 static int __init f71808e_find(int sioaddr) 786 { 787 u16 devid; 788 int err = superio_enter(sioaddr); 789 if (err) 790 return err; 791 792 devid = superio_inw(sioaddr, SIO_REG_MANID); 793 if (devid != SIO_FINTEK_ID) { 794 pr_debug("Not a Fintek device\n"); 795 err = -ENODEV; 796 goto exit; 797 } 798 799 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID); 800 switch (devid) { 801 case SIO_F71808_ID: 802 watchdog.type = f71808fg; 803 break; 804 case SIO_F71862_ID: 805 watchdog.type = f71862fg; 806 err = f71862fg_pin_configure(0); /* validate module parameter */ 807 break; 808 case SIO_F71868_ID: 809 watchdog.type = f71868; 810 break; 811 case SIO_F71869_ID: 812 case SIO_F71869A_ID: 813 watchdog.type = f71869; 814 break; 815 case SIO_F71882_ID: 816 watchdog.type = f71882fg; 817 break; 818 case SIO_F71889_ID: 819 watchdog.type = f71889fg; 820 break; 821 case SIO_F71858_ID: 822 /* Confirmed (by datasheet) not to have a watchdog. */ 823 err = -ENODEV; 824 goto exit; 825 case SIO_F81865_ID: 826 watchdog.type = f81865; 827 break; 828 case SIO_F81866_ID: 829 watchdog.type = f81866; 830 break; 831 default: 832 pr_info("Unrecognized Fintek device: %04x\n", 833 (unsigned int)devid); 834 err = -ENODEV; 835 goto exit; 836 } 837 838 pr_info("Found %s watchdog chip, revision %d\n", 839 f71808e_names[watchdog.type], 840 (int)superio_inb(sioaddr, SIO_REG_DEVREV)); 841 exit: 842 superio_exit(sioaddr); 843 return err; 844 } 845 846 static int __init f71808e_init(void) 847 { 848 static const unsigned short addrs[] = { 0x2e, 0x4e }; 849 int err = -ENODEV; 850 int i; 851 852 for (i = 0; i < ARRAY_SIZE(addrs); i++) { 853 err = f71808e_find(addrs[i]); 854 if (err == 0) 855 break; 856 } 857 if (i == ARRAY_SIZE(addrs)) 858 return err; 859 860 return watchdog_init(addrs[i]); 861 } 862 863 static void __exit f71808e_exit(void) 864 { 865 if (watchdog_is_running()) { 866 pr_warn("Watchdog timer still running, stopping it\n"); 867 watchdog_stop(); 868 } 869 misc_deregister(&watchdog_miscdev); 870 unregister_reboot_notifier(&watchdog_notifier); 871 } 872 873 MODULE_DESCRIPTION("F71808E Watchdog Driver"); 874 MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>"); 875 MODULE_LICENSE("GPL"); 876 877 module_init(f71808e_init); 878 module_exit(f71808e_exit); 879