1 /*************************************************************************** 2 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> * 3 * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> * 4 * Copyright (C) 2010 Giel van Schijndel <me@mortis.eu> * 5 * * 6 * This program is free software; you can redistribute it and/or modify * 7 * it under the terms of the GNU General Public License as published by * 8 * the Free Software Foundation; either version 2 of the License, or * 9 * (at your option) any later version. * 10 * * 11 * This program is distributed in the hope that it will be useful, * 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of * 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * 14 * GNU General Public License for more details. * 15 * * 16 * You should have received a copy of the GNU General Public License * 17 * along with this program; if not, write to the * 18 * Free Software Foundation, Inc., * 19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * 20 ***************************************************************************/ 21 22 #include <linux/err.h> 23 #include <linux/fs.h> 24 #include <linux/init.h> 25 #include <linux/io.h> 26 #include <linux/ioport.h> 27 #include <linux/miscdevice.h> 28 #include <linux/module.h> 29 #include <linux/mutex.h> 30 #include <linux/notifier.h> 31 #include <linux/reboot.h> 32 #include <linux/uaccess.h> 33 #include <linux/watchdog.h> 34 35 #define DRVNAME "f71808e_wdt" 36 37 #define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */ 38 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */ 39 #define SIO_LOCK_KEY 0xAA /* Key to diasble Super-I/O */ 40 41 #define SIO_REG_LDSEL 0x07 /* Logical device select */ 42 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ 43 #define SIO_REG_DEVREV 0x22 /* Device revision */ 44 #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ 45 #define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */ 46 #define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */ 47 #define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */ 48 #define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */ 49 #define SIO_REG_ENABLE 0x30 /* Logical device enable */ 50 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ 51 52 #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */ 53 #define SIO_F71808_ID 0x0901 /* Chipset ID */ 54 #define SIO_F71858_ID 0x0507 /* Chipset ID */ 55 #define SIO_F71862_ID 0x0601 /* Chipset ID */ 56 #define SIO_F71869_ID 0x0814 /* Chipset ID */ 57 #define SIO_F71882_ID 0x0541 /* Chipset ID */ 58 #define SIO_F71889_ID 0x0723 /* Chipset ID */ 59 60 #define F71808FG_REG_WDO_CONF 0xf0 61 #define F71808FG_REG_WDT_CONF 0xf5 62 #define F71808FG_REG_WD_TIME 0xf6 63 64 #define F71808FG_FLAG_WDOUT_EN 7 65 66 #define F71808FG_FLAG_WDTMOUT_STS 5 67 #define F71808FG_FLAG_WD_EN 5 68 #define F71808FG_FLAG_WD_PULSE 4 69 #define F71808FG_FLAG_WD_UNIT 3 70 71 /* Default values */ 72 #define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */ 73 #define WATCHDOG_MAX_TIMEOUT (60 * 255) 74 #define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for 75 watchdog signal */ 76 #define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output 77 pin number 63 */ 78 79 static unsigned short force_id; 80 module_param(force_id, ushort, 0); 81 MODULE_PARM_DESC(force_id, "Override the detected device ID"); 82 83 static const int max_timeout = WATCHDOG_MAX_TIMEOUT; 84 static int timeout = WATCHDOG_TIMEOUT; /* default timeout in seconds */ 85 module_param(timeout, int, 0); 86 MODULE_PARM_DESC(timeout, 87 "Watchdog timeout in seconds. 1<= timeout <=" 88 __MODULE_STRING(WATCHDOG_MAX_TIMEOUT) " (default=" 89 __MODULE_STRING(WATCHDOG_TIMEOUT) ")"); 90 91 static unsigned int pulse_width = WATCHDOG_PULSE_WIDTH; 92 module_param(pulse_width, uint, 0); 93 MODULE_PARM_DESC(pulse_width, 94 "Watchdog signal pulse width. 0(=level), 1 ms, 25 ms, 125 ms or 5000 ms" 95 " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")"); 96 97 static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN; 98 module_param(f71862fg_pin, uint, 0); 99 MODULE_PARM_DESC(f71862fg_pin, 100 "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63" 101 " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")"); 102 103 static int nowayout = WATCHDOG_NOWAYOUT; 104 module_param(nowayout, bool, 0444); 105 MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close"); 106 107 static unsigned int start_withtimeout; 108 module_param(start_withtimeout, uint, 0); 109 MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with" 110 " given initial timeout. Zero (default) disables this feature."); 111 112 enum chips { f71808fg, f71858fg, f71862fg, f71869, f71882fg, f71889fg }; 113 114 static const char *f71808e_names[] = { 115 "f71808fg", 116 "f71858fg", 117 "f71862fg", 118 "f71869", 119 "f71882fg", 120 "f71889fg", 121 }; 122 123 /* Super-I/O Function prototypes */ 124 static inline int superio_inb(int base, int reg); 125 static inline int superio_inw(int base, int reg); 126 static inline void superio_outb(int base, int reg, u8 val); 127 static inline void superio_set_bit(int base, int reg, int bit); 128 static inline void superio_clear_bit(int base, int reg, int bit); 129 static inline int superio_enter(int base); 130 static inline void superio_select(int base, int ld); 131 static inline void superio_exit(int base); 132 133 struct watchdog_data { 134 unsigned short sioaddr; 135 enum chips type; 136 unsigned long opened; 137 struct mutex lock; 138 char expect_close; 139 struct watchdog_info ident; 140 141 unsigned short timeout; 142 u8 timer_val; /* content for the wd_time register */ 143 char minutes_mode; 144 u8 pulse_val; /* pulse width flag */ 145 char pulse_mode; /* enable pulse output mode? */ 146 char caused_reboot; /* last reboot was by the watchdog */ 147 }; 148 149 static struct watchdog_data watchdog = { 150 .lock = __MUTEX_INITIALIZER(watchdog.lock), 151 }; 152 153 /* Super I/O functions */ 154 static inline int superio_inb(int base, int reg) 155 { 156 outb(reg, base); 157 return inb(base + 1); 158 } 159 160 static int superio_inw(int base, int reg) 161 { 162 int val; 163 val = superio_inb(base, reg) << 8; 164 val |= superio_inb(base, reg + 1); 165 return val; 166 } 167 168 static inline void superio_outb(int base, int reg, u8 val) 169 { 170 outb(reg, base); 171 outb(val, base + 1); 172 } 173 174 static inline void superio_set_bit(int base, int reg, int bit) 175 { 176 unsigned long val = superio_inb(base, reg); 177 __set_bit(bit, &val); 178 superio_outb(base, reg, val); 179 } 180 181 static inline void superio_clear_bit(int base, int reg, int bit) 182 { 183 unsigned long val = superio_inb(base, reg); 184 __clear_bit(bit, &val); 185 superio_outb(base, reg, val); 186 } 187 188 static inline int superio_enter(int base) 189 { 190 /* Don't step on other drivers' I/O space by accident */ 191 if (!request_muxed_region(base, 2, DRVNAME)) { 192 printk(KERN_ERR DRVNAME ": I/O address 0x%04x already in use\n", 193 (int)base); 194 return -EBUSY; 195 } 196 197 /* according to the datasheet the key must be send twice! */ 198 outb(SIO_UNLOCK_KEY, base); 199 outb(SIO_UNLOCK_KEY, base); 200 201 return 0; 202 } 203 204 static inline void superio_select(int base, int ld) 205 { 206 outb(SIO_REG_LDSEL, base); 207 outb(ld, base + 1); 208 } 209 210 static inline void superio_exit(int base) 211 { 212 outb(SIO_LOCK_KEY, base); 213 release_region(base, 2); 214 } 215 216 static int watchdog_set_timeout(int timeout) 217 { 218 if (timeout <= 0 219 || timeout > max_timeout) { 220 printk(KERN_ERR DRVNAME ": watchdog timeout out of range\n"); 221 return -EINVAL; 222 } 223 224 mutex_lock(&watchdog.lock); 225 226 watchdog.timeout = timeout; 227 if (timeout > 0xff) { 228 watchdog.timer_val = DIV_ROUND_UP(timeout, 60); 229 watchdog.minutes_mode = true; 230 } else { 231 watchdog.timer_val = timeout; 232 watchdog.minutes_mode = false; 233 } 234 235 mutex_unlock(&watchdog.lock); 236 237 return 0; 238 } 239 240 static int watchdog_set_pulse_width(unsigned int pw) 241 { 242 int err = 0; 243 244 mutex_lock(&watchdog.lock); 245 246 if (pw <= 1) { 247 watchdog.pulse_val = 0; 248 } else if (pw <= 25) { 249 watchdog.pulse_val = 1; 250 } else if (pw <= 125) { 251 watchdog.pulse_val = 2; 252 } else if (pw <= 5000) { 253 watchdog.pulse_val = 3; 254 } else { 255 printk(KERN_ERR DRVNAME ": pulse width out of range\n"); 256 err = -EINVAL; 257 goto exit_unlock; 258 } 259 260 watchdog.pulse_mode = pw; 261 262 exit_unlock: 263 mutex_unlock(&watchdog.lock); 264 return err; 265 } 266 267 static int watchdog_keepalive(void) 268 { 269 int err = 0; 270 271 mutex_lock(&watchdog.lock); 272 err = superio_enter(watchdog.sioaddr); 273 if (err) 274 goto exit_unlock; 275 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 276 277 if (watchdog.minutes_mode) 278 /* select minutes for timer units */ 279 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, 280 F71808FG_FLAG_WD_UNIT); 281 else 282 /* select seconds for timer units */ 283 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, 284 F71808FG_FLAG_WD_UNIT); 285 286 /* Set timer value */ 287 superio_outb(watchdog.sioaddr, F71808FG_REG_WD_TIME, 288 watchdog.timer_val); 289 290 superio_exit(watchdog.sioaddr); 291 292 exit_unlock: 293 mutex_unlock(&watchdog.lock); 294 return err; 295 } 296 297 static int f71862fg_pin_configure(unsigned short ioaddr) 298 { 299 /* When ioaddr is non-zero the calling function has to take care of 300 mutex handling and superio preparation! */ 301 302 if (f71862fg_pin == 63) { 303 if (ioaddr) { 304 /* SPI must be disabled first to use this pin! */ 305 superio_clear_bit(ioaddr, SIO_REG_ROM_ADDR_SEL, 6); 306 superio_set_bit(ioaddr, SIO_REG_MFUNCT3, 4); 307 } 308 } else if (f71862fg_pin == 56) { 309 if (ioaddr) 310 superio_set_bit(ioaddr, SIO_REG_MFUNCT1, 1); 311 } else { 312 printk(KERN_ERR DRVNAME ": Invalid argument f71862fg_pin=%d\n", 313 f71862fg_pin); 314 return -EINVAL; 315 } 316 return 0; 317 } 318 319 static int watchdog_start(void) 320 { 321 /* Make sure we don't die as soon as the watchdog is enabled below */ 322 int err = watchdog_keepalive(); 323 if (err) 324 return err; 325 326 mutex_lock(&watchdog.lock); 327 err = superio_enter(watchdog.sioaddr); 328 if (err) 329 goto exit_unlock; 330 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 331 332 /* Watchdog pin configuration */ 333 switch (watchdog.type) { 334 case f71808fg: 335 /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */ 336 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3); 337 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3); 338 break; 339 340 case f71862fg: 341 err = f71862fg_pin_configure(watchdog.sioaddr); 342 if (err) 343 goto exit_superio; 344 break; 345 346 case f71869: 347 /* GPIO14 --> WDTRST# */ 348 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4); 349 break; 350 351 case f71882fg: 352 /* Set pin 56 to WDTRST# */ 353 superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1); 354 break; 355 356 case f71889fg: 357 /* set pin 40 to WDTRST# */ 358 superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3, 359 superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf); 360 break; 361 362 default: 363 /* 364 * 'default' label to shut up the compiler and catch 365 * programmer errors 366 */ 367 err = -ENODEV; 368 goto exit_superio; 369 } 370 371 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 372 superio_set_bit(watchdog.sioaddr, SIO_REG_ENABLE, 0); 373 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDO_CONF, 374 F71808FG_FLAG_WDOUT_EN); 375 376 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, 377 F71808FG_FLAG_WD_EN); 378 379 if (watchdog.pulse_mode) { 380 /* Select "pulse" output mode with given duration */ 381 u8 wdt_conf = superio_inb(watchdog.sioaddr, 382 F71808FG_REG_WDT_CONF); 383 384 /* Set WD_PSWIDTH bits (1:0) */ 385 wdt_conf = (wdt_conf & 0xfc) | (watchdog.pulse_val & 0x03); 386 /* Set WD_PULSE to "pulse" mode */ 387 wdt_conf |= BIT(F71808FG_FLAG_WD_PULSE); 388 389 superio_outb(watchdog.sioaddr, F71808FG_REG_WDT_CONF, 390 wdt_conf); 391 } else { 392 /* Select "level" output mode */ 393 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, 394 F71808FG_FLAG_WD_PULSE); 395 } 396 397 exit_superio: 398 superio_exit(watchdog.sioaddr); 399 exit_unlock: 400 mutex_unlock(&watchdog.lock); 401 402 return err; 403 } 404 405 static int watchdog_stop(void) 406 { 407 int err = 0; 408 409 mutex_lock(&watchdog.lock); 410 err = superio_enter(watchdog.sioaddr); 411 if (err) 412 goto exit_unlock; 413 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 414 415 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF, 416 F71808FG_FLAG_WD_EN); 417 418 superio_exit(watchdog.sioaddr); 419 420 exit_unlock: 421 mutex_unlock(&watchdog.lock); 422 423 return err; 424 } 425 426 static int watchdog_get_status(void) 427 { 428 int status = 0; 429 430 mutex_lock(&watchdog.lock); 431 status = (watchdog.caused_reboot) ? WDIOF_CARDRESET : 0; 432 mutex_unlock(&watchdog.lock); 433 434 return status; 435 } 436 437 static bool watchdog_is_running(void) 438 { 439 /* 440 * if we fail to determine the watchdog's status assume it to be 441 * running to be on the safe side 442 */ 443 bool is_running = true; 444 445 mutex_lock(&watchdog.lock); 446 if (superio_enter(watchdog.sioaddr)) 447 goto exit_unlock; 448 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 449 450 is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0)) 451 && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF) 452 & F71808FG_FLAG_WD_EN); 453 454 superio_exit(watchdog.sioaddr); 455 456 exit_unlock: 457 mutex_unlock(&watchdog.lock); 458 return is_running; 459 } 460 461 /* /dev/watchdog api */ 462 463 static int watchdog_open(struct inode *inode, struct file *file) 464 { 465 int err; 466 467 /* If the watchdog is alive we don't need to start it again */ 468 if (test_and_set_bit(0, &watchdog.opened)) 469 return -EBUSY; 470 471 err = watchdog_start(); 472 if (err) { 473 clear_bit(0, &watchdog.opened); 474 return err; 475 } 476 477 if (nowayout) 478 __module_get(THIS_MODULE); 479 480 watchdog.expect_close = 0; 481 return nonseekable_open(inode, file); 482 } 483 484 static int watchdog_release(struct inode *inode, struct file *file) 485 { 486 clear_bit(0, &watchdog.opened); 487 488 if (!watchdog.expect_close) { 489 watchdog_keepalive(); 490 printk(KERN_CRIT DRVNAME 491 ": Unexpected close, not stopping watchdog!\n"); 492 } else if (!nowayout) { 493 watchdog_stop(); 494 } 495 return 0; 496 } 497 498 /* 499 * watchdog_write: 500 * @file: file handle to the watchdog 501 * @buf: buffer to write 502 * @count: count of bytes 503 * @ppos: pointer to the position to write. No seeks allowed 504 * 505 * A write to a watchdog device is defined as a keepalive signal. Any 506 * write of data will do, as we we don't define content meaning. 507 */ 508 509 static ssize_t watchdog_write(struct file *file, const char __user *buf, 510 size_t count, loff_t *ppos) 511 { 512 if (count) { 513 if (!nowayout) { 514 size_t i; 515 516 /* In case it was set long ago */ 517 bool expect_close = false; 518 519 for (i = 0; i != count; i++) { 520 char c; 521 if (get_user(c, buf + i)) 522 return -EFAULT; 523 expect_close = (c == 'V'); 524 } 525 526 /* Properly order writes across fork()ed processes */ 527 mutex_lock(&watchdog.lock); 528 watchdog.expect_close = expect_close; 529 mutex_unlock(&watchdog.lock); 530 } 531 532 /* someone wrote to us, we should restart timer */ 533 watchdog_keepalive(); 534 } 535 return count; 536 } 537 538 /* 539 * watchdog_ioctl: 540 * @inode: inode of the device 541 * @file: file handle to the device 542 * @cmd: watchdog command 543 * @arg: argument pointer 544 * 545 * The watchdog API defines a common set of functions for all watchdogs 546 * according to their available features. 547 */ 548 static long watchdog_ioctl(struct file *file, unsigned int cmd, 549 unsigned long arg) 550 { 551 int status; 552 int new_options; 553 int new_timeout; 554 union { 555 struct watchdog_info __user *ident; 556 int __user *i; 557 } uarg; 558 559 uarg.i = (int __user *)arg; 560 561 switch (cmd) { 562 case WDIOC_GETSUPPORT: 563 return copy_to_user(uarg.ident, &watchdog.ident, 564 sizeof(watchdog.ident)) ? -EFAULT : 0; 565 566 case WDIOC_GETSTATUS: 567 status = watchdog_get_status(); 568 if (status < 0) 569 return status; 570 return put_user(status, uarg.i); 571 572 case WDIOC_GETBOOTSTATUS: 573 return put_user(0, uarg.i); 574 575 case WDIOC_SETOPTIONS: 576 if (get_user(new_options, uarg.i)) 577 return -EFAULT; 578 579 if (new_options & WDIOS_DISABLECARD) 580 watchdog_stop(); 581 582 if (new_options & WDIOS_ENABLECARD) 583 return watchdog_start(); 584 585 586 case WDIOC_KEEPALIVE: 587 watchdog_keepalive(); 588 return 0; 589 590 case WDIOC_SETTIMEOUT: 591 if (get_user(new_timeout, uarg.i)) 592 return -EFAULT; 593 594 if (watchdog_set_timeout(new_timeout)) 595 return -EINVAL; 596 597 watchdog_keepalive(); 598 /* Fall */ 599 600 case WDIOC_GETTIMEOUT: 601 return put_user(watchdog.timeout, uarg.i); 602 603 default: 604 return -ENOTTY; 605 606 } 607 } 608 609 static int watchdog_notify_sys(struct notifier_block *this, unsigned long code, 610 void *unused) 611 { 612 if (code == SYS_DOWN || code == SYS_HALT) 613 watchdog_stop(); 614 return NOTIFY_DONE; 615 } 616 617 static const struct file_operations watchdog_fops = { 618 .owner = THIS_MODULE, 619 .llseek = no_llseek, 620 .open = watchdog_open, 621 .release = watchdog_release, 622 .write = watchdog_write, 623 .unlocked_ioctl = watchdog_ioctl, 624 }; 625 626 static struct miscdevice watchdog_miscdev = { 627 .minor = WATCHDOG_MINOR, 628 .name = "watchdog", 629 .fops = &watchdog_fops, 630 }; 631 632 static struct notifier_block watchdog_notifier = { 633 .notifier_call = watchdog_notify_sys, 634 }; 635 636 static int __init watchdog_init(int sioaddr) 637 { 638 int wdt_conf, err = 0; 639 640 /* No need to lock watchdog.lock here because no entry points 641 * into the module have been registered yet. 642 */ 643 watchdog.sioaddr = sioaddr; 644 watchdog.ident.options = WDIOC_SETTIMEOUT 645 | WDIOF_MAGICCLOSE 646 | WDIOF_KEEPALIVEPING; 647 648 snprintf(watchdog.ident.identity, 649 sizeof(watchdog.ident.identity), "%s watchdog", 650 f71808e_names[watchdog.type]); 651 652 err = superio_enter(sioaddr); 653 if (err) 654 return err; 655 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 656 657 wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF); 658 watchdog.caused_reboot = wdt_conf & F71808FG_FLAG_WDTMOUT_STS; 659 660 superio_exit(sioaddr); 661 662 err = watchdog_set_timeout(timeout); 663 if (err) 664 return err; 665 err = watchdog_set_pulse_width(pulse_width); 666 if (err) 667 return err; 668 669 err = register_reboot_notifier(&watchdog_notifier); 670 if (err) 671 return err; 672 673 err = misc_register(&watchdog_miscdev); 674 if (err) { 675 printk(KERN_ERR DRVNAME 676 ": cannot register miscdev on minor=%d\n", 677 watchdog_miscdev.minor); 678 goto exit_reboot; 679 } 680 681 if (start_withtimeout) { 682 if (start_withtimeout <= 0 683 || start_withtimeout > max_timeout) { 684 printk(KERN_ERR DRVNAME 685 ": starting timeout out of range\n"); 686 err = -EINVAL; 687 goto exit_miscdev; 688 } 689 690 err = watchdog_start(); 691 if (err) { 692 printk(KERN_ERR DRVNAME 693 ": cannot start watchdog timer\n"); 694 goto exit_miscdev; 695 } 696 697 mutex_lock(&watchdog.lock); 698 err = superio_enter(sioaddr); 699 if (err) 700 goto exit_unlock; 701 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT); 702 703 if (start_withtimeout > 0xff) { 704 /* select minutes for timer units */ 705 superio_set_bit(sioaddr, F71808FG_REG_WDT_CONF, 706 F71808FG_FLAG_WD_UNIT); 707 superio_outb(sioaddr, F71808FG_REG_WD_TIME, 708 DIV_ROUND_UP(start_withtimeout, 60)); 709 } else { 710 /* select seconds for timer units */ 711 superio_clear_bit(sioaddr, F71808FG_REG_WDT_CONF, 712 F71808FG_FLAG_WD_UNIT); 713 superio_outb(sioaddr, F71808FG_REG_WD_TIME, 714 start_withtimeout); 715 } 716 717 superio_exit(sioaddr); 718 mutex_unlock(&watchdog.lock); 719 720 if (nowayout) 721 __module_get(THIS_MODULE); 722 723 printk(KERN_INFO DRVNAME 724 ": watchdog started with initial timeout of %u sec\n", 725 start_withtimeout); 726 } 727 728 return 0; 729 730 exit_unlock: 731 mutex_unlock(&watchdog.lock); 732 exit_miscdev: 733 misc_deregister(&watchdog_miscdev); 734 exit_reboot: 735 unregister_reboot_notifier(&watchdog_notifier); 736 737 return err; 738 } 739 740 static int __init f71808e_find(int sioaddr) 741 { 742 u16 devid; 743 int err = superio_enter(sioaddr); 744 if (err) 745 return err; 746 747 devid = superio_inw(sioaddr, SIO_REG_MANID); 748 if (devid != SIO_FINTEK_ID) { 749 pr_debug(DRVNAME ": Not a Fintek device\n"); 750 err = -ENODEV; 751 goto exit; 752 } 753 754 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID); 755 switch (devid) { 756 case SIO_F71808_ID: 757 watchdog.type = f71808fg; 758 break; 759 case SIO_F71862_ID: 760 watchdog.type = f71862fg; 761 err = f71862fg_pin_configure(0); /* validate module parameter */ 762 break; 763 case SIO_F71869_ID: 764 watchdog.type = f71869; 765 break; 766 case SIO_F71882_ID: 767 watchdog.type = f71882fg; 768 break; 769 case SIO_F71889_ID: 770 watchdog.type = f71889fg; 771 break; 772 case SIO_F71858_ID: 773 /* Confirmed (by datasheet) not to have a watchdog. */ 774 err = -ENODEV; 775 goto exit; 776 default: 777 printk(KERN_INFO DRVNAME ": Unrecognized Fintek device: %04x\n", 778 (unsigned int)devid); 779 err = -ENODEV; 780 goto exit; 781 } 782 783 printk(KERN_INFO DRVNAME ": Found %s watchdog chip, revision %d\n", 784 f71808e_names[watchdog.type], 785 (int)superio_inb(sioaddr, SIO_REG_DEVREV)); 786 exit: 787 superio_exit(sioaddr); 788 return err; 789 } 790 791 static int __init f71808e_init(void) 792 { 793 static const unsigned short addrs[] = { 0x2e, 0x4e }; 794 int err = -ENODEV; 795 int i; 796 797 for (i = 0; i < ARRAY_SIZE(addrs); i++) { 798 err = f71808e_find(addrs[i]); 799 if (err == 0) 800 break; 801 } 802 if (i == ARRAY_SIZE(addrs)) 803 return err; 804 805 return watchdog_init(addrs[i]); 806 } 807 808 static void __exit f71808e_exit(void) 809 { 810 if (watchdog_is_running()) { 811 printk(KERN_WARNING DRVNAME 812 ": Watchdog timer still running, stopping it\n"); 813 watchdog_stop(); 814 } 815 misc_deregister(&watchdog_miscdev); 816 unregister_reboot_notifier(&watchdog_notifier); 817 } 818 819 MODULE_DESCRIPTION("F71808E Watchdog Driver"); 820 MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>"); 821 MODULE_LICENSE("GPL"); 822 823 module_init(f71808e_init); 824 module_exit(f71808e_exit); 825