1 /* cpwd.c - driver implementation for hardware watchdog 2 * timers found on Sun Microsystems CP1400 and CP1500 boards. 3 * 4 * This device supports both the generic Linux watchdog 5 * interface and Solaris-compatible ioctls as best it is 6 * able. 7 * 8 * NOTE: CP1400 systems appear to have a defective intr_mask 9 * register on the PLD, preventing the disabling of 10 * timer interrupts. We use a timer to periodically 11 * reset 'stopped' watchdogs on affected platforms. 12 * 13 * Copyright (c) 2000 Eric Brower (ebrower@usa.net) 14 * Copyright (C) 2008 David S. Miller <davem@davemloft.net> 15 */ 16 17 #include <linux/kernel.h> 18 #include <linux/module.h> 19 #include <linux/fs.h> 20 #include <linux/errno.h> 21 #include <linux/major.h> 22 #include <linux/init.h> 23 #include <linux/miscdevice.h> 24 #include <linux/interrupt.h> 25 #include <linux/ioport.h> 26 #include <linux/timer.h> 27 #include <linux/smp_lock.h> 28 #include <linux/io.h> 29 #include <linux/of.h> 30 #include <linux/of_device.h> 31 #include <linux/uaccess.h> 32 33 #include <asm/irq.h> 34 #include <asm/watchdog.h> 35 36 #define DRIVER_NAME "cpwd" 37 #define PFX DRIVER_NAME ": " 38 39 #define WD_OBPNAME "watchdog" 40 #define WD_BADMODEL "SUNW,501-5336" 41 #define WD_BTIMEOUT (jiffies + (HZ * 1000)) 42 #define WD_BLIMIT 0xFFFF 43 44 #define WD0_MINOR 212 45 #define WD1_MINOR 213 46 #define WD2_MINOR 214 47 48 /* Internal driver definitions. */ 49 #define WD0_ID 0 50 #define WD1_ID 1 51 #define WD2_ID 2 52 #define WD_NUMDEVS 3 53 54 #define WD_INTR_OFF 0 55 #define WD_INTR_ON 1 56 57 #define WD_STAT_INIT 0x01 /* Watchdog timer is initialized */ 58 #define WD_STAT_BSTOP 0x02 /* Watchdog timer is brokenstopped */ 59 #define WD_STAT_SVCD 0x04 /* Watchdog interrupt occurred */ 60 61 /* Register value definitions 62 */ 63 #define WD0_INTR_MASK 0x01 /* Watchdog device interrupt masks */ 64 #define WD1_INTR_MASK 0x02 65 #define WD2_INTR_MASK 0x04 66 67 #define WD_S_RUNNING 0x01 /* Watchdog device status running */ 68 #define WD_S_EXPIRED 0x02 /* Watchdog device status expired */ 69 70 struct cpwd { 71 void __iomem *regs; 72 spinlock_t lock; 73 74 unsigned int irq; 75 76 unsigned long timeout; 77 bool enabled; 78 bool reboot; 79 bool broken; 80 bool initialized; 81 82 struct { 83 struct miscdevice misc; 84 void __iomem *regs; 85 u8 intr_mask; 86 u8 runstatus; 87 u16 timeout; 88 } devs[WD_NUMDEVS]; 89 }; 90 91 static struct cpwd *cpwd_device; 92 93 /* Sun uses Altera PLD EPF8820ATC144-4 94 * providing three hardware watchdogs: 95 * 96 * 1) RIC - sends an interrupt when triggered 97 * 2) XIR - asserts XIR_B_RESET when triggered, resets CPU 98 * 3) POR - asserts POR_B_RESET when triggered, resets CPU, backplane, board 99 * 100 *** Timer register block definition (struct wd_timer_regblk) 101 * 102 * dcntr and limit registers (halfword access): 103 * ------------------- 104 * | 15 | ...| 1 | 0 | 105 * ------------------- 106 * |- counter val -| 107 * ------------------- 108 * dcntr - Current 16-bit downcounter value. 109 * When downcounter reaches '0' watchdog expires. 110 * Reading this register resets downcounter with 111 * 'limit' value. 112 * limit - 16-bit countdown value in 1/10th second increments. 113 * Writing this register begins countdown with input value. 114 * Reading from this register does not affect counter. 115 * NOTES: After watchdog reset, dcntr and limit contain '1' 116 * 117 * status register (byte access): 118 * --------------------------- 119 * | 7 | ... | 2 | 1 | 0 | 120 * --------------+------------ 121 * |- UNUSED -| EXP | RUN | 122 * --------------------------- 123 * status- Bit 0 - Watchdog is running 124 * Bit 1 - Watchdog has expired 125 * 126 *** PLD register block definition (struct wd_pld_regblk) 127 * 128 * intr_mask register (byte access): 129 * --------------------------------- 130 * | 7 | ... | 3 | 2 | 1 | 0 | 131 * +-------------+------------------ 132 * |- UNUSED -| WD3 | WD2 | WD1 | 133 * --------------------------------- 134 * WD3 - 1 == Interrupt disabled for watchdog 3 135 * WD2 - 1 == Interrupt disabled for watchdog 2 136 * WD1 - 1 == Interrupt disabled for watchdog 1 137 * 138 * pld_status register (byte access): 139 * UNKNOWN, MAGICAL MYSTERY REGISTER 140 * 141 */ 142 #define WD_TIMER_REGSZ 16 143 #define WD0_OFF 0 144 #define WD1_OFF (WD_TIMER_REGSZ * 1) 145 #define WD2_OFF (WD_TIMER_REGSZ * 2) 146 #define PLD_OFF (WD_TIMER_REGSZ * 3) 147 148 #define WD_DCNTR 0x00 149 #define WD_LIMIT 0x04 150 #define WD_STATUS 0x08 151 152 #define PLD_IMASK (PLD_OFF + 0x00) 153 #define PLD_STATUS (PLD_OFF + 0x04) 154 155 static struct timer_list cpwd_timer; 156 157 static int wd0_timeout = 0; 158 static int wd1_timeout = 0; 159 static int wd2_timeout = 0; 160 161 module_param(wd0_timeout, int, 0); 162 MODULE_PARM_DESC(wd0_timeout, "Default watchdog0 timeout in 1/10secs"); 163 module_param(wd1_timeout, int, 0); 164 MODULE_PARM_DESC(wd1_timeout, "Default watchdog1 timeout in 1/10secs"); 165 module_param(wd2_timeout, int, 0); 166 MODULE_PARM_DESC(wd2_timeout, "Default watchdog2 timeout in 1/10secs"); 167 168 MODULE_AUTHOR("Eric Brower <ebrower@usa.net>"); 169 MODULE_DESCRIPTION("Hardware watchdog driver for Sun Microsystems CP1400/1500"); 170 MODULE_LICENSE("GPL"); 171 MODULE_SUPPORTED_DEVICE("watchdog"); 172 173 static void cpwd_writew(u16 val, void __iomem *addr) 174 { 175 writew(cpu_to_le16(val), addr); 176 } 177 static u16 cpwd_readw(void __iomem *addr) 178 { 179 u16 val = readw(addr); 180 181 return le16_to_cpu(val); 182 } 183 184 static void cpwd_writeb(u8 val, void __iomem *addr) 185 { 186 writeb(val, addr); 187 } 188 189 static u8 cpwd_readb(void __iomem *addr) 190 { 191 return readb(addr); 192 } 193 194 /* Enable or disable watchdog interrupts 195 * Because of the CP1400 defect this should only be 196 * called during initialzation or by wd_[start|stop]timer() 197 * 198 * index - sub-device index, or -1 for 'all' 199 * enable - non-zero to enable interrupts, zero to disable 200 */ 201 static void cpwd_toggleintr(struct cpwd *p, int index, int enable) 202 { 203 unsigned char curregs = cpwd_readb(p->regs + PLD_IMASK); 204 unsigned char setregs = 205 (index == -1) ? 206 (WD0_INTR_MASK | WD1_INTR_MASK | WD2_INTR_MASK) : 207 (p->devs[index].intr_mask); 208 209 if (enable == WD_INTR_ON) 210 curregs &= ~setregs; 211 else 212 curregs |= setregs; 213 214 cpwd_writeb(curregs, p->regs + PLD_IMASK); 215 } 216 217 /* Restarts timer with maximum limit value and 218 * does not unset 'brokenstop' value. 219 */ 220 static void cpwd_resetbrokentimer(struct cpwd *p, int index) 221 { 222 cpwd_toggleintr(p, index, WD_INTR_ON); 223 cpwd_writew(WD_BLIMIT, p->devs[index].regs + WD_LIMIT); 224 } 225 226 /* Timer method called to reset stopped watchdogs-- 227 * because of the PLD bug on CP1400, we cannot mask 228 * interrupts within the PLD so me must continually 229 * reset the timers ad infinitum. 230 */ 231 static void cpwd_brokentimer(unsigned long data) 232 { 233 struct cpwd *p = (struct cpwd *) data; 234 int id, tripped = 0; 235 236 /* kill a running timer instance, in case we 237 * were called directly instead of by kernel timer 238 */ 239 if (timer_pending(&cpwd_timer)) 240 del_timer(&cpwd_timer); 241 242 for (id = 0; id < WD_NUMDEVS; id++) { 243 if (p->devs[id].runstatus & WD_STAT_BSTOP) { 244 ++tripped; 245 cpwd_resetbrokentimer(p, id); 246 } 247 } 248 249 if (tripped) { 250 /* there is at least one timer brokenstopped-- reschedule */ 251 cpwd_timer.expires = WD_BTIMEOUT; 252 add_timer(&cpwd_timer); 253 } 254 } 255 256 /* Reset countdown timer with 'limit' value and continue countdown. 257 * This will not start a stopped timer. 258 */ 259 static void cpwd_pingtimer(struct cpwd *p, int index) 260 { 261 if (cpwd_readb(p->devs[index].regs + WD_STATUS) & WD_S_RUNNING) 262 cpwd_readw(p->devs[index].regs + WD_DCNTR); 263 } 264 265 /* Stop a running watchdog timer-- the timer actually keeps 266 * running, but the interrupt is masked so that no action is 267 * taken upon expiration. 268 */ 269 static void cpwd_stoptimer(struct cpwd *p, int index) 270 { 271 if (cpwd_readb(p->devs[index].regs + WD_STATUS) & WD_S_RUNNING) { 272 cpwd_toggleintr(p, index, WD_INTR_OFF); 273 274 if (p->broken) { 275 p->devs[index].runstatus |= WD_STAT_BSTOP; 276 cpwd_brokentimer((unsigned long) p); 277 } 278 } 279 } 280 281 /* Start a watchdog timer with the specified limit value 282 * If the watchdog is running, it will be restarted with 283 * the provided limit value. 284 * 285 * This function will enable interrupts on the specified 286 * watchdog. 287 */ 288 static void cpwd_starttimer(struct cpwd *p, int index) 289 { 290 if (p->broken) 291 p->devs[index].runstatus &= ~WD_STAT_BSTOP; 292 293 p->devs[index].runstatus &= ~WD_STAT_SVCD; 294 295 cpwd_writew(p->devs[index].timeout, p->devs[index].regs + WD_LIMIT); 296 cpwd_toggleintr(p, index, WD_INTR_ON); 297 } 298 299 static int cpwd_getstatus(struct cpwd *p, int index) 300 { 301 unsigned char stat = cpwd_readb(p->devs[index].regs + WD_STATUS); 302 unsigned char intr = cpwd_readb(p->devs[index].regs + PLD_IMASK); 303 unsigned char ret = WD_STOPPED; 304 305 /* determine STOPPED */ 306 if (!stat) 307 return ret; 308 309 /* determine EXPIRED vs FREERUN vs RUNNING */ 310 else if (WD_S_EXPIRED & stat) { 311 ret = WD_EXPIRED; 312 } else if (WD_S_RUNNING & stat) { 313 if (intr & p->devs[index].intr_mask) { 314 ret = WD_FREERUN; 315 } else { 316 /* Fudge WD_EXPIRED status for defective CP1400-- 317 * IF timer is running 318 * AND brokenstop is set 319 * AND an interrupt has been serviced 320 * we are WD_EXPIRED. 321 * 322 * IF timer is running 323 * AND brokenstop is set 324 * AND no interrupt has been serviced 325 * we are WD_FREERUN. 326 */ 327 if (p->broken && 328 (p->devs[index].runstatus & WD_STAT_BSTOP)) { 329 if (p->devs[index].runstatus & WD_STAT_SVCD) { 330 ret = WD_EXPIRED; 331 } else { 332 /* we could as well pretend 333 * we are expired */ 334 ret = WD_FREERUN; 335 } 336 } else { 337 ret = WD_RUNNING; 338 } 339 } 340 } 341 342 /* determine SERVICED */ 343 if (p->devs[index].runstatus & WD_STAT_SVCD) 344 ret |= WD_SERVICED; 345 346 return ret; 347 } 348 349 static irqreturn_t cpwd_interrupt(int irq, void *dev_id) 350 { 351 struct cpwd *p = dev_id; 352 353 /* Only WD0 will interrupt-- others are NMI and we won't 354 * see them here.... 355 */ 356 spin_lock_irq(&p->lock); 357 358 cpwd_stoptimer(p, WD0_ID); 359 p->devs[WD0_ID].runstatus |= WD_STAT_SVCD; 360 361 spin_unlock_irq(&p->lock); 362 363 return IRQ_HANDLED; 364 } 365 366 static int cpwd_open(struct inode *inode, struct file *f) 367 { 368 struct cpwd *p = cpwd_device; 369 370 lock_kernel(); 371 switch (iminor(inode)) { 372 case WD0_MINOR: 373 case WD1_MINOR: 374 case WD2_MINOR: 375 break; 376 377 default: 378 unlock_kernel(); 379 return -ENODEV; 380 } 381 382 /* Register IRQ on first open of device */ 383 if (!p->initialized) { 384 if (request_irq(p->irq, &cpwd_interrupt, 385 IRQF_SHARED, DRIVER_NAME, p)) { 386 printk(KERN_ERR PFX "Cannot register IRQ %d\n", 387 p->irq); 388 unlock_kernel(); 389 return -EBUSY; 390 } 391 p->initialized = true; 392 } 393 394 unlock_kernel(); 395 396 return nonseekable_open(inode, f); 397 } 398 399 static int cpwd_release(struct inode *inode, struct file *file) 400 { 401 return 0; 402 } 403 404 static long cpwd_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 405 { 406 static struct watchdog_info info = { 407 .options = WDIOF_SETTIMEOUT, 408 .firmware_version = 1, 409 .identity = DRIVER_NAME, 410 }; 411 void __user *argp = (void __user *)arg; 412 struct inode *inode = file->f_path.dentry->d_inode; 413 int index = iminor(inode) - WD0_MINOR; 414 struct cpwd *p = cpwd_device; 415 int setopt = 0; 416 417 switch (cmd) { 418 /* Generic Linux IOCTLs */ 419 case WDIOC_GETSUPPORT: 420 if (copy_to_user(argp, &info, sizeof(struct watchdog_info))) 421 return -EFAULT; 422 break; 423 424 case WDIOC_GETSTATUS: 425 case WDIOC_GETBOOTSTATUS: 426 if (put_user(0, (int __user *)argp)) 427 return -EFAULT; 428 break; 429 430 case WDIOC_KEEPALIVE: 431 cpwd_pingtimer(p, index); 432 break; 433 434 case WDIOC_SETOPTIONS: 435 if (copy_from_user(&setopt, argp, sizeof(unsigned int))) 436 return -EFAULT; 437 438 if (setopt & WDIOS_DISABLECARD) { 439 if (p->enabled) 440 return -EINVAL; 441 cpwd_stoptimer(p, index); 442 } else if (setopt & WDIOS_ENABLECARD) { 443 cpwd_starttimer(p, index); 444 } else { 445 return -EINVAL; 446 } 447 break; 448 449 /* Solaris-compatible IOCTLs */ 450 case WIOCGSTAT: 451 setopt = cpwd_getstatus(p, index); 452 if (copy_to_user(argp, &setopt, sizeof(unsigned int))) 453 return -EFAULT; 454 break; 455 456 case WIOCSTART: 457 cpwd_starttimer(p, index); 458 break; 459 460 case WIOCSTOP: 461 if (p->enabled) 462 return -EINVAL; 463 464 cpwd_stoptimer(p, index); 465 break; 466 467 default: 468 return -EINVAL; 469 } 470 471 return 0; 472 } 473 474 static long cpwd_compat_ioctl(struct file *file, unsigned int cmd, 475 unsigned long arg) 476 { 477 int rval = -ENOIOCTLCMD; 478 479 switch (cmd) { 480 /* solaris ioctls are specific to this driver */ 481 case WIOCSTART: 482 case WIOCSTOP: 483 case WIOCGSTAT: 484 lock_kernel(); 485 rval = cpwd_ioctl(file, cmd, arg); 486 unlock_kernel(); 487 break; 488 489 /* everything else is handled by the generic compat layer */ 490 default: 491 break; 492 } 493 494 return rval; 495 } 496 497 static ssize_t cpwd_write(struct file *file, const char __user *buf, 498 size_t count, loff_t *ppos) 499 { 500 struct inode *inode = file->f_path.dentry->d_inode; 501 struct cpwd *p = cpwd_device; 502 int index = iminor(inode); 503 504 if (count) { 505 cpwd_pingtimer(p, index); 506 return 1; 507 } 508 509 return 0; 510 } 511 512 static ssize_t cpwd_read(struct file *file, char __user *buffer, 513 size_t count, loff_t *ppos) 514 { 515 return -EINVAL; 516 } 517 518 static const struct file_operations cpwd_fops = { 519 .owner = THIS_MODULE, 520 .unlocked_ioctl = cpwd_ioctl, 521 .compat_ioctl = cpwd_compat_ioctl, 522 .open = cpwd_open, 523 .write = cpwd_write, 524 .read = cpwd_read, 525 .release = cpwd_release, 526 }; 527 528 static int __devinit cpwd_probe(struct of_device *op, 529 const struct of_device_id *match) 530 { 531 struct device_node *options; 532 const char *str_prop; 533 const void *prop_val; 534 int i, err = -EINVAL; 535 struct cpwd *p; 536 537 if (cpwd_device) 538 return -EINVAL; 539 540 p = kzalloc(sizeof(*p), GFP_KERNEL); 541 err = -ENOMEM; 542 if (!p) { 543 printk(KERN_ERR PFX "Unable to allocate struct cpwd.\n"); 544 goto out; 545 } 546 547 p->irq = op->irqs[0]; 548 549 spin_lock_init(&p->lock); 550 551 p->regs = of_ioremap(&op->resource[0], 0, 552 4 * WD_TIMER_REGSZ, DRIVER_NAME); 553 if (!p->regs) { 554 printk(KERN_ERR PFX "Unable to map registers.\n"); 555 goto out_free; 556 } 557 558 options = of_find_node_by_path("/options"); 559 err = -ENODEV; 560 if (!options) { 561 printk(KERN_ERR PFX "Unable to find /options node.\n"); 562 goto out_iounmap; 563 } 564 565 prop_val = of_get_property(options, "watchdog-enable?", NULL); 566 p->enabled = (prop_val ? true : false); 567 568 prop_val = of_get_property(options, "watchdog-reboot?", NULL); 569 p->reboot = (prop_val ? true : false); 570 571 str_prop = of_get_property(options, "watchdog-timeout", NULL); 572 if (str_prop) 573 p->timeout = simple_strtoul(str_prop, NULL, 10); 574 575 /* CP1400s seem to have broken PLD implementations-- the 576 * interrupt_mask register cannot be written, so no timer 577 * interrupts can be masked within the PLD. 578 */ 579 str_prop = of_get_property(op->node, "model", NULL); 580 p->broken = (str_prop && !strcmp(str_prop, WD_BADMODEL)); 581 582 if (!p->enabled) 583 cpwd_toggleintr(p, -1, WD_INTR_OFF); 584 585 for (i = 0; i < WD_NUMDEVS; i++) { 586 static const char *cpwd_names[] = { "RIC", "XIR", "POR" }; 587 static int *parms[] = { &wd0_timeout, 588 &wd1_timeout, 589 &wd2_timeout }; 590 struct miscdevice *mp = &p->devs[i].misc; 591 592 mp->minor = WD0_MINOR + i; 593 mp->name = cpwd_names[i]; 594 mp->fops = &cpwd_fops; 595 596 p->devs[i].regs = p->regs + (i * WD_TIMER_REGSZ); 597 p->devs[i].intr_mask = (WD0_INTR_MASK << i); 598 p->devs[i].runstatus &= ~WD_STAT_BSTOP; 599 p->devs[i].runstatus |= WD_STAT_INIT; 600 p->devs[i].timeout = p->timeout; 601 if (*parms[i]) 602 p->devs[i].timeout = *parms[i]; 603 604 err = misc_register(&p->devs[i].misc); 605 if (err) { 606 printk(KERN_ERR "Could not register misc device for " 607 "dev %d\n", i); 608 goto out_unregister; 609 } 610 } 611 612 if (p->broken) { 613 init_timer(&cpwd_timer); 614 cpwd_timer.function = cpwd_brokentimer; 615 cpwd_timer.data = (unsigned long) p; 616 cpwd_timer.expires = WD_BTIMEOUT; 617 618 printk(KERN_INFO PFX "PLD defect workaround enabled for " 619 "model " WD_BADMODEL ".\n"); 620 } 621 622 dev_set_drvdata(&op->dev, p); 623 cpwd_device = p; 624 err = 0; 625 626 out: 627 return err; 628 629 out_unregister: 630 for (i--; i >= 0; i--) 631 misc_deregister(&p->devs[i].misc); 632 633 out_iounmap: 634 of_iounmap(&op->resource[0], p->regs, 4 * WD_TIMER_REGSZ); 635 636 out_free: 637 kfree(p); 638 goto out; 639 } 640 641 static int __devexit cpwd_remove(struct of_device *op) 642 { 643 struct cpwd *p = dev_get_drvdata(&op->dev); 644 int i; 645 646 for (i = 0; i < 4; i++) { 647 misc_deregister(&p->devs[i].misc); 648 649 if (!p->enabled) { 650 cpwd_stoptimer(p, i); 651 if (p->devs[i].runstatus & WD_STAT_BSTOP) 652 cpwd_resetbrokentimer(p, i); 653 } 654 } 655 656 if (p->broken) 657 del_timer_sync(&cpwd_timer); 658 659 if (p->initialized) 660 free_irq(p->irq, p); 661 662 of_iounmap(&op->resource[0], p->regs, 4 * WD_TIMER_REGSZ); 663 kfree(p); 664 665 cpwd_device = NULL; 666 667 return 0; 668 } 669 670 static const struct of_device_id cpwd_match[] = { 671 { 672 .name = "watchdog", 673 }, 674 {}, 675 }; 676 MODULE_DEVICE_TABLE(of, cpwd_match); 677 678 static struct of_platform_driver cpwd_driver = { 679 .name = DRIVER_NAME, 680 .match_table = cpwd_match, 681 .probe = cpwd_probe, 682 .remove = __devexit_p(cpwd_remove), 683 }; 684 685 static int __init cpwd_init(void) 686 { 687 return of_register_driver(&cpwd_driver, &of_bus_type); 688 } 689 690 static void __exit cpwd_exit(void) 691 { 692 of_unregister_driver(&cpwd_driver); 693 } 694 695 module_init(cpwd_init); 696 module_exit(cpwd_exit); 697