1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Watchdog driver for Broadcom BCM2835
4  *
5  * "bcm2708_wdog" driver written by Luke Diamand that was obtained from
6  * branch "rpi-3.6.y" of git://github.com/raspberrypi/linux.git was used
7  * as a hardware reference for the Broadcom BCM2835 watchdog timer.
8  *
9  * Copyright (C) 2013 Lubomir Rintel <lkundrak@v3.sk>
10  *
11  */
12 
13 #include <linux/delay.h>
14 #include <linux/types.h>
15 #include <linux/mfd/bcm2835-pm.h>
16 #include <linux/module.h>
17 #include <linux/io.h>
18 #include <linux/watchdog.h>
19 #include <linux/platform_device.h>
20 #include <linux/of_address.h>
21 #include <linux/of_platform.h>
22 
23 #define PM_RSTC				0x1c
24 #define PM_RSTS				0x20
25 #define PM_WDOG				0x24
26 
27 #define PM_PASSWORD			0x5a000000
28 
29 #define PM_WDOG_TIME_SET		0x000fffff
30 #define PM_RSTC_WRCFG_CLR		0xffffffcf
31 #define PM_RSTS_HADWRH_SET		0x00000040
32 #define PM_RSTC_WRCFG_SET		0x00000030
33 #define PM_RSTC_WRCFG_FULL_RESET	0x00000020
34 #define PM_RSTC_RESET			0x00000102
35 
36 /*
37  * The Raspberry Pi firmware uses the RSTS register to know which partition
38  * to boot from. The partition value is spread into bits 0, 2, 4, 6, 8, 10.
39  * Partition 63 is a special partition used by the firmware to indicate halt.
40  */
41 #define PM_RSTS_RASPBERRYPI_HALT	0x555
42 
43 #define SECS_TO_WDOG_TICKS(x) ((x) << 16)
44 #define WDOG_TICKS_TO_SECS(x) ((x) >> 16)
45 
46 struct bcm2835_wdt {
47 	void __iomem		*base;
48 	spinlock_t		lock;
49 };
50 
51 static struct bcm2835_wdt *bcm2835_power_off_wdt;
52 
53 static unsigned int heartbeat;
54 static bool nowayout = WATCHDOG_NOWAYOUT;
55 
56 static bool bcm2835_wdt_is_running(struct bcm2835_wdt *wdt)
57 {
58 	uint32_t cur;
59 
60 	cur = readl(wdt->base + PM_RSTC);
61 
62 	return !!(cur & PM_RSTC_WRCFG_FULL_RESET);
63 }
64 
65 static int bcm2835_wdt_start(struct watchdog_device *wdog)
66 {
67 	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
68 	uint32_t cur;
69 	unsigned long flags;
70 
71 	spin_lock_irqsave(&wdt->lock, flags);
72 
73 	writel_relaxed(PM_PASSWORD | (SECS_TO_WDOG_TICKS(wdog->timeout) &
74 				PM_WDOG_TIME_SET), wdt->base + PM_WDOG);
75 	cur = readl_relaxed(wdt->base + PM_RSTC);
76 	writel_relaxed(PM_PASSWORD | (cur & PM_RSTC_WRCFG_CLR) |
77 		  PM_RSTC_WRCFG_FULL_RESET, wdt->base + PM_RSTC);
78 
79 	spin_unlock_irqrestore(&wdt->lock, flags);
80 
81 	return 0;
82 }
83 
84 static int bcm2835_wdt_stop(struct watchdog_device *wdog)
85 {
86 	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
87 
88 	writel_relaxed(PM_PASSWORD | PM_RSTC_RESET, wdt->base + PM_RSTC);
89 	return 0;
90 }
91 
92 static unsigned int bcm2835_wdt_get_timeleft(struct watchdog_device *wdog)
93 {
94 	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
95 
96 	uint32_t ret = readl_relaxed(wdt->base + PM_WDOG);
97 	return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
98 }
99 
100 static void __bcm2835_restart(struct bcm2835_wdt *wdt)
101 {
102 	u32 val;
103 
104 	/* use a timeout of 10 ticks (~150us) */
105 	writel_relaxed(10 | PM_PASSWORD, wdt->base + PM_WDOG);
106 	val = readl_relaxed(wdt->base + PM_RSTC);
107 	val &= PM_RSTC_WRCFG_CLR;
108 	val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET;
109 	writel_relaxed(val, wdt->base + PM_RSTC);
110 
111 	/* No sleeping, possibly atomic. */
112 	mdelay(1);
113 }
114 
115 static int bcm2835_restart(struct watchdog_device *wdog,
116 			   unsigned long action, void *data)
117 {
118 	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
119 
120 	__bcm2835_restart(wdt);
121 
122 	return 0;
123 }
124 
125 static const struct watchdog_ops bcm2835_wdt_ops = {
126 	.owner =	THIS_MODULE,
127 	.start =	bcm2835_wdt_start,
128 	.stop =		bcm2835_wdt_stop,
129 	.get_timeleft =	bcm2835_wdt_get_timeleft,
130 	.restart =	bcm2835_restart,
131 };
132 
133 static const struct watchdog_info bcm2835_wdt_info = {
134 	.options =	WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE |
135 			WDIOF_KEEPALIVEPING,
136 	.identity =	"Broadcom BCM2835 Watchdog timer",
137 };
138 
139 static struct watchdog_device bcm2835_wdt_wdd = {
140 	.info =		&bcm2835_wdt_info,
141 	.ops =		&bcm2835_wdt_ops,
142 	.min_timeout =	1,
143 	.max_timeout =	WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
144 	.timeout =	WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
145 };
146 
147 /*
148  * We can't really power off, but if we do the normal reset scheme, and
149  * indicate to bootcode.bin not to reboot, then most of the chip will be
150  * powered off.
151  */
152 static void bcm2835_power_off(void)
153 {
154 	struct bcm2835_wdt *wdt = bcm2835_power_off_wdt;
155 	u32 val;
156 
157 	/*
158 	 * We set the watchdog hard reset bit here to distinguish this reset
159 	 * from the normal (full) reset. bootcode.bin will not reboot after a
160 	 * hard reset.
161 	 */
162 	val = readl_relaxed(wdt->base + PM_RSTS);
163 	val |= PM_PASSWORD | PM_RSTS_RASPBERRYPI_HALT;
164 	writel_relaxed(val, wdt->base + PM_RSTS);
165 
166 	/* Continue with normal reset mechanism */
167 	__bcm2835_restart(wdt);
168 }
169 
170 static int bcm2835_wdt_probe(struct platform_device *pdev)
171 {
172 	struct bcm2835_pm *pm = dev_get_drvdata(pdev->dev.parent);
173 	struct device *dev = &pdev->dev;
174 	struct bcm2835_wdt *wdt;
175 	int err;
176 
177 	wdt = devm_kzalloc(dev, sizeof(struct bcm2835_wdt), GFP_KERNEL);
178 	if (!wdt)
179 		return -ENOMEM;
180 	platform_set_drvdata(pdev, wdt);
181 
182 	spin_lock_init(&wdt->lock);
183 
184 	wdt->base = pm->base;
185 
186 	watchdog_set_drvdata(&bcm2835_wdt_wdd, wdt);
187 	watchdog_init_timeout(&bcm2835_wdt_wdd, heartbeat, dev);
188 	watchdog_set_nowayout(&bcm2835_wdt_wdd, nowayout);
189 	bcm2835_wdt_wdd.parent = dev;
190 	if (bcm2835_wdt_is_running(wdt)) {
191 		/*
192 		 * The currently active timeout value (set by the
193 		 * bootloader) may be different from the module
194 		 * heartbeat parameter or the value in device
195 		 * tree. But we just need to set WDOG_HW_RUNNING,
196 		 * because then the framework will "immediately" ping
197 		 * the device, updating the timeout.
198 		 */
199 		set_bit(WDOG_HW_RUNNING, &bcm2835_wdt_wdd.status);
200 	}
201 
202 	watchdog_set_restart_priority(&bcm2835_wdt_wdd, 128);
203 
204 	watchdog_stop_on_reboot(&bcm2835_wdt_wdd);
205 	err = devm_watchdog_register_device(dev, &bcm2835_wdt_wdd);
206 	if (err) {
207 		dev_err(dev, "Failed to register watchdog device");
208 		return err;
209 	}
210 
211 	if (pm_power_off == NULL) {
212 		pm_power_off = bcm2835_power_off;
213 		bcm2835_power_off_wdt = wdt;
214 	}
215 
216 	dev_info(dev, "Broadcom BCM2835 watchdog timer");
217 	return 0;
218 }
219 
220 static int bcm2835_wdt_remove(struct platform_device *pdev)
221 {
222 	if (pm_power_off == bcm2835_power_off)
223 		pm_power_off = NULL;
224 
225 	return 0;
226 }
227 
228 static struct platform_driver bcm2835_wdt_driver = {
229 	.probe		= bcm2835_wdt_probe,
230 	.remove		= bcm2835_wdt_remove,
231 	.driver = {
232 		.name =		"bcm2835-wdt",
233 	},
234 };
235 module_platform_driver(bcm2835_wdt_driver);
236 
237 module_param(heartbeat, uint, 0);
238 MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");
239 
240 module_param(nowayout, bool, 0);
241 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
242 				__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
243 
244 MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
245 MODULE_DESCRIPTION("Driver for Broadcom BCM2835 watchdog timer");
246 MODULE_LICENSE("GPL");
247