1 /*
2  * Watchdog driver for Atmel AT91SAM9x processors.
3  *
4  * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version
9  * 2 of the License, or (at your option) any later version.
10  */
11 
12 /*
13  * The Watchdog Timer Mode Register can be only written to once. If the
14  * timeout need to be set from Linux, be sure that the bootstrap or the
15  * bootloader doesn't write to this register.
16  */
17 
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 
20 #include <linux/errno.h>
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
23 #include <linux/io.h>
24 #include <linux/kernel.h>
25 #include <linux/module.h>
26 #include <linux/moduleparam.h>
27 #include <linux/platform_device.h>
28 #include <linux/reboot.h>
29 #include <linux/types.h>
30 #include <linux/watchdog.h>
31 #include <linux/jiffies.h>
32 #include <linux/timer.h>
33 #include <linux/bitops.h>
34 #include <linux/uaccess.h>
35 #include <linux/of.h>
36 #include <linux/of_irq.h>
37 
38 #include "at91sam9_wdt.h"
39 
40 #define DRV_NAME "AT91SAM9 Watchdog"
41 
42 #define wdt_read(wdt, field) \
43 	__raw_readl((wdt)->base + (field))
44 #define wdt_write(wtd, field, val) \
45 	__raw_writel((val), (wdt)->base + (field))
46 
47 /* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
48  * use this to convert a watchdog
49  * value from/to milliseconds.
50  */
51 #define ticks_to_hz_rounddown(t)	((((t) + 1) * HZ) >> 8)
52 #define ticks_to_hz_roundup(t)		(((((t) + 1) * HZ) + 255) >> 8)
53 #define ticks_to_secs(t)		(((t) + 1) >> 8)
54 #define secs_to_ticks(s)		((s) ? (((s) << 8) - 1) : 0)
55 
56 #define WDT_MR_RESET	0x3FFF2FFF
57 
58 /* Watchdog max counter value in ticks */
59 #define WDT_COUNTER_MAX_TICKS	0xFFF
60 
61 /* Watchdog max delta/value in secs */
62 #define WDT_COUNTER_MAX_SECS	ticks_to_secs(WDT_COUNTER_MAX_TICKS)
63 
64 /* Hardware timeout in seconds */
65 #define WDT_HW_TIMEOUT 2
66 
67 /* Timer heartbeat (500ms) */
68 #define WDT_TIMEOUT	(HZ/2)
69 
70 /* User land timeout */
71 #define WDT_HEARTBEAT 15
72 static int heartbeat;
73 module_param(heartbeat, int, 0);
74 MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
75 	"(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
76 
77 static bool nowayout = WATCHDOG_NOWAYOUT;
78 module_param(nowayout, bool, 0);
79 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
80 	"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
81 
82 #define to_wdt(wdd) container_of(wdd, struct at91wdt, wdd)
83 struct at91wdt {
84 	struct watchdog_device wdd;
85 	void __iomem *base;
86 	unsigned long next_heartbeat;	/* the next_heartbeat for the timer */
87 	struct timer_list timer;	/* The timer that pings the watchdog */
88 	u32 mr;
89 	u32 mr_mask;
90 	unsigned long heartbeat;	/* WDT heartbeat in jiffies */
91 	bool nowayout;
92 	unsigned int irq;
93 };
94 
95 /* ......................................................................... */
96 
97 static irqreturn_t wdt_interrupt(int irq, void *dev_id)
98 {
99 	struct at91wdt *wdt = (struct at91wdt *)dev_id;
100 
101 	if (wdt_read(wdt, AT91_WDT_SR)) {
102 		pr_crit("at91sam9 WDT software reset\n");
103 		emergency_restart();
104 		pr_crit("Reboot didn't ?????\n");
105 	}
106 
107 	return IRQ_HANDLED;
108 }
109 
110 /*
111  * Reload the watchdog timer.  (ie, pat the watchdog)
112  */
113 static inline void at91_wdt_reset(struct at91wdt *wdt)
114 {
115 	wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
116 }
117 
118 /*
119  * Timer tick
120  */
121 static void at91_ping(unsigned long data)
122 {
123 	struct at91wdt *wdt = (struct at91wdt *)data;
124 	if (time_before(jiffies, wdt->next_heartbeat) ||
125 	    !watchdog_active(&wdt->wdd)) {
126 		at91_wdt_reset(wdt);
127 		mod_timer(&wdt->timer, jiffies + wdt->heartbeat);
128 	} else {
129 		pr_crit("I will reset your machine !\n");
130 	}
131 }
132 
133 static int at91_wdt_start(struct watchdog_device *wdd)
134 {
135 	struct at91wdt *wdt = to_wdt(wdd);
136 	/* calculate when the next userspace timeout will be */
137 	wdt->next_heartbeat = jiffies + wdd->timeout * HZ;
138 	return 0;
139 }
140 
141 static int at91_wdt_stop(struct watchdog_device *wdd)
142 {
143 	/* The watchdog timer hardware can not be stopped... */
144 	return 0;
145 }
146 
147 static int at91_wdt_set_timeout(struct watchdog_device *wdd, unsigned int new_timeout)
148 {
149 	wdd->timeout = new_timeout;
150 	return at91_wdt_start(wdd);
151 }
152 
153 static int at91_wdt_init(struct platform_device *pdev, struct at91wdt *wdt)
154 {
155 	u32 tmp;
156 	u32 delta;
157 	u32 value;
158 	int err;
159 	u32 mask = wdt->mr_mask;
160 	unsigned long min_heartbeat = 1;
161 	struct device *dev = &pdev->dev;
162 
163 	tmp = wdt_read(wdt, AT91_WDT_MR);
164 	if ((tmp & mask) != (wdt->mr & mask)) {
165 		if (tmp == WDT_MR_RESET) {
166 			wdt_write(wdt, AT91_WDT_MR, wdt->mr);
167 			tmp = wdt_read(wdt, AT91_WDT_MR);
168 		}
169 	}
170 
171 	if (tmp & AT91_WDT_WDDIS) {
172 		if (wdt->mr & AT91_WDT_WDDIS)
173 			return 0;
174 		dev_err(dev, "watchdog is disabled\n");
175 		return -EINVAL;
176 	}
177 
178 	value = tmp & AT91_WDT_WDV;
179 	delta = (tmp & AT91_WDT_WDD) >> 16;
180 
181 	if (delta < value)
182 		min_heartbeat = ticks_to_hz_roundup(value - delta);
183 
184 	wdt->heartbeat = ticks_to_hz_rounddown(value);
185 	if (!wdt->heartbeat) {
186 		dev_err(dev,
187 			"heartbeat is too small for the system to handle it correctly\n");
188 		return -EINVAL;
189 	}
190 
191 	if (wdt->heartbeat < min_heartbeat + 4) {
192 		wdt->heartbeat = min_heartbeat;
193 		dev_warn(dev,
194 			 "min heartbeat and max heartbeat might be too close for the system to handle it correctly\n");
195 		if (wdt->heartbeat < 4)
196 			dev_warn(dev,
197 				 "heartbeat might be too small for the system to handle it correctly\n");
198 	} else {
199 		wdt->heartbeat -= 4;
200 	}
201 
202 	if ((tmp & AT91_WDT_WDFIEN) && wdt->irq) {
203 		err = request_irq(wdt->irq, wdt_interrupt,
204 				  IRQF_SHARED | IRQF_IRQPOLL,
205 				  pdev->name, wdt);
206 		if (err)
207 			return err;
208 	}
209 
210 	if ((tmp & wdt->mr_mask) != (wdt->mr & wdt->mr_mask))
211 		dev_warn(dev,
212 			 "watchdog already configured differently (mr = %x expecting %x)\n",
213 			 tmp & wdt->mr_mask, wdt->mr & wdt->mr_mask);
214 
215 	setup_timer(&wdt->timer, at91_ping, (unsigned long)wdt);
216 	mod_timer(&wdt->timer, jiffies + wdt->heartbeat);
217 
218 	/* Try to set timeout from device tree first */
219 	if (watchdog_init_timeout(&wdt->wdd, 0, dev))
220 		watchdog_init_timeout(&wdt->wdd, heartbeat, dev);
221 	watchdog_set_nowayout(&wdt->wdd, wdt->nowayout);
222 	err = watchdog_register_device(&wdt->wdd);
223 	if (err)
224 		goto out_stop_timer;
225 
226 	wdt->next_heartbeat = jiffies + wdt->wdd.timeout * HZ;
227 
228 	return 0;
229 
230 out_stop_timer:
231 	del_timer(&wdt->timer);
232 	return err;
233 }
234 
235 /* ......................................................................... */
236 
237 static const struct watchdog_info at91_wdt_info = {
238 	.identity	= DRV_NAME,
239 	.options	= WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
240 						WDIOF_MAGICCLOSE,
241 };
242 
243 static const struct watchdog_ops at91_wdt_ops = {
244 	.owner =	THIS_MODULE,
245 	.start =	at91_wdt_start,
246 	.stop =		at91_wdt_stop,
247 	.set_timeout =	at91_wdt_set_timeout,
248 };
249 
250 #if defined(CONFIG_OF)
251 static int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt)
252 {
253 	u32 min = 0;
254 	u32 max = WDT_COUNTER_MAX_SECS;
255 	const char *tmp;
256 
257 	/* Get the interrupts property */
258 	wdt->irq = irq_of_parse_and_map(np, 0);
259 	if (!wdt->irq)
260 		dev_warn(wdt->wdd.parent, "failed to get IRQ from DT\n");
261 
262 	if (!of_property_read_u32_index(np, "atmel,max-heartbeat-sec", 0,
263 					&max)) {
264 		if (!max || max > WDT_COUNTER_MAX_SECS)
265 			max = WDT_COUNTER_MAX_SECS;
266 
267 		if (!of_property_read_u32_index(np, "atmel,min-heartbeat-sec",
268 						0, &min)) {
269 			if (min >= max)
270 				min = max - 1;
271 		}
272 	}
273 
274 	min = secs_to_ticks(min);
275 	max = secs_to_ticks(max);
276 
277 	wdt->mr_mask = 0x3FFFFFFF;
278 	wdt->mr = 0;
279 	if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&
280 	    !strcmp(tmp, "software")) {
281 		wdt->mr |= AT91_WDT_WDFIEN;
282 		wdt->mr_mask &= ~AT91_WDT_WDRPROC;
283 	} else {
284 		wdt->mr |= AT91_WDT_WDRSTEN;
285 	}
286 
287 	if (!of_property_read_string(np, "atmel,reset-type", &tmp) &&
288 	    !strcmp(tmp, "proc"))
289 		wdt->mr |= AT91_WDT_WDRPROC;
290 
291 	if (of_property_read_bool(np, "atmel,disable")) {
292 		wdt->mr |= AT91_WDT_WDDIS;
293 		wdt->mr_mask &= AT91_WDT_WDDIS;
294 	}
295 
296 	if (of_property_read_bool(np, "atmel,idle-halt"))
297 		wdt->mr |= AT91_WDT_WDIDLEHLT;
298 
299 	if (of_property_read_bool(np, "atmel,dbg-halt"))
300 		wdt->mr |= AT91_WDT_WDDBGHLT;
301 
302 	wdt->mr |= max | ((max - min) << 16);
303 
304 	return 0;
305 }
306 #else
307 static inline int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt)
308 {
309 	return 0;
310 }
311 #endif
312 
313 static int __init at91wdt_probe(struct platform_device *pdev)
314 {
315 	struct resource	*r;
316 	int err;
317 	struct at91wdt *wdt;
318 
319 	wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
320 	if (!wdt)
321 		return -ENOMEM;
322 
323 	wdt->mr = (WDT_HW_TIMEOUT * 256) | AT91_WDT_WDRSTEN | AT91_WDT_WDD |
324 		  AT91_WDT_WDDBGHLT | AT91_WDT_WDIDLEHLT;
325 	wdt->mr_mask = 0x3FFFFFFF;
326 	wdt->nowayout = nowayout;
327 	wdt->wdd.parent = &pdev->dev;
328 	wdt->wdd.info = &at91_wdt_info;
329 	wdt->wdd.ops = &at91_wdt_ops;
330 	wdt->wdd.timeout = WDT_HEARTBEAT;
331 	wdt->wdd.min_timeout = 1;
332 	wdt->wdd.max_timeout = 0xFFFF;
333 
334 	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
335 	wdt->base = devm_ioremap_resource(&pdev->dev, r);
336 	if (IS_ERR(wdt->base))
337 		return PTR_ERR(wdt->base);
338 
339 	if (pdev->dev.of_node) {
340 		err = of_at91wdt_init(pdev->dev.of_node, wdt);
341 		if (err)
342 			return err;
343 	}
344 
345 	err = at91_wdt_init(pdev, wdt);
346 	if (err)
347 		return err;
348 
349 	platform_set_drvdata(pdev, wdt);
350 
351 	pr_info("enabled (heartbeat=%d sec, nowayout=%d)\n",
352 		wdt->wdd.timeout, wdt->nowayout);
353 
354 	return 0;
355 }
356 
357 static int __exit at91wdt_remove(struct platform_device *pdev)
358 {
359 	struct at91wdt *wdt = platform_get_drvdata(pdev);
360 	watchdog_unregister_device(&wdt->wdd);
361 
362 	pr_warn("I quit now, hardware will probably reboot!\n");
363 	del_timer(&wdt->timer);
364 
365 	return 0;
366 }
367 
368 #if defined(CONFIG_OF)
369 static const struct of_device_id at91_wdt_dt_ids[] = {
370 	{ .compatible = "atmel,at91sam9260-wdt" },
371 	{ /* sentinel */ }
372 };
373 
374 MODULE_DEVICE_TABLE(of, at91_wdt_dt_ids);
375 #endif
376 
377 static struct platform_driver at91wdt_driver = {
378 	.remove		= __exit_p(at91wdt_remove),
379 	.driver		= {
380 		.name	= "at91_wdt",
381 		.owner	= THIS_MODULE,
382 		.of_match_table = of_match_ptr(at91_wdt_dt_ids),
383 	},
384 };
385 
386 module_platform_driver_probe(at91wdt_driver, at91wdt_probe);
387 
388 MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>");
389 MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");
390 MODULE_LICENSE("GPL");
391