xref: /openbmc/linux/drivers/w1/slaves/w1_ds2781.h (revision 1ab142d4)
1 /*
2  * 1-Wire implementation for the ds2780 chip
3  *
4  * Author: Renata Sayakhova <renata@oktetlabs.ru>
5  *
6  * Based on w1-ds2760 driver
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  */
13 
14 #ifndef _W1_DS2781_H
15 #define _W1_DS2781_H
16 
17 /* Function commands */
18 #define W1_DS2781_READ_DATA		0x69
19 #define W1_DS2781_WRITE_DATA		0x6C
20 #define W1_DS2781_COPY_DATA		0x48
21 #define W1_DS2781_RECALL_DATA		0xB8
22 #define W1_DS2781_LOCK			0x6A
23 
24 /* Register map */
25 /* Register 0x00 Reserved */
26 #define DS2781_STATUS			0x01
27 #define DS2781_RAAC_MSB			0x02
28 #define DS2781_RAAC_LSB			0x03
29 #define DS2781_RSAC_MSB			0x04
30 #define DS2781_RSAC_LSB			0x05
31 #define DS2781_RARC			0x06
32 #define DS2781_RSRC			0x07
33 #define DS2781_IAVG_MSB			0x08
34 #define DS2781_IAVG_LSB			0x09
35 #define DS2781_TEMP_MSB			0x0A
36 #define DS2781_TEMP_LSB			0x0B
37 #define DS2781_VOLT_MSB			0x0C
38 #define DS2781_VOLT_LSB			0x0D
39 #define DS2781_CURRENT_MSB		0x0E
40 #define DS2781_CURRENT_LSB		0x0F
41 #define DS2781_ACR_MSB			0x10
42 #define DS2781_ACR_LSB			0x11
43 #define DS2781_ACRL_MSB			0x12
44 #define DS2781_ACRL_LSB			0x13
45 #define DS2781_AS			0x14
46 #define DS2781_SFR			0x15
47 #define DS2781_FULL_MSB			0x16
48 #define DS2781_FULL_LSB			0x17
49 #define DS2781_AE_MSB			0x18
50 #define DS2781_AE_LSB			0x19
51 #define DS2781_SE_MSB			0x1A
52 #define DS2781_SE_LSB			0x1B
53 /* Register 0x1C - 0x1E Reserved */
54 #define DS2781_EEPROM		0x1F
55 #define DS2781_EEPROM_BLOCK0_START	0x20
56 /* Register 0x20 - 0x2F User EEPROM */
57 #define DS2781_EEPROM_BLOCK0_END	0x2F
58 /* Register 0x30 - 0x5F Reserved */
59 #define DS2781_EEPROM_BLOCK1_START	0x60
60 #define DS2781_CONTROL			0x60
61 #define DS2781_AB			0x61
62 #define DS2781_AC_MSB			0x62
63 #define DS2781_AC_LSB			0x63
64 #define DS2781_VCHG			0x64
65 #define DS2781_IMIN			0x65
66 #define DS2781_VAE			0x66
67 #define DS2781_IAE			0x67
68 #define DS2781_AE_40			0x68
69 #define DS2781_RSNSP			0x69
70 #define DS2781_FULL_40_MSB		0x6A
71 #define DS2781_FULL_40_LSB		0x6B
72 #define DS2781_FULL_4_SLOPE		0x6C
73 #define DS2781_FULL_3_SLOPE		0x6D
74 #define DS2781_FULL_2_SLOPE		0x6E
75 #define DS2781_FULL_1_SLOPE		0x6F
76 #define DS2781_AE_4_SLOPE		0x70
77 #define DS2781_AE_3_SLOPE		0x71
78 #define DS2781_AE_2_SLOPE		0x72
79 #define DS2781_AE_1_SLOPE		0x73
80 #define DS2781_SE_4_SLOPE		0x74
81 #define DS2781_SE_3_SLOPE		0x75
82 #define DS2781_SE_2_SLOPE		0x76
83 #define DS2781_SE_1_SLOPE		0x77
84 #define DS2781_RSGAIN_MSB		0x78
85 #define DS2781_RSGAIN_LSB		0x79
86 #define DS2781_RSTC			0x7A
87 #define DS2781_COB			0x7B
88 #define DS2781_TBP34			0x7C
89 #define DS2781_TBP23			0x7D
90 #define DS2781_TBP12			0x7E
91 #define DS2781_EEPROM_BLOCK1_END	0x7F
92 /* Register 0x7D - 0xFF Reserved */
93 
94 #define DS2781_FSGAIN_MSB		0xB0
95 #define DS2781_FSGAIN_LSB		0xB1
96 
97 /* Number of valid register addresses */
98 #define DS2781_DATA_SIZE		0xB2
99 
100 /* Status register bits */
101 #define DS2781_STATUS_CHGTF		(1 << 7)
102 #define DS2781_STATUS_AEF		(1 << 6)
103 #define DS2781_STATUS_SEF		(1 << 5)
104 #define DS2781_STATUS_LEARNF		(1 << 4)
105 /* Bit 3 Reserved */
106 #define DS2781_STATUS_UVF		(1 << 2)
107 #define DS2781_STATUS_PORF		(1 << 1)
108 /* Bit 0 Reserved */
109 
110 /* Control register bits */
111 /* Bit 7 Reserved */
112 #define DS2781_CONTROL_NBEN		(1 << 7)
113 #define DS2781_CONTROL_UVEN		(1 << 6)
114 #define DS2781_CONTROL_PMOD		(1 << 5)
115 #define DS2781_CONTROL_RNAOP		(1 << 4)
116 #define DS1781_CONTROL_UVTH		(1 << 3)
117 /* Bit 0 - 2 Reserved */
118 
119 /* Special feature register bits */
120 /* Bit 1 - 7 Reserved */
121 #define DS2781_SFR_PIOSC		(1 << 0)
122 
123 /* EEPROM register bits */
124 #define DS2781_EEPROM_EEC		(1 << 7)
125 #define DS2781_EEPROM_LOCK		(1 << 6)
126 /* Bit 2 - 6 Reserved */
127 #define DS2781_EEPROM_BL1		(1 << 1)
128 #define DS2781_EEPROM_BL0		(1 << 0)
129 
130 extern int w1_ds2781_io(struct device *dev, char *buf, int addr, size_t count,
131 			int io);
132 extern int w1_ds2781_io_nolock(struct device *dev, char *buf, int addr,
133 			size_t count, int io);
134 extern int w1_ds2781_eeprom_cmd(struct device *dev, int addr, int cmd);
135 
136 #endif /* !_W1_DS2781_H */
137