1 /* 2 * linux/drivers/video/vt8623fb.c - fbdev driver for 3 * integrated graphic core in VIA VT8623 [CLE266] chipset 4 * 5 * Copyright (c) 2006-2007 Ondrej Zajicek <santiago@crfreenet.org> 6 * 7 * This file is subject to the terms and conditions of the GNU General Public 8 * License. See the file COPYING in the main directory of this archive for 9 * more details. 10 * 11 * Code is based on s3fb, some parts are from David Boucher's viafb 12 * (http://davesdomain.org.uk/viafb/) 13 */ 14 15 #include <linux/module.h> 16 #include <linux/kernel.h> 17 #include <linux/errno.h> 18 #include <linux/string.h> 19 #include <linux/mm.h> 20 #include <linux/tty.h> 21 #include <linux/delay.h> 22 #include <linux/fb.h> 23 #include <linux/svga.h> 24 #include <linux/init.h> 25 #include <linux/pci.h> 26 #include <linux/console.h> /* Why should fb driver call console functions? because console_lock() */ 27 #include <video/vga.h> 28 29 struct vt8623fb_info { 30 char __iomem *mmio_base; 31 int wc_cookie; 32 struct vgastate state; 33 struct mutex open_lock; 34 unsigned int ref_count; 35 u32 pseudo_palette[16]; 36 }; 37 38 39 40 /* ------------------------------------------------------------------------- */ 41 42 static const struct svga_fb_format vt8623fb_formats[] = { 43 { 0, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, 44 FB_TYPE_TEXT, FB_AUX_TEXT_SVGA_STEP8, FB_VISUAL_PSEUDOCOLOR, 16, 16}, 45 { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, 46 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 16, 16}, 47 { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 1, 48 FB_TYPE_INTERLEAVED_PLANES, 1, FB_VISUAL_PSEUDOCOLOR, 16, 16}, 49 { 8, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, 50 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 8, 8}, 51 /* {16, {10, 5, 0}, {5, 5, 0}, {0, 5, 0}, {0, 0, 0}, 0, 52 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 4, 4}, */ 53 {16, {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, 0, 54 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 4, 4}, 55 {32, {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0, 56 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 2, 2}, 57 SVGA_FORMAT_END 58 }; 59 60 static const struct svga_pll vt8623_pll = {2, 127, 2, 7, 0, 3, 61 60000, 300000, 14318}; 62 63 /* CRT timing register sets */ 64 65 static struct vga_regset vt8623_h_total_regs[] = {{0x00, 0, 7}, {0x36, 3, 3}, VGA_REGSET_END}; 66 static struct vga_regset vt8623_h_display_regs[] = {{0x01, 0, 7}, VGA_REGSET_END}; 67 static struct vga_regset vt8623_h_blank_start_regs[] = {{0x02, 0, 7}, VGA_REGSET_END}; 68 static struct vga_regset vt8623_h_blank_end_regs[] = {{0x03, 0, 4}, {0x05, 7, 7}, {0x33, 5, 5}, VGA_REGSET_END}; 69 static struct vga_regset vt8623_h_sync_start_regs[] = {{0x04, 0, 7}, {0x33, 4, 4}, VGA_REGSET_END}; 70 static struct vga_regset vt8623_h_sync_end_regs[] = {{0x05, 0, 4}, VGA_REGSET_END}; 71 72 static struct vga_regset vt8623_v_total_regs[] = {{0x06, 0, 7}, {0x07, 0, 0}, {0x07, 5, 5}, {0x35, 0, 0}, VGA_REGSET_END}; 73 static struct vga_regset vt8623_v_display_regs[] = {{0x12, 0, 7}, {0x07, 1, 1}, {0x07, 6, 6}, {0x35, 2, 2}, VGA_REGSET_END}; 74 static struct vga_regset vt8623_v_blank_start_regs[] = {{0x15, 0, 7}, {0x07, 3, 3}, {0x09, 5, 5}, {0x35, 3, 3}, VGA_REGSET_END}; 75 static struct vga_regset vt8623_v_blank_end_regs[] = {{0x16, 0, 7}, VGA_REGSET_END}; 76 static struct vga_regset vt8623_v_sync_start_regs[] = {{0x10, 0, 7}, {0x07, 2, 2}, {0x07, 7, 7}, {0x35, 1, 1}, VGA_REGSET_END}; 77 static struct vga_regset vt8623_v_sync_end_regs[] = {{0x11, 0, 3}, VGA_REGSET_END}; 78 79 static struct vga_regset vt8623_offset_regs[] = {{0x13, 0, 7}, {0x35, 5, 7}, VGA_REGSET_END}; 80 static struct vga_regset vt8623_line_compare_regs[] = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, {0x33, 0, 2}, {0x35, 4, 4}, VGA_REGSET_END}; 81 static struct vga_regset vt8623_fetch_count_regs[] = {{0x1C, 0, 7}, {0x1D, 0, 1}, VGA_REGSET_END}; 82 static struct vga_regset vt8623_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x34, 0, 7}, {0x48, 0, 1}, VGA_REGSET_END}; 83 84 static const struct svga_timing_regs vt8623_timing_regs = { 85 vt8623_h_total_regs, vt8623_h_display_regs, vt8623_h_blank_start_regs, 86 vt8623_h_blank_end_regs, vt8623_h_sync_start_regs, vt8623_h_sync_end_regs, 87 vt8623_v_total_regs, vt8623_v_display_regs, vt8623_v_blank_start_regs, 88 vt8623_v_blank_end_regs, vt8623_v_sync_start_regs, vt8623_v_sync_end_regs, 89 }; 90 91 92 /* ------------------------------------------------------------------------- */ 93 94 95 /* Module parameters */ 96 97 static char *mode_option = "640x480-8@60"; 98 static int mtrr = 1; 99 100 MODULE_AUTHOR("(c) 2006 Ondrej Zajicek <santiago@crfreenet.org>"); 101 MODULE_LICENSE("GPL"); 102 MODULE_DESCRIPTION("fbdev driver for integrated graphics core in VIA VT8623 [CLE266]"); 103 104 module_param(mode_option, charp, 0644); 105 MODULE_PARM_DESC(mode_option, "Default video mode ('640x480-8@60', etc)"); 106 module_param_named(mode, mode_option, charp, 0); 107 MODULE_PARM_DESC(mode, "Default video mode e.g. '648x480-8@60' (deprecated)"); 108 module_param(mtrr, int, 0444); 109 MODULE_PARM_DESC(mtrr, "Enable write-combining with MTRR (1=enable, 0=disable, default=1)"); 110 111 112 /* ------------------------------------------------------------------------- */ 113 114 static void vt8623fb_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor) 115 { 116 struct vt8623fb_info *par = info->par; 117 118 svga_tilecursor(par->state.vgabase, info, cursor); 119 } 120 121 static struct fb_tile_ops vt8623fb_tile_ops = { 122 .fb_settile = svga_settile, 123 .fb_tilecopy = svga_tilecopy, 124 .fb_tilefill = svga_tilefill, 125 .fb_tileblit = svga_tileblit, 126 .fb_tilecursor = vt8623fb_tilecursor, 127 .fb_get_tilemax = svga_get_tilemax, 128 }; 129 130 131 /* ------------------------------------------------------------------------- */ 132 133 134 /* image data is MSB-first, fb structure is MSB-first too */ 135 static inline u32 expand_color(u32 c) 136 { 137 return ((c & 1) | ((c & 2) << 7) | ((c & 4) << 14) | ((c & 8) << 21)) * 0xFF; 138 } 139 140 /* vt8623fb_iplan_imageblit silently assumes that almost everything is 8-pixel aligned */ 141 static void vt8623fb_iplan_imageblit(struct fb_info *info, const struct fb_image *image) 142 { 143 u32 fg = expand_color(image->fg_color); 144 u32 bg = expand_color(image->bg_color); 145 const u8 *src1, *src; 146 u8 __iomem *dst1; 147 u32 __iomem *dst; 148 u32 val; 149 int x, y; 150 151 src1 = image->data; 152 dst1 = info->screen_base + (image->dy * info->fix.line_length) 153 + ((image->dx / 8) * 4); 154 155 for (y = 0; y < image->height; y++) { 156 src = src1; 157 dst = (u32 __iomem *) dst1; 158 for (x = 0; x < image->width; x += 8) { 159 val = *(src++) * 0x01010101; 160 val = (val & fg) | (~val & bg); 161 fb_writel(val, dst++); 162 } 163 src1 += image->width / 8; 164 dst1 += info->fix.line_length; 165 } 166 } 167 168 /* vt8623fb_iplan_fillrect silently assumes that almost everything is 8-pixel aligned */ 169 static void vt8623fb_iplan_fillrect(struct fb_info *info, const struct fb_fillrect *rect) 170 { 171 u32 fg = expand_color(rect->color); 172 u8 __iomem *dst1; 173 u32 __iomem *dst; 174 int x, y; 175 176 dst1 = info->screen_base + (rect->dy * info->fix.line_length) 177 + ((rect->dx / 8) * 4); 178 179 for (y = 0; y < rect->height; y++) { 180 dst = (u32 __iomem *) dst1; 181 for (x = 0; x < rect->width; x += 8) { 182 fb_writel(fg, dst++); 183 } 184 dst1 += info->fix.line_length; 185 } 186 } 187 188 189 /* image data is MSB-first, fb structure is high-nibble-in-low-byte-first */ 190 static inline u32 expand_pixel(u32 c) 191 { 192 return (((c & 1) << 24) | ((c & 2) << 27) | ((c & 4) << 14) | ((c & 8) << 17) | 193 ((c & 16) << 4) | ((c & 32) << 7) | ((c & 64) >> 6) | ((c & 128) >> 3)) * 0xF; 194 } 195 196 /* vt8623fb_cfb4_imageblit silently assumes that almost everything is 8-pixel aligned */ 197 static void vt8623fb_cfb4_imageblit(struct fb_info *info, const struct fb_image *image) 198 { 199 u32 fg = image->fg_color * 0x11111111; 200 u32 bg = image->bg_color * 0x11111111; 201 const u8 *src1, *src; 202 u8 __iomem *dst1; 203 u32 __iomem *dst; 204 u32 val; 205 int x, y; 206 207 src1 = image->data; 208 dst1 = info->screen_base + (image->dy * info->fix.line_length) 209 + ((image->dx / 8) * 4); 210 211 for (y = 0; y < image->height; y++) { 212 src = src1; 213 dst = (u32 __iomem *) dst1; 214 for (x = 0; x < image->width; x += 8) { 215 val = expand_pixel(*(src++)); 216 val = (val & fg) | (~val & bg); 217 fb_writel(val, dst++); 218 } 219 src1 += image->width / 8; 220 dst1 += info->fix.line_length; 221 } 222 } 223 224 static void vt8623fb_imageblit(struct fb_info *info, const struct fb_image *image) 225 { 226 if ((info->var.bits_per_pixel == 4) && (image->depth == 1) 227 && ((image->width % 8) == 0) && ((image->dx % 8) == 0)) { 228 if (info->fix.type == FB_TYPE_INTERLEAVED_PLANES) 229 vt8623fb_iplan_imageblit(info, image); 230 else 231 vt8623fb_cfb4_imageblit(info, image); 232 } else 233 cfb_imageblit(info, image); 234 } 235 236 static void vt8623fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) 237 { 238 if ((info->var.bits_per_pixel == 4) 239 && ((rect->width % 8) == 0) && ((rect->dx % 8) == 0) 240 && (info->fix.type == FB_TYPE_INTERLEAVED_PLANES)) 241 vt8623fb_iplan_fillrect(info, rect); 242 else 243 cfb_fillrect(info, rect); 244 } 245 246 247 /* ------------------------------------------------------------------------- */ 248 249 250 static void vt8623_set_pixclock(struct fb_info *info, u32 pixclock) 251 { 252 struct vt8623fb_info *par = info->par; 253 u16 m, n, r; 254 u8 regval; 255 int rv; 256 257 rv = svga_compute_pll(&vt8623_pll, 1000000000 / pixclock, &m, &n, &r, info->node); 258 if (rv < 0) { 259 fb_err(info, "cannot set requested pixclock, keeping old value\n"); 260 return; 261 } 262 263 /* Set VGA misc register */ 264 regval = vga_r(par->state.vgabase, VGA_MIS_R); 265 vga_w(par->state.vgabase, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD); 266 267 /* Set clock registers */ 268 vga_wseq(par->state.vgabase, 0x46, (n | (r << 6))); 269 vga_wseq(par->state.vgabase, 0x47, m); 270 271 udelay(1000); 272 273 /* PLL reset */ 274 svga_wseq_mask(par->state.vgabase, 0x40, 0x02, 0x02); 275 svga_wseq_mask(par->state.vgabase, 0x40, 0x00, 0x02); 276 } 277 278 279 static int vt8623fb_open(struct fb_info *info, int user) 280 { 281 struct vt8623fb_info *par = info->par; 282 283 mutex_lock(&(par->open_lock)); 284 if (par->ref_count == 0) { 285 void __iomem *vgabase = par->state.vgabase; 286 287 memset(&(par->state), 0, sizeof(struct vgastate)); 288 par->state.vgabase = vgabase; 289 par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS | VGA_SAVE_CMAP; 290 par->state.num_crtc = 0xA2; 291 par->state.num_seq = 0x50; 292 save_vga(&(par->state)); 293 } 294 295 par->ref_count++; 296 mutex_unlock(&(par->open_lock)); 297 298 return 0; 299 } 300 301 static int vt8623fb_release(struct fb_info *info, int user) 302 { 303 struct vt8623fb_info *par = info->par; 304 305 mutex_lock(&(par->open_lock)); 306 if (par->ref_count == 0) { 307 mutex_unlock(&(par->open_lock)); 308 return -EINVAL; 309 } 310 311 if (par->ref_count == 1) 312 restore_vga(&(par->state)); 313 314 par->ref_count--; 315 mutex_unlock(&(par->open_lock)); 316 317 return 0; 318 } 319 320 static int vt8623fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) 321 { 322 int rv, mem, step; 323 324 /* Find appropriate format */ 325 rv = svga_match_format (vt8623fb_formats, var, NULL); 326 if (rv < 0) 327 { 328 fb_err(info, "unsupported mode requested\n"); 329 return rv; 330 } 331 332 /* Do not allow to have real resoulution larger than virtual */ 333 if (var->xres > var->xres_virtual) 334 var->xres_virtual = var->xres; 335 336 if (var->yres > var->yres_virtual) 337 var->yres_virtual = var->yres; 338 339 /* Round up xres_virtual to have proper alignment of lines */ 340 step = vt8623fb_formats[rv].xresstep - 1; 341 var->xres_virtual = (var->xres_virtual+step) & ~step; 342 343 /* Check whether have enough memory */ 344 mem = ((var->bits_per_pixel * var->xres_virtual) >> 3) * var->yres_virtual; 345 if (mem > info->screen_size) 346 { 347 fb_err(info, "not enough framebuffer memory (%d kB requested, %d kB available)\n", 348 mem >> 10, (unsigned int) (info->screen_size >> 10)); 349 return -EINVAL; 350 } 351 352 /* Text mode is limited to 256 kB of memory */ 353 if ((var->bits_per_pixel == 0) && (mem > (256*1024))) 354 { 355 fb_err(info, "text framebuffer size too large (%d kB requested, 256 kB possible)\n", 356 mem >> 10); 357 return -EINVAL; 358 } 359 360 rv = svga_check_timings (&vt8623_timing_regs, var, info->node); 361 if (rv < 0) 362 { 363 fb_err(info, "invalid timings requested\n"); 364 return rv; 365 } 366 367 /* Interlaced mode not supported */ 368 if (var->vmode & FB_VMODE_INTERLACED) 369 return -EINVAL; 370 371 return 0; 372 } 373 374 375 static int vt8623fb_set_par(struct fb_info *info) 376 { 377 u32 mode, offset_value, fetch_value, screen_size; 378 struct vt8623fb_info *par = info->par; 379 u32 bpp = info->var.bits_per_pixel; 380 381 if (bpp != 0) { 382 info->fix.ypanstep = 1; 383 info->fix.line_length = (info->var.xres_virtual * bpp) / 8; 384 385 info->flags &= ~FBINFO_MISC_TILEBLITTING; 386 info->tileops = NULL; 387 388 /* in 4bpp supports 8p wide tiles only, any tiles otherwise */ 389 info->pixmap.blit_x = (bpp == 4) ? (1 << (8 - 1)) : (~(u32)0); 390 info->pixmap.blit_y = ~(u32)0; 391 392 offset_value = (info->var.xres_virtual * bpp) / 64; 393 fetch_value = ((info->var.xres * bpp) / 128) + 4; 394 395 if (bpp == 4) 396 fetch_value = (info->var.xres / 8) + 8; /* + 0 is OK */ 397 398 screen_size = info->var.yres_virtual * info->fix.line_length; 399 } else { 400 info->fix.ypanstep = 16; 401 info->fix.line_length = 0; 402 403 info->flags |= FBINFO_MISC_TILEBLITTING; 404 info->tileops = &vt8623fb_tile_ops; 405 406 /* supports 8x16 tiles only */ 407 info->pixmap.blit_x = 1 << (8 - 1); 408 info->pixmap.blit_y = 1 << (16 - 1); 409 410 offset_value = info->var.xres_virtual / 16; 411 fetch_value = (info->var.xres / 8) + 8; 412 screen_size = (info->var.xres_virtual * info->var.yres_virtual) / 64; 413 } 414 415 info->var.xoffset = 0; 416 info->var.yoffset = 0; 417 info->var.activate = FB_ACTIVATE_NOW; 418 419 /* Unlock registers */ 420 svga_wseq_mask(par->state.vgabase, 0x10, 0x01, 0x01); 421 svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80); 422 svga_wcrt_mask(par->state.vgabase, 0x47, 0x00, 0x01); 423 424 /* Device, screen and sync off */ 425 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 426 svga_wcrt_mask(par->state.vgabase, 0x36, 0x30, 0x30); 427 svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80); 428 429 /* Set default values */ 430 svga_set_default_gfx_regs(par->state.vgabase); 431 svga_set_default_atc_regs(par->state.vgabase); 432 svga_set_default_seq_regs(par->state.vgabase); 433 svga_set_default_crt_regs(par->state.vgabase); 434 svga_wcrt_multi(par->state.vgabase, vt8623_line_compare_regs, 0xFFFFFFFF); 435 svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, 0); 436 437 svga_wcrt_multi(par->state.vgabase, vt8623_offset_regs, offset_value); 438 svga_wseq_multi(par->state.vgabase, vt8623_fetch_count_regs, fetch_value); 439 440 /* Clear H/V Skew */ 441 svga_wcrt_mask(par->state.vgabase, 0x03, 0x00, 0x60); 442 svga_wcrt_mask(par->state.vgabase, 0x05, 0x00, 0x60); 443 444 if (info->var.vmode & FB_VMODE_DOUBLE) 445 svga_wcrt_mask(par->state.vgabase, 0x09, 0x80, 0x80); 446 else 447 svga_wcrt_mask(par->state.vgabase, 0x09, 0x00, 0x80); 448 449 svga_wseq_mask(par->state.vgabase, 0x1E, 0xF0, 0xF0); // DI/DVP bus 450 svga_wseq_mask(par->state.vgabase, 0x2A, 0x0F, 0x0F); // DI/DVP bus 451 svga_wseq_mask(par->state.vgabase, 0x16, 0x08, 0xBF); // FIFO read threshold 452 vga_wseq(par->state.vgabase, 0x17, 0x1F); // FIFO depth 453 vga_wseq(par->state.vgabase, 0x18, 0x4E); 454 svga_wseq_mask(par->state.vgabase, 0x1A, 0x08, 0x08); // enable MMIO ? 455 456 vga_wcrt(par->state.vgabase, 0x32, 0x00); 457 vga_wcrt(par->state.vgabase, 0x34, 0x00); 458 vga_wcrt(par->state.vgabase, 0x6A, 0x80); 459 vga_wcrt(par->state.vgabase, 0x6A, 0xC0); 460 461 vga_wgfx(par->state.vgabase, 0x20, 0x00); 462 vga_wgfx(par->state.vgabase, 0x21, 0x00); 463 vga_wgfx(par->state.vgabase, 0x22, 0x00); 464 465 /* Set SR15 according to number of bits per pixel */ 466 mode = svga_match_format(vt8623fb_formats, &(info->var), &(info->fix)); 467 switch (mode) { 468 case 0: 469 fb_dbg(info, "text mode\n"); 470 svga_set_textmode_vga_regs(par->state.vgabase); 471 svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); 472 svga_wcrt_mask(par->state.vgabase, 0x11, 0x60, 0x70); 473 break; 474 case 1: 475 fb_dbg(info, "4 bit pseudocolor\n"); 476 vga_wgfx(par->state.vgabase, VGA_GFX_MODE, 0x40); 477 svga_wseq_mask(par->state.vgabase, 0x15, 0x20, 0xFE); 478 svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x70); 479 break; 480 case 2: 481 fb_dbg(info, "4 bit pseudocolor, planar\n"); 482 svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); 483 svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x70); 484 break; 485 case 3: 486 fb_dbg(info, "8 bit pseudocolor\n"); 487 svga_wseq_mask(par->state.vgabase, 0x15, 0x22, 0xFE); 488 break; 489 case 4: 490 fb_dbg(info, "5/6/5 truecolor\n"); 491 svga_wseq_mask(par->state.vgabase, 0x15, 0xB6, 0xFE); 492 break; 493 case 5: 494 fb_dbg(info, "8/8/8 truecolor\n"); 495 svga_wseq_mask(par->state.vgabase, 0x15, 0xAE, 0xFE); 496 break; 497 default: 498 printk(KERN_ERR "vt8623fb: unsupported mode - bug\n"); 499 return (-EINVAL); 500 } 501 502 vt8623_set_pixclock(info, info->var.pixclock); 503 svga_set_timings(par->state.vgabase, &vt8623_timing_regs, &(info->var), 1, 1, 504 (info->var.vmode & FB_VMODE_DOUBLE) ? 2 : 1, 1, 505 1, info->node); 506 507 memset_io(info->screen_base, 0x00, screen_size); 508 509 /* Device and screen back on */ 510 svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); 511 svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30); 512 svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); 513 514 return 0; 515 } 516 517 518 static int vt8623fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, 519 u_int transp, struct fb_info *fb) 520 { 521 switch (fb->var.bits_per_pixel) { 522 case 0: 523 case 4: 524 if (regno >= 16) 525 return -EINVAL; 526 527 outb(0x0F, VGA_PEL_MSK); 528 outb(regno, VGA_PEL_IW); 529 outb(red >> 10, VGA_PEL_D); 530 outb(green >> 10, VGA_PEL_D); 531 outb(blue >> 10, VGA_PEL_D); 532 break; 533 case 8: 534 if (regno >= 256) 535 return -EINVAL; 536 537 outb(0xFF, VGA_PEL_MSK); 538 outb(regno, VGA_PEL_IW); 539 outb(red >> 10, VGA_PEL_D); 540 outb(green >> 10, VGA_PEL_D); 541 outb(blue >> 10, VGA_PEL_D); 542 break; 543 case 16: 544 if (regno >= 16) 545 return 0; 546 547 if (fb->var.green.length == 5) 548 ((u32*)fb->pseudo_palette)[regno] = ((red & 0xF800) >> 1) | 549 ((green & 0xF800) >> 6) | ((blue & 0xF800) >> 11); 550 else if (fb->var.green.length == 6) 551 ((u32*)fb->pseudo_palette)[regno] = (red & 0xF800) | 552 ((green & 0xFC00) >> 5) | ((blue & 0xF800) >> 11); 553 else 554 return -EINVAL; 555 break; 556 case 24: 557 case 32: 558 if (regno >= 16) 559 return 0; 560 561 /* ((transp & 0xFF00) << 16) */ 562 ((u32*)fb->pseudo_palette)[regno] = ((red & 0xFF00) << 8) | 563 (green & 0xFF00) | ((blue & 0xFF00) >> 8); 564 break; 565 default: 566 return -EINVAL; 567 } 568 569 return 0; 570 } 571 572 573 static int vt8623fb_blank(int blank_mode, struct fb_info *info) 574 { 575 struct vt8623fb_info *par = info->par; 576 577 switch (blank_mode) { 578 case FB_BLANK_UNBLANK: 579 fb_dbg(info, "unblank\n"); 580 svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30); 581 svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); 582 break; 583 case FB_BLANK_NORMAL: 584 fb_dbg(info, "blank\n"); 585 svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30); 586 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 587 break; 588 case FB_BLANK_HSYNC_SUSPEND: 589 fb_dbg(info, "DPMS standby (hsync off)\n"); 590 svga_wcrt_mask(par->state.vgabase, 0x36, 0x10, 0x30); 591 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 592 break; 593 case FB_BLANK_VSYNC_SUSPEND: 594 fb_dbg(info, "DPMS suspend (vsync off)\n"); 595 svga_wcrt_mask(par->state.vgabase, 0x36, 0x20, 0x30); 596 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 597 break; 598 case FB_BLANK_POWERDOWN: 599 fb_dbg(info, "DPMS off (no sync)\n"); 600 svga_wcrt_mask(par->state.vgabase, 0x36, 0x30, 0x30); 601 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 602 break; 603 } 604 605 return 0; 606 } 607 608 609 static int vt8623fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) 610 { 611 struct vt8623fb_info *par = info->par; 612 unsigned int offset; 613 614 /* Calculate the offset */ 615 if (info->var.bits_per_pixel == 0) { 616 offset = (var->yoffset / 16) * info->var.xres_virtual 617 + var->xoffset; 618 offset = offset >> 3; 619 } else { 620 offset = (var->yoffset * info->fix.line_length) + 621 (var->xoffset * info->var.bits_per_pixel / 8); 622 offset = offset >> ((info->var.bits_per_pixel == 4) ? 2 : 1); 623 } 624 625 /* Set the offset */ 626 svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, offset); 627 628 return 0; 629 } 630 631 632 /* ------------------------------------------------------------------------- */ 633 634 635 /* Frame buffer operations */ 636 637 static const struct fb_ops vt8623fb_ops = { 638 .owner = THIS_MODULE, 639 .fb_open = vt8623fb_open, 640 .fb_release = vt8623fb_release, 641 .fb_check_var = vt8623fb_check_var, 642 .fb_set_par = vt8623fb_set_par, 643 .fb_setcolreg = vt8623fb_setcolreg, 644 .fb_blank = vt8623fb_blank, 645 .fb_pan_display = vt8623fb_pan_display, 646 .fb_fillrect = vt8623fb_fillrect, 647 .fb_copyarea = cfb_copyarea, 648 .fb_imageblit = vt8623fb_imageblit, 649 .fb_get_caps = svga_get_caps, 650 }; 651 652 653 /* PCI probe */ 654 655 static int vt8623_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) 656 { 657 struct pci_bus_region bus_reg; 658 struct resource vga_res; 659 struct fb_info *info; 660 struct vt8623fb_info *par; 661 unsigned int memsize1, memsize2; 662 int rc; 663 664 /* Ignore secondary VGA device because there is no VGA arbitration */ 665 if (! svga_primary_device(dev)) { 666 dev_info(&(dev->dev), "ignoring secondary device\n"); 667 return -ENODEV; 668 } 669 670 /* Allocate and fill driver data structure */ 671 info = framebuffer_alloc(sizeof(struct vt8623fb_info), &(dev->dev)); 672 if (!info) 673 return -ENOMEM; 674 675 par = info->par; 676 mutex_init(&par->open_lock); 677 678 info->flags = FBINFO_PARTIAL_PAN_OK | FBINFO_HWACCEL_YPAN; 679 info->fbops = &vt8623fb_ops; 680 681 /* Prepare PCI device */ 682 683 rc = pci_enable_device(dev); 684 if (rc < 0) { 685 dev_err(info->device, "cannot enable PCI device\n"); 686 goto err_enable_device; 687 } 688 689 rc = pci_request_regions(dev, "vt8623fb"); 690 if (rc < 0) { 691 dev_err(info->device, "cannot reserve framebuffer region\n"); 692 goto err_request_regions; 693 } 694 695 info->fix.smem_start = pci_resource_start(dev, 0); 696 info->fix.smem_len = pci_resource_len(dev, 0); 697 info->fix.mmio_start = pci_resource_start(dev, 1); 698 info->fix.mmio_len = pci_resource_len(dev, 1); 699 700 /* Map physical IO memory address into kernel space */ 701 info->screen_base = pci_iomap_wc(dev, 0, 0); 702 if (! info->screen_base) { 703 rc = -ENOMEM; 704 dev_err(info->device, "iomap for framebuffer failed\n"); 705 goto err_iomap_1; 706 } 707 708 par->mmio_base = pci_iomap(dev, 1, 0); 709 if (! par->mmio_base) { 710 rc = -ENOMEM; 711 dev_err(info->device, "iomap for MMIO failed\n"); 712 goto err_iomap_2; 713 } 714 715 bus_reg.start = 0; 716 bus_reg.end = 64 * 1024; 717 718 vga_res.flags = IORESOURCE_IO; 719 720 pcibios_bus_to_resource(dev->bus, &vga_res, &bus_reg); 721 722 par->state.vgabase = (void __iomem *) (unsigned long) vga_res.start; 723 724 /* Find how many physical memory there is on card */ 725 memsize1 = (vga_rseq(par->state.vgabase, 0x34) + 1) >> 1; 726 memsize2 = vga_rseq(par->state.vgabase, 0x39) << 2; 727 728 if ((16 <= memsize1) && (memsize1 <= 64) && (memsize1 == memsize2)) 729 info->screen_size = memsize1 << 20; 730 else { 731 dev_err(info->device, "memory size detection failed (%x %x), suppose 16 MB\n", memsize1, memsize2); 732 info->screen_size = 16 << 20; 733 } 734 735 info->fix.smem_len = info->screen_size; 736 strcpy(info->fix.id, "VIA VT8623"); 737 info->fix.type = FB_TYPE_PACKED_PIXELS; 738 info->fix.visual = FB_VISUAL_PSEUDOCOLOR; 739 info->fix.ypanstep = 0; 740 info->fix.accel = FB_ACCEL_NONE; 741 info->pseudo_palette = (void*)par->pseudo_palette; 742 743 /* Prepare startup mode */ 744 745 kernel_param_lock(THIS_MODULE); 746 rc = fb_find_mode(&(info->var), info, mode_option, NULL, 0, NULL, 8); 747 kernel_param_unlock(THIS_MODULE); 748 if (! ((rc == 1) || (rc == 2))) { 749 rc = -EINVAL; 750 dev_err(info->device, "mode %s not found\n", mode_option); 751 goto err_find_mode; 752 } 753 754 rc = fb_alloc_cmap(&info->cmap, 256, 0); 755 if (rc < 0) { 756 dev_err(info->device, "cannot allocate colormap\n"); 757 goto err_alloc_cmap; 758 } 759 760 rc = register_framebuffer(info); 761 if (rc < 0) { 762 dev_err(info->device, "cannot register framebuffer\n"); 763 goto err_reg_fb; 764 } 765 766 fb_info(info, "%s on %s, %d MB RAM\n", 767 info->fix.id, pci_name(dev), info->fix.smem_len >> 20); 768 769 /* Record a reference to the driver data */ 770 pci_set_drvdata(dev, info); 771 772 if (mtrr) 773 par->wc_cookie = arch_phys_wc_add(info->fix.smem_start, 774 info->fix.smem_len); 775 776 return 0; 777 778 /* Error handling */ 779 err_reg_fb: 780 fb_dealloc_cmap(&info->cmap); 781 err_alloc_cmap: 782 err_find_mode: 783 pci_iounmap(dev, par->mmio_base); 784 err_iomap_2: 785 pci_iounmap(dev, info->screen_base); 786 err_iomap_1: 787 pci_release_regions(dev); 788 err_request_regions: 789 /* pci_disable_device(dev); */ 790 err_enable_device: 791 framebuffer_release(info); 792 return rc; 793 } 794 795 /* PCI remove */ 796 797 static void vt8623_pci_remove(struct pci_dev *dev) 798 { 799 struct fb_info *info = pci_get_drvdata(dev); 800 801 if (info) { 802 struct vt8623fb_info *par = info->par; 803 804 arch_phys_wc_del(par->wc_cookie); 805 unregister_framebuffer(info); 806 fb_dealloc_cmap(&info->cmap); 807 808 pci_iounmap(dev, info->screen_base); 809 pci_iounmap(dev, par->mmio_base); 810 pci_release_regions(dev); 811 /* pci_disable_device(dev); */ 812 813 framebuffer_release(info); 814 } 815 } 816 817 818 #ifdef CONFIG_PM 819 /* PCI suspend */ 820 821 static int vt8623_pci_suspend(struct pci_dev* dev, pm_message_t state) 822 { 823 struct fb_info *info = pci_get_drvdata(dev); 824 struct vt8623fb_info *par = info->par; 825 826 dev_info(info->device, "suspend\n"); 827 828 console_lock(); 829 mutex_lock(&(par->open_lock)); 830 831 if ((state.event == PM_EVENT_FREEZE) || (par->ref_count == 0)) { 832 mutex_unlock(&(par->open_lock)); 833 console_unlock(); 834 return 0; 835 } 836 837 fb_set_suspend(info, 1); 838 839 pci_save_state(dev); 840 pci_disable_device(dev); 841 pci_set_power_state(dev, pci_choose_state(dev, state)); 842 843 mutex_unlock(&(par->open_lock)); 844 console_unlock(); 845 846 return 0; 847 } 848 849 850 /* PCI resume */ 851 852 static int vt8623_pci_resume(struct pci_dev* dev) 853 { 854 struct fb_info *info = pci_get_drvdata(dev); 855 struct vt8623fb_info *par = info->par; 856 857 dev_info(info->device, "resume\n"); 858 859 console_lock(); 860 mutex_lock(&(par->open_lock)); 861 862 if (par->ref_count == 0) 863 goto fail; 864 865 pci_set_power_state(dev, PCI_D0); 866 pci_restore_state(dev); 867 868 if (pci_enable_device(dev)) 869 goto fail; 870 871 pci_set_master(dev); 872 873 vt8623fb_set_par(info); 874 fb_set_suspend(info, 0); 875 876 fail: 877 mutex_unlock(&(par->open_lock)); 878 console_unlock(); 879 880 return 0; 881 } 882 #else 883 #define vt8623_pci_suspend NULL 884 #define vt8623_pci_resume NULL 885 #endif /* CONFIG_PM */ 886 887 /* List of boards that we are trying to support */ 888 889 static const struct pci_device_id vt8623_devices[] = { 890 {PCI_DEVICE(PCI_VENDOR_ID_VIA, 0x3122)}, 891 {0, 0, 0, 0, 0, 0, 0} 892 }; 893 894 MODULE_DEVICE_TABLE(pci, vt8623_devices); 895 896 static struct pci_driver vt8623fb_pci_driver = { 897 .name = "vt8623fb", 898 .id_table = vt8623_devices, 899 .probe = vt8623_pci_probe, 900 .remove = vt8623_pci_remove, 901 .suspend = vt8623_pci_suspend, 902 .resume = vt8623_pci_resume, 903 }; 904 905 /* Cleanup */ 906 907 static void __exit vt8623fb_cleanup(void) 908 { 909 pr_debug("vt8623fb: cleaning up\n"); 910 pci_unregister_driver(&vt8623fb_pci_driver); 911 } 912 913 /* Driver Initialisation */ 914 915 static int __init vt8623fb_init(void) 916 { 917 918 #ifndef MODULE 919 char *option = NULL; 920 921 if (fb_get_options("vt8623fb", &option)) 922 return -ENODEV; 923 924 if (option && *option) 925 mode_option = option; 926 #endif 927 928 pr_debug("vt8623fb: initializing\n"); 929 return pci_register_driver(&vt8623fb_pci_driver); 930 } 931 932 /* ------------------------------------------------------------------------- */ 933 934 /* Modularization */ 935 936 module_init(vt8623fb_init); 937 module_exit(vt8623fb_cleanup); 938