1 /* 2 * linux/drivers/video/vt8623fb.c - fbdev driver for 3 * integrated graphic core in VIA VT8623 [CLE266] chipset 4 * 5 * Copyright (c) 2006-2007 Ondrej Zajicek <santiago@crfreenet.org> 6 * 7 * This file is subject to the terms and conditions of the GNU General Public 8 * License. See the file COPYING in the main directory of this archive for 9 * more details. 10 * 11 * Code is based on s3fb, some parts are from David Boucher's viafb 12 * (http://davesdomain.org.uk/viafb/) 13 */ 14 15 #include <linux/module.h> 16 #include <linux/kernel.h> 17 #include <linux/errno.h> 18 #include <linux/string.h> 19 #include <linux/mm.h> 20 #include <linux/tty.h> 21 #include <linux/delay.h> 22 #include <linux/fb.h> 23 #include <linux/svga.h> 24 #include <linux/init.h> 25 #include <linux/pci.h> 26 #include <linux/console.h> /* Why should fb driver call console functions? because console_lock() */ 27 #include <video/vga.h> 28 29 struct vt8623fb_info { 30 char __iomem *mmio_base; 31 int wc_cookie; 32 struct vgastate state; 33 struct mutex open_lock; 34 unsigned int ref_count; 35 u32 pseudo_palette[16]; 36 }; 37 38 39 40 /* ------------------------------------------------------------------------- */ 41 42 static const struct svga_fb_format vt8623fb_formats[] = { 43 { 0, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, 44 FB_TYPE_TEXT, FB_AUX_TEXT_SVGA_STEP8, FB_VISUAL_PSEUDOCOLOR, 16, 16}, 45 { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, 46 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 16, 16}, 47 { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 1, 48 FB_TYPE_INTERLEAVED_PLANES, 1, FB_VISUAL_PSEUDOCOLOR, 16, 16}, 49 { 8, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, 50 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 8, 8}, 51 /* {16, {10, 5, 0}, {5, 5, 0}, {0, 5, 0}, {0, 0, 0}, 0, 52 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 4, 4}, */ 53 {16, {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, 0, 54 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 4, 4}, 55 {32, {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0, 56 FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 2, 2}, 57 SVGA_FORMAT_END 58 }; 59 60 static const struct svga_pll vt8623_pll = {2, 127, 2, 7, 0, 3, 61 60000, 300000, 14318}; 62 63 /* CRT timing register sets */ 64 65 static const struct vga_regset vt8623_h_total_regs[] = {{0x00, 0, 7}, {0x36, 3, 3}, VGA_REGSET_END}; 66 static const struct vga_regset vt8623_h_display_regs[] = {{0x01, 0, 7}, VGA_REGSET_END}; 67 static const struct vga_regset vt8623_h_blank_start_regs[] = {{0x02, 0, 7}, VGA_REGSET_END}; 68 static const struct vga_regset vt8623_h_blank_end_regs[] = {{0x03, 0, 4}, {0x05, 7, 7}, {0x33, 5, 5}, VGA_REGSET_END}; 69 static const struct vga_regset vt8623_h_sync_start_regs[] = {{0x04, 0, 7}, {0x33, 4, 4}, VGA_REGSET_END}; 70 static const struct vga_regset vt8623_h_sync_end_regs[] = {{0x05, 0, 4}, VGA_REGSET_END}; 71 72 static const struct vga_regset vt8623_v_total_regs[] = {{0x06, 0, 7}, {0x07, 0, 0}, {0x07, 5, 5}, {0x35, 0, 0}, VGA_REGSET_END}; 73 static const struct vga_regset vt8623_v_display_regs[] = {{0x12, 0, 7}, {0x07, 1, 1}, {0x07, 6, 6}, {0x35, 2, 2}, VGA_REGSET_END}; 74 static const struct vga_regset vt8623_v_blank_start_regs[] = {{0x15, 0, 7}, {0x07, 3, 3}, {0x09, 5, 5}, {0x35, 3, 3}, VGA_REGSET_END}; 75 static const struct vga_regset vt8623_v_blank_end_regs[] = {{0x16, 0, 7}, VGA_REGSET_END}; 76 static const struct vga_regset vt8623_v_sync_start_regs[] = {{0x10, 0, 7}, {0x07, 2, 2}, {0x07, 7, 7}, {0x35, 1, 1}, VGA_REGSET_END}; 77 static const struct vga_regset vt8623_v_sync_end_regs[] = {{0x11, 0, 3}, VGA_REGSET_END}; 78 79 static const struct vga_regset vt8623_offset_regs[] = {{0x13, 0, 7}, {0x35, 5, 7}, VGA_REGSET_END}; 80 static const struct vga_regset vt8623_line_compare_regs[] = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, {0x33, 0, 2}, {0x35, 4, 4}, VGA_REGSET_END}; 81 static const struct vga_regset vt8623_fetch_count_regs[] = {{0x1C, 0, 7}, {0x1D, 0, 1}, VGA_REGSET_END}; 82 static const struct vga_regset vt8623_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x34, 0, 7}, {0x48, 0, 1}, VGA_REGSET_END}; 83 84 static const struct svga_timing_regs vt8623_timing_regs = { 85 vt8623_h_total_regs, vt8623_h_display_regs, vt8623_h_blank_start_regs, 86 vt8623_h_blank_end_regs, vt8623_h_sync_start_regs, vt8623_h_sync_end_regs, 87 vt8623_v_total_regs, vt8623_v_display_regs, vt8623_v_blank_start_regs, 88 vt8623_v_blank_end_regs, vt8623_v_sync_start_regs, vt8623_v_sync_end_regs, 89 }; 90 91 92 /* ------------------------------------------------------------------------- */ 93 94 95 /* Module parameters */ 96 97 static char *mode_option = "640x480-8@60"; 98 static int mtrr = 1; 99 100 MODULE_AUTHOR("(c) 2006 Ondrej Zajicek <santiago@crfreenet.org>"); 101 MODULE_LICENSE("GPL"); 102 MODULE_DESCRIPTION("fbdev driver for integrated graphics core in VIA VT8623 [CLE266]"); 103 104 module_param(mode_option, charp, 0644); 105 MODULE_PARM_DESC(mode_option, "Default video mode ('640x480-8@60', etc)"); 106 module_param_named(mode, mode_option, charp, 0); 107 MODULE_PARM_DESC(mode, "Default video mode e.g. '648x480-8@60' (deprecated)"); 108 module_param(mtrr, int, 0444); 109 MODULE_PARM_DESC(mtrr, "Enable write-combining with MTRR (1=enable, 0=disable, default=1)"); 110 111 112 /* ------------------------------------------------------------------------- */ 113 114 static void vt8623fb_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor) 115 { 116 struct vt8623fb_info *par = info->par; 117 118 svga_tilecursor(par->state.vgabase, info, cursor); 119 } 120 121 static struct fb_tile_ops vt8623fb_tile_ops = { 122 .fb_settile = svga_settile, 123 .fb_tilecopy = svga_tilecopy, 124 .fb_tilefill = svga_tilefill, 125 .fb_tileblit = svga_tileblit, 126 .fb_tilecursor = vt8623fb_tilecursor, 127 .fb_get_tilemax = svga_get_tilemax, 128 }; 129 130 131 /* ------------------------------------------------------------------------- */ 132 133 134 /* image data is MSB-first, fb structure is MSB-first too */ 135 static inline u32 expand_color(u32 c) 136 { 137 return ((c & 1) | ((c & 2) << 7) | ((c & 4) << 14) | ((c & 8) << 21)) * 0xFF; 138 } 139 140 /* vt8623fb_iplan_imageblit silently assumes that almost everything is 8-pixel aligned */ 141 static void vt8623fb_iplan_imageblit(struct fb_info *info, const struct fb_image *image) 142 { 143 u32 fg = expand_color(image->fg_color); 144 u32 bg = expand_color(image->bg_color); 145 const u8 *src1, *src; 146 u8 __iomem *dst1; 147 u32 __iomem *dst; 148 u32 val; 149 int x, y; 150 151 src1 = image->data; 152 dst1 = info->screen_base + (image->dy * info->fix.line_length) 153 + ((image->dx / 8) * 4); 154 155 for (y = 0; y < image->height; y++) { 156 src = src1; 157 dst = (u32 __iomem *) dst1; 158 for (x = 0; x < image->width; x += 8) { 159 val = *(src++) * 0x01010101; 160 val = (val & fg) | (~val & bg); 161 fb_writel(val, dst++); 162 } 163 src1 += image->width / 8; 164 dst1 += info->fix.line_length; 165 } 166 } 167 168 /* vt8623fb_iplan_fillrect silently assumes that almost everything is 8-pixel aligned */ 169 static void vt8623fb_iplan_fillrect(struct fb_info *info, const struct fb_fillrect *rect) 170 { 171 u32 fg = expand_color(rect->color); 172 u8 __iomem *dst1; 173 u32 __iomem *dst; 174 int x, y; 175 176 dst1 = info->screen_base + (rect->dy * info->fix.line_length) 177 + ((rect->dx / 8) * 4); 178 179 for (y = 0; y < rect->height; y++) { 180 dst = (u32 __iomem *) dst1; 181 for (x = 0; x < rect->width; x += 8) { 182 fb_writel(fg, dst++); 183 } 184 dst1 += info->fix.line_length; 185 } 186 } 187 188 189 /* image data is MSB-first, fb structure is high-nibble-in-low-byte-first */ 190 static inline u32 expand_pixel(u32 c) 191 { 192 return (((c & 1) << 24) | ((c & 2) << 27) | ((c & 4) << 14) | ((c & 8) << 17) | 193 ((c & 16) << 4) | ((c & 32) << 7) | ((c & 64) >> 6) | ((c & 128) >> 3)) * 0xF; 194 } 195 196 /* vt8623fb_cfb4_imageblit silently assumes that almost everything is 8-pixel aligned */ 197 static void vt8623fb_cfb4_imageblit(struct fb_info *info, const struct fb_image *image) 198 { 199 u32 fg = image->fg_color * 0x11111111; 200 u32 bg = image->bg_color * 0x11111111; 201 const u8 *src1, *src; 202 u8 __iomem *dst1; 203 u32 __iomem *dst; 204 u32 val; 205 int x, y; 206 207 src1 = image->data; 208 dst1 = info->screen_base + (image->dy * info->fix.line_length) 209 + ((image->dx / 8) * 4); 210 211 for (y = 0; y < image->height; y++) { 212 src = src1; 213 dst = (u32 __iomem *) dst1; 214 for (x = 0; x < image->width; x += 8) { 215 val = expand_pixel(*(src++)); 216 val = (val & fg) | (~val & bg); 217 fb_writel(val, dst++); 218 } 219 src1 += image->width / 8; 220 dst1 += info->fix.line_length; 221 } 222 } 223 224 static void vt8623fb_imageblit(struct fb_info *info, const struct fb_image *image) 225 { 226 if ((info->var.bits_per_pixel == 4) && (image->depth == 1) 227 && ((image->width % 8) == 0) && ((image->dx % 8) == 0)) { 228 if (info->fix.type == FB_TYPE_INTERLEAVED_PLANES) 229 vt8623fb_iplan_imageblit(info, image); 230 else 231 vt8623fb_cfb4_imageblit(info, image); 232 } else 233 cfb_imageblit(info, image); 234 } 235 236 static void vt8623fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) 237 { 238 if ((info->var.bits_per_pixel == 4) 239 && ((rect->width % 8) == 0) && ((rect->dx % 8) == 0) 240 && (info->fix.type == FB_TYPE_INTERLEAVED_PLANES)) 241 vt8623fb_iplan_fillrect(info, rect); 242 else 243 cfb_fillrect(info, rect); 244 } 245 246 247 /* ------------------------------------------------------------------------- */ 248 249 250 static void vt8623_set_pixclock(struct fb_info *info, u32 pixclock) 251 { 252 struct vt8623fb_info *par = info->par; 253 u16 m, n, r; 254 u8 regval; 255 int rv; 256 257 rv = svga_compute_pll(&vt8623_pll, 1000000000 / pixclock, &m, &n, &r, info->node); 258 if (rv < 0) { 259 fb_err(info, "cannot set requested pixclock, keeping old value\n"); 260 return; 261 } 262 263 /* Set VGA misc register */ 264 regval = vga_r(par->state.vgabase, VGA_MIS_R); 265 vga_w(par->state.vgabase, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD); 266 267 /* Set clock registers */ 268 vga_wseq(par->state.vgabase, 0x46, (n | (r << 6))); 269 vga_wseq(par->state.vgabase, 0x47, m); 270 271 udelay(1000); 272 273 /* PLL reset */ 274 svga_wseq_mask(par->state.vgabase, 0x40, 0x02, 0x02); 275 svga_wseq_mask(par->state.vgabase, 0x40, 0x00, 0x02); 276 } 277 278 279 static int vt8623fb_open(struct fb_info *info, int user) 280 { 281 struct vt8623fb_info *par = info->par; 282 283 mutex_lock(&(par->open_lock)); 284 if (par->ref_count == 0) { 285 void __iomem *vgabase = par->state.vgabase; 286 287 memset(&(par->state), 0, sizeof(struct vgastate)); 288 par->state.vgabase = vgabase; 289 par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS | VGA_SAVE_CMAP; 290 par->state.num_crtc = 0xA2; 291 par->state.num_seq = 0x50; 292 save_vga(&(par->state)); 293 } 294 295 par->ref_count++; 296 mutex_unlock(&(par->open_lock)); 297 298 return 0; 299 } 300 301 static int vt8623fb_release(struct fb_info *info, int user) 302 { 303 struct vt8623fb_info *par = info->par; 304 305 mutex_lock(&(par->open_lock)); 306 if (par->ref_count == 0) { 307 mutex_unlock(&(par->open_lock)); 308 return -EINVAL; 309 } 310 311 if (par->ref_count == 1) 312 restore_vga(&(par->state)); 313 314 par->ref_count--; 315 mutex_unlock(&(par->open_lock)); 316 317 return 0; 318 } 319 320 static int vt8623fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) 321 { 322 int rv, mem, step; 323 324 if (!var->pixclock) 325 return -EINVAL; 326 327 /* Find appropriate format */ 328 rv = svga_match_format (vt8623fb_formats, var, NULL); 329 if (rv < 0) 330 { 331 fb_err(info, "unsupported mode requested\n"); 332 return rv; 333 } 334 335 /* Do not allow to have real resoulution larger than virtual */ 336 if (var->xres > var->xres_virtual) 337 var->xres_virtual = var->xres; 338 339 if (var->yres > var->yres_virtual) 340 var->yres_virtual = var->yres; 341 342 /* Round up xres_virtual to have proper alignment of lines */ 343 step = vt8623fb_formats[rv].xresstep - 1; 344 var->xres_virtual = (var->xres_virtual+step) & ~step; 345 346 /* Check whether have enough memory */ 347 mem = ((var->bits_per_pixel * var->xres_virtual) >> 3) * var->yres_virtual; 348 if (mem > info->screen_size) 349 { 350 fb_err(info, "not enough framebuffer memory (%d kB requested, %d kB available)\n", 351 mem >> 10, (unsigned int) (info->screen_size >> 10)); 352 return -EINVAL; 353 } 354 355 /* Text mode is limited to 256 kB of memory */ 356 if ((var->bits_per_pixel == 0) && (mem > (256*1024))) 357 { 358 fb_err(info, "text framebuffer size too large (%d kB requested, 256 kB possible)\n", 359 mem >> 10); 360 return -EINVAL; 361 } 362 363 rv = svga_check_timings (&vt8623_timing_regs, var, info->node); 364 if (rv < 0) 365 { 366 fb_err(info, "invalid timings requested\n"); 367 return rv; 368 } 369 370 /* Interlaced mode not supported */ 371 if (var->vmode & FB_VMODE_INTERLACED) 372 return -EINVAL; 373 374 return 0; 375 } 376 377 378 static int vt8623fb_set_par(struct fb_info *info) 379 { 380 u32 mode, offset_value, fetch_value, screen_size; 381 struct vt8623fb_info *par = info->par; 382 u32 bpp = info->var.bits_per_pixel; 383 384 if (bpp != 0) { 385 info->fix.ypanstep = 1; 386 info->fix.line_length = (info->var.xres_virtual * bpp) / 8; 387 388 info->flags &= ~FBINFO_MISC_TILEBLITTING; 389 info->tileops = NULL; 390 391 /* in 4bpp supports 8p wide tiles only, any tiles otherwise */ 392 info->pixmap.blit_x = (bpp == 4) ? (1 << (8 - 1)) : (~(u32)0); 393 info->pixmap.blit_y = ~(u32)0; 394 395 offset_value = (info->var.xres_virtual * bpp) / 64; 396 fetch_value = ((info->var.xres * bpp) / 128) + 4; 397 398 if (bpp == 4) 399 fetch_value = (info->var.xres / 8) + 8; /* + 0 is OK */ 400 401 screen_size = info->var.yres_virtual * info->fix.line_length; 402 } else { 403 info->fix.ypanstep = 16; 404 info->fix.line_length = 0; 405 406 info->flags |= FBINFO_MISC_TILEBLITTING; 407 info->tileops = &vt8623fb_tile_ops; 408 409 /* supports 8x16 tiles only */ 410 info->pixmap.blit_x = 1 << (8 - 1); 411 info->pixmap.blit_y = 1 << (16 - 1); 412 413 offset_value = info->var.xres_virtual / 16; 414 fetch_value = (info->var.xres / 8) + 8; 415 screen_size = (info->var.xres_virtual * info->var.yres_virtual) / 64; 416 } 417 418 info->var.xoffset = 0; 419 info->var.yoffset = 0; 420 info->var.activate = FB_ACTIVATE_NOW; 421 422 /* Unlock registers */ 423 svga_wseq_mask(par->state.vgabase, 0x10, 0x01, 0x01); 424 svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80); 425 svga_wcrt_mask(par->state.vgabase, 0x47, 0x00, 0x01); 426 427 /* Device, screen and sync off */ 428 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 429 svga_wcrt_mask(par->state.vgabase, 0x36, 0x30, 0x30); 430 svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80); 431 432 /* Set default values */ 433 svga_set_default_gfx_regs(par->state.vgabase); 434 svga_set_default_atc_regs(par->state.vgabase); 435 svga_set_default_seq_regs(par->state.vgabase); 436 svga_set_default_crt_regs(par->state.vgabase); 437 svga_wcrt_multi(par->state.vgabase, vt8623_line_compare_regs, 0xFFFFFFFF); 438 svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, 0); 439 440 svga_wcrt_multi(par->state.vgabase, vt8623_offset_regs, offset_value); 441 svga_wseq_multi(par->state.vgabase, vt8623_fetch_count_regs, fetch_value); 442 443 /* Clear H/V Skew */ 444 svga_wcrt_mask(par->state.vgabase, 0x03, 0x00, 0x60); 445 svga_wcrt_mask(par->state.vgabase, 0x05, 0x00, 0x60); 446 447 if (info->var.vmode & FB_VMODE_DOUBLE) 448 svga_wcrt_mask(par->state.vgabase, 0x09, 0x80, 0x80); 449 else 450 svga_wcrt_mask(par->state.vgabase, 0x09, 0x00, 0x80); 451 452 svga_wseq_mask(par->state.vgabase, 0x1E, 0xF0, 0xF0); // DI/DVP bus 453 svga_wseq_mask(par->state.vgabase, 0x2A, 0x0F, 0x0F); // DI/DVP bus 454 svga_wseq_mask(par->state.vgabase, 0x16, 0x08, 0xBF); // FIFO read threshold 455 vga_wseq(par->state.vgabase, 0x17, 0x1F); // FIFO depth 456 vga_wseq(par->state.vgabase, 0x18, 0x4E); 457 svga_wseq_mask(par->state.vgabase, 0x1A, 0x08, 0x08); // enable MMIO ? 458 459 vga_wcrt(par->state.vgabase, 0x32, 0x00); 460 vga_wcrt(par->state.vgabase, 0x34, 0x00); 461 vga_wcrt(par->state.vgabase, 0x6A, 0x80); 462 vga_wcrt(par->state.vgabase, 0x6A, 0xC0); 463 464 vga_wgfx(par->state.vgabase, 0x20, 0x00); 465 vga_wgfx(par->state.vgabase, 0x21, 0x00); 466 vga_wgfx(par->state.vgabase, 0x22, 0x00); 467 468 /* Set SR15 according to number of bits per pixel */ 469 mode = svga_match_format(vt8623fb_formats, &(info->var), &(info->fix)); 470 switch (mode) { 471 case 0: 472 fb_dbg(info, "text mode\n"); 473 svga_set_textmode_vga_regs(par->state.vgabase); 474 svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); 475 svga_wcrt_mask(par->state.vgabase, 0x11, 0x60, 0x70); 476 break; 477 case 1: 478 fb_dbg(info, "4 bit pseudocolor\n"); 479 vga_wgfx(par->state.vgabase, VGA_GFX_MODE, 0x40); 480 svga_wseq_mask(par->state.vgabase, 0x15, 0x20, 0xFE); 481 svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x70); 482 break; 483 case 2: 484 fb_dbg(info, "4 bit pseudocolor, planar\n"); 485 svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); 486 svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x70); 487 break; 488 case 3: 489 fb_dbg(info, "8 bit pseudocolor\n"); 490 svga_wseq_mask(par->state.vgabase, 0x15, 0x22, 0xFE); 491 break; 492 case 4: 493 fb_dbg(info, "5/6/5 truecolor\n"); 494 svga_wseq_mask(par->state.vgabase, 0x15, 0xB6, 0xFE); 495 break; 496 case 5: 497 fb_dbg(info, "8/8/8 truecolor\n"); 498 svga_wseq_mask(par->state.vgabase, 0x15, 0xAE, 0xFE); 499 break; 500 default: 501 printk(KERN_ERR "vt8623fb: unsupported mode - bug\n"); 502 return (-EINVAL); 503 } 504 505 vt8623_set_pixclock(info, info->var.pixclock); 506 svga_set_timings(par->state.vgabase, &vt8623_timing_regs, &(info->var), 1, 1, 507 (info->var.vmode & FB_VMODE_DOUBLE) ? 2 : 1, 1, 508 1, info->node); 509 510 if (screen_size > info->screen_size) 511 screen_size = info->screen_size; 512 memset_io(info->screen_base, 0x00, screen_size); 513 514 /* Device and screen back on */ 515 svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); 516 svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30); 517 svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); 518 519 return 0; 520 } 521 522 523 static int vt8623fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, 524 u_int transp, struct fb_info *fb) 525 { 526 switch (fb->var.bits_per_pixel) { 527 case 0: 528 case 4: 529 if (regno >= 16) 530 return -EINVAL; 531 532 outb(0x0F, VGA_PEL_MSK); 533 outb(regno, VGA_PEL_IW); 534 outb(red >> 10, VGA_PEL_D); 535 outb(green >> 10, VGA_PEL_D); 536 outb(blue >> 10, VGA_PEL_D); 537 break; 538 case 8: 539 if (regno >= 256) 540 return -EINVAL; 541 542 outb(0xFF, VGA_PEL_MSK); 543 outb(regno, VGA_PEL_IW); 544 outb(red >> 10, VGA_PEL_D); 545 outb(green >> 10, VGA_PEL_D); 546 outb(blue >> 10, VGA_PEL_D); 547 break; 548 case 16: 549 if (regno >= 16) 550 return 0; 551 552 if (fb->var.green.length == 5) 553 ((u32*)fb->pseudo_palette)[regno] = ((red & 0xF800) >> 1) | 554 ((green & 0xF800) >> 6) | ((blue & 0xF800) >> 11); 555 else if (fb->var.green.length == 6) 556 ((u32*)fb->pseudo_palette)[regno] = (red & 0xF800) | 557 ((green & 0xFC00) >> 5) | ((blue & 0xF800) >> 11); 558 else 559 return -EINVAL; 560 break; 561 case 24: 562 case 32: 563 if (regno >= 16) 564 return 0; 565 566 /* ((transp & 0xFF00) << 16) */ 567 ((u32*)fb->pseudo_palette)[regno] = ((red & 0xFF00) << 8) | 568 (green & 0xFF00) | ((blue & 0xFF00) >> 8); 569 break; 570 default: 571 return -EINVAL; 572 } 573 574 return 0; 575 } 576 577 578 static int vt8623fb_blank(int blank_mode, struct fb_info *info) 579 { 580 struct vt8623fb_info *par = info->par; 581 582 switch (blank_mode) { 583 case FB_BLANK_UNBLANK: 584 fb_dbg(info, "unblank\n"); 585 svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30); 586 svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); 587 break; 588 case FB_BLANK_NORMAL: 589 fb_dbg(info, "blank\n"); 590 svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30); 591 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 592 break; 593 case FB_BLANK_HSYNC_SUSPEND: 594 fb_dbg(info, "DPMS standby (hsync off)\n"); 595 svga_wcrt_mask(par->state.vgabase, 0x36, 0x10, 0x30); 596 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 597 break; 598 case FB_BLANK_VSYNC_SUSPEND: 599 fb_dbg(info, "DPMS suspend (vsync off)\n"); 600 svga_wcrt_mask(par->state.vgabase, 0x36, 0x20, 0x30); 601 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 602 break; 603 case FB_BLANK_POWERDOWN: 604 fb_dbg(info, "DPMS off (no sync)\n"); 605 svga_wcrt_mask(par->state.vgabase, 0x36, 0x30, 0x30); 606 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); 607 break; 608 } 609 610 return 0; 611 } 612 613 614 static int vt8623fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) 615 { 616 struct vt8623fb_info *par = info->par; 617 unsigned int offset; 618 619 /* Calculate the offset */ 620 if (info->var.bits_per_pixel == 0) { 621 offset = (var->yoffset / 16) * info->var.xres_virtual 622 + var->xoffset; 623 offset = offset >> 3; 624 } else { 625 offset = (var->yoffset * info->fix.line_length) + 626 (var->xoffset * info->var.bits_per_pixel / 8); 627 offset = offset >> ((info->var.bits_per_pixel == 4) ? 2 : 1); 628 } 629 630 /* Set the offset */ 631 svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, offset); 632 633 return 0; 634 } 635 636 637 /* ------------------------------------------------------------------------- */ 638 639 640 /* Frame buffer operations */ 641 642 static const struct fb_ops vt8623fb_ops = { 643 .owner = THIS_MODULE, 644 .fb_open = vt8623fb_open, 645 .fb_release = vt8623fb_release, 646 .fb_check_var = vt8623fb_check_var, 647 .fb_set_par = vt8623fb_set_par, 648 .fb_setcolreg = vt8623fb_setcolreg, 649 .fb_blank = vt8623fb_blank, 650 .fb_pan_display = vt8623fb_pan_display, 651 .fb_fillrect = vt8623fb_fillrect, 652 .fb_copyarea = cfb_copyarea, 653 .fb_imageblit = vt8623fb_imageblit, 654 .fb_get_caps = svga_get_caps, 655 }; 656 657 658 /* PCI probe */ 659 660 static int vt8623_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) 661 { 662 struct pci_bus_region bus_reg; 663 struct resource vga_res; 664 struct fb_info *info; 665 struct vt8623fb_info *par; 666 unsigned int memsize1, memsize2; 667 int rc; 668 669 /* Ignore secondary VGA device because there is no VGA arbitration */ 670 if (! svga_primary_device(dev)) { 671 dev_info(&(dev->dev), "ignoring secondary device\n"); 672 return -ENODEV; 673 } 674 675 /* Allocate and fill driver data structure */ 676 info = framebuffer_alloc(sizeof(struct vt8623fb_info), &(dev->dev)); 677 if (!info) 678 return -ENOMEM; 679 680 par = info->par; 681 mutex_init(&par->open_lock); 682 683 info->flags = FBINFO_PARTIAL_PAN_OK | FBINFO_HWACCEL_YPAN; 684 info->fbops = &vt8623fb_ops; 685 686 /* Prepare PCI device */ 687 688 rc = pci_enable_device(dev); 689 if (rc < 0) { 690 dev_err(info->device, "cannot enable PCI device\n"); 691 goto err_enable_device; 692 } 693 694 rc = pci_request_regions(dev, "vt8623fb"); 695 if (rc < 0) { 696 dev_err(info->device, "cannot reserve framebuffer region\n"); 697 goto err_request_regions; 698 } 699 700 info->fix.smem_start = pci_resource_start(dev, 0); 701 info->fix.smem_len = pci_resource_len(dev, 0); 702 info->fix.mmio_start = pci_resource_start(dev, 1); 703 info->fix.mmio_len = pci_resource_len(dev, 1); 704 705 /* Map physical IO memory address into kernel space */ 706 info->screen_base = pci_iomap_wc(dev, 0, 0); 707 if (! info->screen_base) { 708 rc = -ENOMEM; 709 dev_err(info->device, "iomap for framebuffer failed\n"); 710 goto err_iomap_1; 711 } 712 713 par->mmio_base = pci_iomap(dev, 1, 0); 714 if (! par->mmio_base) { 715 rc = -ENOMEM; 716 dev_err(info->device, "iomap for MMIO failed\n"); 717 goto err_iomap_2; 718 } 719 720 bus_reg.start = 0; 721 bus_reg.end = 64 * 1024; 722 723 vga_res.flags = IORESOURCE_IO; 724 725 pcibios_bus_to_resource(dev->bus, &vga_res, &bus_reg); 726 727 par->state.vgabase = (void __iomem *) (unsigned long) vga_res.start; 728 729 /* Find how many physical memory there is on card */ 730 memsize1 = (vga_rseq(par->state.vgabase, 0x34) + 1) >> 1; 731 memsize2 = vga_rseq(par->state.vgabase, 0x39) << 2; 732 733 if ((16 <= memsize1) && (memsize1 <= 64) && (memsize1 == memsize2)) 734 info->screen_size = memsize1 << 20; 735 else { 736 dev_err(info->device, "memory size detection failed (%x %x), suppose 16 MB\n", memsize1, memsize2); 737 info->screen_size = 16 << 20; 738 } 739 740 info->fix.smem_len = info->screen_size; 741 strcpy(info->fix.id, "VIA VT8623"); 742 info->fix.type = FB_TYPE_PACKED_PIXELS; 743 info->fix.visual = FB_VISUAL_PSEUDOCOLOR; 744 info->fix.ypanstep = 0; 745 info->fix.accel = FB_ACCEL_NONE; 746 info->pseudo_palette = (void*)par->pseudo_palette; 747 748 /* Prepare startup mode */ 749 750 kernel_param_lock(THIS_MODULE); 751 rc = fb_find_mode(&(info->var), info, mode_option, NULL, 0, NULL, 8); 752 kernel_param_unlock(THIS_MODULE); 753 if (! ((rc == 1) || (rc == 2))) { 754 rc = -EINVAL; 755 dev_err(info->device, "mode %s not found\n", mode_option); 756 goto err_find_mode; 757 } 758 759 rc = fb_alloc_cmap(&info->cmap, 256, 0); 760 if (rc < 0) { 761 dev_err(info->device, "cannot allocate colormap\n"); 762 goto err_alloc_cmap; 763 } 764 765 rc = register_framebuffer(info); 766 if (rc < 0) { 767 dev_err(info->device, "cannot register framebuffer\n"); 768 goto err_reg_fb; 769 } 770 771 fb_info(info, "%s on %s, %d MB RAM\n", 772 info->fix.id, pci_name(dev), info->fix.smem_len >> 20); 773 774 /* Record a reference to the driver data */ 775 pci_set_drvdata(dev, info); 776 777 if (mtrr) 778 par->wc_cookie = arch_phys_wc_add(info->fix.smem_start, 779 info->fix.smem_len); 780 781 return 0; 782 783 /* Error handling */ 784 err_reg_fb: 785 fb_dealloc_cmap(&info->cmap); 786 err_alloc_cmap: 787 err_find_mode: 788 pci_iounmap(dev, par->mmio_base); 789 err_iomap_2: 790 pci_iounmap(dev, info->screen_base); 791 err_iomap_1: 792 pci_release_regions(dev); 793 err_request_regions: 794 /* pci_disable_device(dev); */ 795 err_enable_device: 796 framebuffer_release(info); 797 return rc; 798 } 799 800 /* PCI remove */ 801 802 static void vt8623_pci_remove(struct pci_dev *dev) 803 { 804 struct fb_info *info = pci_get_drvdata(dev); 805 806 if (info) { 807 struct vt8623fb_info *par = info->par; 808 809 arch_phys_wc_del(par->wc_cookie); 810 unregister_framebuffer(info); 811 fb_dealloc_cmap(&info->cmap); 812 813 pci_iounmap(dev, info->screen_base); 814 pci_iounmap(dev, par->mmio_base); 815 pci_release_regions(dev); 816 /* pci_disable_device(dev); */ 817 818 framebuffer_release(info); 819 } 820 } 821 822 823 /* PCI suspend */ 824 825 static int __maybe_unused vt8623_pci_suspend(struct device *dev) 826 { 827 struct fb_info *info = dev_get_drvdata(dev); 828 struct vt8623fb_info *par = info->par; 829 830 dev_info(info->device, "suspend\n"); 831 832 console_lock(); 833 mutex_lock(&(par->open_lock)); 834 835 if (par->ref_count == 0) { 836 mutex_unlock(&(par->open_lock)); 837 console_unlock(); 838 return 0; 839 } 840 841 fb_set_suspend(info, 1); 842 843 mutex_unlock(&(par->open_lock)); 844 console_unlock(); 845 846 return 0; 847 } 848 849 850 /* PCI resume */ 851 852 static int __maybe_unused vt8623_pci_resume(struct device *dev) 853 { 854 struct fb_info *info = dev_get_drvdata(dev); 855 struct vt8623fb_info *par = info->par; 856 857 dev_info(info->device, "resume\n"); 858 859 console_lock(); 860 mutex_lock(&(par->open_lock)); 861 862 if (par->ref_count == 0) 863 goto fail; 864 865 vt8623fb_set_par(info); 866 fb_set_suspend(info, 0); 867 868 fail: 869 mutex_unlock(&(par->open_lock)); 870 console_unlock(); 871 872 return 0; 873 } 874 875 static const struct dev_pm_ops vt8623_pci_pm_ops = { 876 #ifdef CONFIG_PM_SLEEP 877 .suspend = vt8623_pci_suspend, 878 .resume = vt8623_pci_resume, 879 .freeze = NULL, 880 .thaw = vt8623_pci_resume, 881 .poweroff = vt8623_pci_suspend, 882 .restore = vt8623_pci_resume, 883 #endif /* CONFIG_PM_SLEEP */ 884 }; 885 886 /* List of boards that we are trying to support */ 887 888 static const struct pci_device_id vt8623_devices[] = { 889 {PCI_DEVICE(PCI_VENDOR_ID_VIA, 0x3122)}, 890 {0, 0, 0, 0, 0, 0, 0} 891 }; 892 893 MODULE_DEVICE_TABLE(pci, vt8623_devices); 894 895 static struct pci_driver vt8623fb_pci_driver = { 896 .name = "vt8623fb", 897 .id_table = vt8623_devices, 898 .probe = vt8623_pci_probe, 899 .remove = vt8623_pci_remove, 900 .driver.pm = &vt8623_pci_pm_ops, 901 }; 902 903 /* Cleanup */ 904 905 static void __exit vt8623fb_cleanup(void) 906 { 907 pr_debug("vt8623fb: cleaning up\n"); 908 pci_unregister_driver(&vt8623fb_pci_driver); 909 } 910 911 /* Driver Initialisation */ 912 913 static int __init vt8623fb_init(void) 914 { 915 916 #ifndef MODULE 917 char *option = NULL; 918 919 if (fb_get_options("vt8623fb", &option)) 920 return -ENODEV; 921 922 if (option && *option) 923 mode_option = option; 924 #endif 925 926 pr_debug("vt8623fb: initializing\n"); 927 return pci_register_driver(&vt8623fb_pci_driver); 928 } 929 930 /* ------------------------------------------------------------------------- */ 931 932 /* Modularization */ 933 934 module_init(vt8623fb_init); 935 module_exit(vt8623fb_cleanup); 936