1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * drivers/video/pvr2fb.c 4 * 5 * Frame buffer and fbcon support for the NEC PowerVR2 found within the Sega 6 * Dreamcast. 7 * 8 * Copyright (c) 2001 M. R. Brown <mrbrown@0xd6.org> 9 * Copyright (c) 2001 - 2008 Paul Mundt <lethal@linux-sh.org> 10 * 11 * This driver is mostly based on the excellent amifb and vfb sources. It uses 12 * an odd scheme for converting hardware values to/from framebuffer values, 13 * here are some hacked-up formulas: 14 * 15 * The Dreamcast has screen offsets from each side of its four borders and 16 * the start offsets of the display window. I used these values to calculate 17 * 'pseudo' values (think of them as placeholders) for the fb video mode, so 18 * that when it came time to convert these values back into their hardware 19 * values, I could just add mode- specific offsets to get the correct mode 20 * settings: 21 * 22 * left_margin = diwstart_h - borderstart_h; 23 * right_margin = borderstop_h - (diwstart_h + xres); 24 * upper_margin = diwstart_v - borderstart_v; 25 * lower_margin = borderstop_v - (diwstart_h + yres); 26 * 27 * hsync_len = borderstart_h + (hsync_total - borderstop_h); 28 * vsync_len = borderstart_v + (vsync_total - borderstop_v); 29 * 30 * Then, when it's time to convert back to hardware settings, the only 31 * constants are the borderstart_* offsets, all other values are derived from 32 * the fb video mode: 33 * 34 * // PAL 35 * borderstart_h = 116; 36 * borderstart_v = 44; 37 * ... 38 * borderstop_h = borderstart_h + hsync_total - hsync_len; 39 * ... 40 * diwstart_v = borderstart_v - upper_margin; 41 * 42 * However, in the current implementation, the borderstart values haven't had 43 * the benefit of being fully researched, so some modes may be broken. 44 */ 45 46 #undef DEBUG 47 48 #include <linux/aperture.h> 49 #include <linux/module.h> 50 #include <linux/kernel.h> 51 #include <linux/errno.h> 52 #include <linux/string.h> 53 #include <linux/mm.h> 54 #include <linux/slab.h> 55 #include <linux/delay.h> 56 #include <linux/interrupt.h> 57 #include <linux/fb.h> 58 #include <linux/init.h> 59 #include <linux/pci.h> 60 61 #ifdef CONFIG_SH_DREAMCAST 62 #include <asm/machvec.h> 63 #include <mach-dreamcast/mach/sysasic.h> 64 #endif 65 66 #ifdef CONFIG_PVR2_DMA 67 #include <linux/pagemap.h> 68 #include <mach/dma.h> 69 #include <asm/dma.h> 70 #endif 71 72 #ifdef CONFIG_SH_STORE_QUEUES 73 #include <linux/uaccess.h> 74 #include <cpu/sq.h> 75 #endif 76 77 #ifndef PCI_DEVICE_ID_NEC_NEON250 78 # define PCI_DEVICE_ID_NEC_NEON250 0x0067 79 #endif 80 81 /* 2D video registers */ 82 #define DISP_BASE par->mmio_base 83 #define DISP_BRDRCOLR (DISP_BASE + 0x40) 84 #define DISP_DIWMODE (DISP_BASE + 0x44) 85 #define DISP_DIWADDRL (DISP_BASE + 0x50) 86 #define DISP_DIWADDRS (DISP_BASE + 0x54) 87 #define DISP_DIWSIZE (DISP_BASE + 0x5c) 88 #define DISP_SYNCCONF (DISP_BASE + 0xd0) 89 #define DISP_BRDRHORZ (DISP_BASE + 0xd4) 90 #define DISP_SYNCSIZE (DISP_BASE + 0xd8) 91 #define DISP_BRDRVERT (DISP_BASE + 0xdc) 92 #define DISP_DIWCONF (DISP_BASE + 0xe8) 93 #define DISP_DIWHSTRT (DISP_BASE + 0xec) 94 #define DISP_DIWVSTRT (DISP_BASE + 0xf0) 95 #define DISP_PIXDEPTH (DISP_BASE + 0x108) 96 97 /* Pixel clocks, one for TV output, doubled for VGA output */ 98 #define TV_CLK 74239 99 #define VGA_CLK 37119 100 101 /* This is for 60Hz - the VTOTAL is doubled for interlaced modes */ 102 #define PAL_HTOTAL 863 103 #define PAL_VTOTAL 312 104 #define NTSC_HTOTAL 857 105 #define NTSC_VTOTAL 262 106 107 /* Supported cable types */ 108 enum { CT_VGA, CT_NONE, CT_RGB, CT_COMPOSITE }; 109 110 /* Supported video output types */ 111 enum { VO_PAL, VO_NTSC, VO_VGA }; 112 113 /* Supported palette types */ 114 enum { PAL_ARGB1555, PAL_RGB565, PAL_ARGB4444, PAL_ARGB8888 }; 115 116 struct pvr2_params { unsigned int val; char *name; }; 117 static struct pvr2_params cables[] = { 118 { CT_VGA, "VGA" }, { CT_RGB, "RGB" }, { CT_COMPOSITE, "COMPOSITE" }, 119 }; 120 121 static struct pvr2_params outputs[] = { 122 { VO_PAL, "PAL" }, { VO_NTSC, "NTSC" }, { VO_VGA, "VGA" }, 123 }; 124 125 /* 126 * This describes the current video mode 127 */ 128 129 static struct pvr2fb_par { 130 unsigned int hsync_total; /* Clocks/line */ 131 unsigned int vsync_total; /* Lines/field */ 132 unsigned int borderstart_h; 133 unsigned int borderstop_h; 134 unsigned int borderstart_v; 135 unsigned int borderstop_v; 136 unsigned int diwstart_h; /* Horizontal offset of the display field */ 137 unsigned int diwstart_v; /* Vertical offset of the display field, for 138 interlaced modes, this is the long field */ 139 unsigned long disp_start; /* Address of image within VRAM */ 140 unsigned char is_interlaced; /* Is the display interlaced? */ 141 unsigned char is_doublescan; /* Are scanlines output twice? (doublescan) */ 142 unsigned char is_lowres; /* Is horizontal pixel-doubling enabled? */ 143 144 void __iomem *mmio_base; /* MMIO base */ 145 u32 palette[16]; 146 } *currentpar; 147 148 static struct fb_info *fb_info; 149 150 static struct fb_fix_screeninfo pvr2_fix = { 151 .id = "NEC PowerVR2", 152 .type = FB_TYPE_PACKED_PIXELS, 153 .visual = FB_VISUAL_TRUECOLOR, 154 .ypanstep = 1, 155 .ywrapstep = 1, 156 .accel = FB_ACCEL_NONE, 157 }; 158 159 static const struct fb_var_screeninfo pvr2_var = { 160 .xres = 640, 161 .yres = 480, 162 .xres_virtual = 640, 163 .yres_virtual = 480, 164 .bits_per_pixel =16, 165 .red = { 11, 5, 0 }, 166 .green = { 5, 6, 0 }, 167 .blue = { 0, 5, 0 }, 168 .activate = FB_ACTIVATE_NOW, 169 .height = -1, 170 .width = -1, 171 .vmode = FB_VMODE_NONINTERLACED, 172 }; 173 174 static int cable_type = CT_VGA; 175 static int video_output = VO_VGA; 176 177 static int nopan = 0; 178 static int nowrap = 1; 179 180 /* 181 * We do all updating, blanking, etc. during the vertical retrace period 182 */ 183 static unsigned int do_vmode_full = 0; /* Change the video mode */ 184 static unsigned int do_vmode_pan = 0; /* Update the video mode */ 185 static short do_blank = 0; /* (Un)Blank the screen */ 186 187 static unsigned int is_blanked = 0; /* Is the screen blanked? */ 188 189 #ifdef CONFIG_SH_STORE_QUEUES 190 static unsigned long pvr2fb_map; 191 #endif 192 193 #ifdef CONFIG_PVR2_DMA 194 static unsigned int shdma = PVR2_CASCADE_CHAN; 195 static unsigned int pvr2dma = ONCHIP_NR_DMA_CHANNELS; 196 #endif 197 198 static struct fb_videomode pvr2_modedb[] = { 199 /* 200 * Broadcast video modes (PAL and NTSC). I'm unfamiliar with 201 * PAL-M and PAL-N, but from what I've read both modes parallel PAL and 202 * NTSC, so it shouldn't be a problem (I hope). 203 */ 204 205 { 206 /* 640x480 @ 60Hz interlaced (NTSC) */ 207 "ntsc_640x480i", 60, 640, 480, TV_CLK, 38, 33, 0, 18, 146, 26, 208 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | FB_VMODE_YWRAP 209 }, { 210 /* 640x240 @ 60Hz (NTSC) */ 211 /* XXX: Broken! Don't use... */ 212 "ntsc_640x240", 60, 640, 240, TV_CLK, 38, 33, 0, 0, 146, 22, 213 FB_SYNC_BROADCAST, FB_VMODE_YWRAP 214 }, { 215 /* 640x480 @ 60hz (VGA) */ 216 "vga_640x480", 60, 640, 480, VGA_CLK, 38, 33, 0, 18, 146, 26, 217 0, FB_VMODE_YWRAP 218 }, 219 }; 220 221 #define NUM_TOTAL_MODES ARRAY_SIZE(pvr2_modedb) 222 223 #define DEFMODE_NTSC 0 224 #define DEFMODE_PAL 0 225 #define DEFMODE_VGA 2 226 227 static int defmode = DEFMODE_NTSC; 228 static char *mode_option = NULL; 229 230 static inline void pvr2fb_set_pal_type(unsigned int type) 231 { 232 struct pvr2fb_par *par = (struct pvr2fb_par *)fb_info->par; 233 234 fb_writel(type, par->mmio_base + 0x108); 235 } 236 237 static inline void pvr2fb_set_pal_entry(struct pvr2fb_par *par, 238 unsigned int regno, 239 unsigned int val) 240 { 241 fb_writel(val, par->mmio_base + 0x1000 + (4 * regno)); 242 } 243 244 static int pvr2fb_blank(int blank, struct fb_info *info) 245 { 246 do_blank = blank ? blank : -1; 247 return 0; 248 } 249 250 static inline unsigned long get_line_length(int xres_virtual, int bpp) 251 { 252 return (unsigned long)((((xres_virtual*bpp)+31)&~31) >> 3); 253 } 254 255 static void set_color_bitfields(struct fb_var_screeninfo *var) 256 { 257 switch (var->bits_per_pixel) { 258 case 16: /* RGB 565 */ 259 pvr2fb_set_pal_type(PAL_RGB565); 260 var->red.offset = 11; var->red.length = 5; 261 var->green.offset = 5; var->green.length = 6; 262 var->blue.offset = 0; var->blue.length = 5; 263 var->transp.offset = 0; var->transp.length = 0; 264 break; 265 case 24: /* RGB 888 */ 266 var->red.offset = 16; var->red.length = 8; 267 var->green.offset = 8; var->green.length = 8; 268 var->blue.offset = 0; var->blue.length = 8; 269 var->transp.offset = 0; var->transp.length = 0; 270 break; 271 case 32: /* ARGB 8888 */ 272 pvr2fb_set_pal_type(PAL_ARGB8888); 273 var->red.offset = 16; var->red.length = 8; 274 var->green.offset = 8; var->green.length = 8; 275 var->blue.offset = 0; var->blue.length = 8; 276 var->transp.offset = 24; var->transp.length = 8; 277 break; 278 } 279 } 280 281 static int pvr2fb_setcolreg(unsigned int regno, unsigned int red, 282 unsigned int green, unsigned int blue, 283 unsigned int transp, struct fb_info *info) 284 { 285 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par; 286 unsigned int tmp; 287 288 if (regno > info->cmap.len) 289 return 1; 290 291 /* 292 * We only support the hardware palette for 16 and 32bpp. It's also 293 * expected that the palette format has been set by the time we get 294 * here, so we don't waste time setting it again. 295 */ 296 switch (info->var.bits_per_pixel) { 297 case 16: /* RGB 565 */ 298 tmp = (red & 0xf800) | 299 ((green & 0xfc00) >> 5) | 300 ((blue & 0xf800) >> 11); 301 302 pvr2fb_set_pal_entry(par, regno, tmp); 303 break; 304 case 24: /* RGB 888 */ 305 red >>= 8; green >>= 8; blue >>= 8; 306 tmp = (red << 16) | (green << 8) | blue; 307 break; 308 case 32: /* ARGB 8888 */ 309 red >>= 8; green >>= 8; blue >>= 8; 310 tmp = (transp << 24) | (red << 16) | (green << 8) | blue; 311 312 pvr2fb_set_pal_entry(par, regno, tmp); 313 break; 314 default: 315 pr_debug("Invalid bit depth %d?!?\n", info->var.bits_per_pixel); 316 return 1; 317 } 318 319 if (regno < 16) 320 ((u32*)(info->pseudo_palette))[regno] = tmp; 321 322 return 0; 323 } 324 325 /* 326 * Determine the cable type and initialize the cable output format. Don't do 327 * anything if the cable type has been overidden (via "cable:XX"). 328 */ 329 330 #define PCTRA ((void __iomem *)0xff80002c) 331 #define PDTRA ((void __iomem *)0xff800030) 332 #define VOUTC ((void __iomem *)0xa0702c00) 333 334 static int pvr2_init_cable(void) 335 { 336 if (cable_type < 0) { 337 fb_writel((fb_readl(PCTRA) & 0xfff0ffff) | 0x000a0000, 338 PCTRA); 339 cable_type = (fb_readw(PDTRA) >> 8) & 3; 340 } 341 342 /* Now select the output format (either composite or other) */ 343 /* XXX: Save the previous val first, as this reg is also AICA 344 related */ 345 if (cable_type == CT_COMPOSITE) 346 fb_writel(3 << 8, VOUTC); 347 else if (cable_type == CT_RGB) 348 fb_writel(1 << 9, VOUTC); 349 else 350 fb_writel(0, VOUTC); 351 352 return cable_type; 353 } 354 355 static int pvr2fb_set_par(struct fb_info *info) 356 { 357 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par; 358 struct fb_var_screeninfo *var = &info->var; 359 unsigned long line_length; 360 unsigned int vtotal; 361 362 /* 363 * XXX: It's possible that a user could use a VGA box, change the cable 364 * type in hardware (i.e. switch from VGA<->composite), then change 365 * modes (i.e. switching to another VT). If that happens we should 366 * automagically change the output format to cope, but currently I 367 * don't have a VGA box to make sure this works properly. 368 */ 369 cable_type = pvr2_init_cable(); 370 if (cable_type == CT_VGA && video_output != VO_VGA) 371 video_output = VO_VGA; 372 373 var->vmode &= FB_VMODE_MASK; 374 if (var->vmode & FB_VMODE_INTERLACED && video_output != VO_VGA) 375 par->is_interlaced = 1; 376 /* 377 * XXX: Need to be more creative with this (i.e. allow doublecan for 378 * PAL/NTSC output). 379 */ 380 if (var->vmode & FB_VMODE_DOUBLE && video_output == VO_VGA) 381 par->is_doublescan = 1; 382 383 par->hsync_total = var->left_margin + var->xres + var->right_margin + 384 var->hsync_len; 385 par->vsync_total = var->upper_margin + var->yres + var->lower_margin + 386 var->vsync_len; 387 388 if (var->sync & FB_SYNC_BROADCAST) { 389 vtotal = par->vsync_total; 390 if (par->is_interlaced) 391 vtotal /= 2; 392 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) { 393 /* XXX: Check for start values here... */ 394 /* XXX: Check hardware for PAL-compatibility */ 395 par->borderstart_h = 116; 396 par->borderstart_v = 44; 397 } else { 398 /* NTSC video output */ 399 par->borderstart_h = 126; 400 par->borderstart_v = 18; 401 } 402 } else { 403 /* VGA mode */ 404 /* XXX: What else needs to be checked? */ 405 /* 406 * XXX: We have a little freedom in VGA modes, what ranges 407 * should be here (i.e. hsync/vsync totals, etc.)? 408 */ 409 par->borderstart_h = 126; 410 par->borderstart_v = 40; 411 } 412 413 /* Calculate the remainding offsets */ 414 par->diwstart_h = par->borderstart_h + var->left_margin; 415 par->diwstart_v = par->borderstart_v + var->upper_margin; 416 par->borderstop_h = par->diwstart_h + var->xres + 417 var->right_margin; 418 par->borderstop_v = par->diwstart_v + var->yres + 419 var->lower_margin; 420 421 if (!par->is_interlaced) 422 par->borderstop_v /= 2; 423 if (info->var.xres < 640) 424 par->is_lowres = 1; 425 426 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel); 427 par->disp_start = info->fix.smem_start + (line_length * var->yoffset) * line_length; 428 info->fix.line_length = line_length; 429 return 0; 430 } 431 432 static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) 433 { 434 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par; 435 unsigned int vtotal, hsync_total; 436 unsigned long line_length; 437 438 if (var->pixclock != TV_CLK && var->pixclock != VGA_CLK) { 439 pr_debug("Invalid pixclock value %d\n", var->pixclock); 440 return -EINVAL; 441 } 442 443 if (var->xres < 320) 444 var->xres = 320; 445 if (var->yres < 240) 446 var->yres = 240; 447 if (var->xres_virtual < var->xres) 448 var->xres_virtual = var->xres; 449 if (var->yres_virtual < var->yres) 450 var->yres_virtual = var->yres; 451 452 if (var->bits_per_pixel <= 16) 453 var->bits_per_pixel = 16; 454 else if (var->bits_per_pixel <= 24) 455 var->bits_per_pixel = 24; 456 else if (var->bits_per_pixel <= 32) 457 var->bits_per_pixel = 32; 458 459 set_color_bitfields(var); 460 461 if (var->vmode & FB_VMODE_YWRAP) { 462 if (var->xoffset || var->yoffset >= var->yres_virtual) { 463 var->xoffset = var->yoffset = 0; 464 } else { 465 if (var->xoffset > var->xres_virtual - var->xres || 466 var->yoffset > var->yres_virtual - var->yres) 467 var->xoffset = var->yoffset = 0; 468 } 469 } else { 470 var->xoffset = var->yoffset = 0; 471 } 472 473 /* 474 * XXX: Need to be more creative with this (i.e. allow doublecan for 475 * PAL/NTSC output). 476 */ 477 if (var->yres < 480 && video_output == VO_VGA) 478 var->vmode |= FB_VMODE_DOUBLE; 479 480 if (video_output != VO_VGA) { 481 var->sync |= FB_SYNC_BROADCAST; 482 var->vmode |= FB_VMODE_INTERLACED; 483 } else { 484 var->sync &= ~FB_SYNC_BROADCAST; 485 var->vmode &= ~FB_VMODE_INTERLACED; 486 var->vmode |= FB_VMODE_NONINTERLACED; 487 } 488 489 if ((var->activate & FB_ACTIVATE_MASK) != FB_ACTIVATE_TEST) { 490 var->right_margin = par->borderstop_h - 491 (par->diwstart_h + var->xres); 492 var->left_margin = par->diwstart_h - par->borderstart_h; 493 var->hsync_len = par->borderstart_h + 494 (par->hsync_total - par->borderstop_h); 495 496 var->upper_margin = par->diwstart_v - par->borderstart_v; 497 var->lower_margin = par->borderstop_v - 498 (par->diwstart_v + var->yres); 499 var->vsync_len = par->borderstop_v + 500 (par->vsync_total - par->borderstop_v); 501 } 502 503 hsync_total = var->left_margin + var->xres + var->right_margin + 504 var->hsync_len; 505 vtotal = var->upper_margin + var->yres + var->lower_margin + 506 var->vsync_len; 507 508 if (var->sync & FB_SYNC_BROADCAST) { 509 if (var->vmode & FB_VMODE_INTERLACED) 510 vtotal /= 2; 511 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) { 512 /* PAL video output */ 513 /* XXX: Should be using a range here ... ? */ 514 if (hsync_total != PAL_HTOTAL) { 515 pr_debug("invalid hsync total for PAL\n"); 516 return -EINVAL; 517 } 518 } else { 519 /* NTSC video output */ 520 if (hsync_total != NTSC_HTOTAL) { 521 pr_debug("invalid hsync total for NTSC\n"); 522 return -EINVAL; 523 } 524 } 525 } 526 527 /* Check memory sizes */ 528 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel); 529 if (line_length * var->yres_virtual > info->fix.smem_len) 530 return -ENOMEM; 531 532 return 0; 533 } 534 535 static void pvr2_update_display(struct fb_info *info) 536 { 537 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par; 538 struct fb_var_screeninfo *var = &info->var; 539 540 /* Update the start address of the display image */ 541 fb_writel(par->disp_start, DISP_DIWADDRL); 542 fb_writel(par->disp_start + 543 get_line_length(var->xoffset+var->xres, var->bits_per_pixel), 544 DISP_DIWADDRS); 545 } 546 547 /* 548 * Initialize the video mode. Currently, the 16bpp and 24bpp modes aren't 549 * very stable. It's probably due to the fact that a lot of the 2D video 550 * registers are still undocumented. 551 */ 552 553 static void pvr2_init_display(struct fb_info *info) 554 { 555 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par; 556 struct fb_var_screeninfo *var = &info->var; 557 unsigned int diw_height, diw_width, diw_modulo = 1; 558 unsigned int bytesperpixel = var->bits_per_pixel >> 3; 559 560 /* hsync and vsync totals */ 561 fb_writel((par->vsync_total << 16) | par->hsync_total, DISP_SYNCSIZE); 562 563 /* column height, modulo, row width */ 564 /* since we're "panning" within vram, we need to offset things based 565 * on the offset from the virtual x start to our real gfx. */ 566 if (video_output != VO_VGA && par->is_interlaced) 567 diw_modulo += info->fix.line_length / 4; 568 diw_height = (par->is_interlaced ? var->yres / 2 : var->yres); 569 diw_width = get_line_length(var->xres, var->bits_per_pixel) / 4; 570 fb_writel((diw_modulo << 20) | (--diw_height << 10) | --diw_width, 571 DISP_DIWSIZE); 572 573 /* display address, long and short fields */ 574 fb_writel(par->disp_start, DISP_DIWADDRL); 575 fb_writel(par->disp_start + 576 get_line_length(var->xoffset+var->xres, var->bits_per_pixel), 577 DISP_DIWADDRS); 578 579 /* border horizontal, border vertical, border color */ 580 fb_writel((par->borderstart_h << 16) | par->borderstop_h, DISP_BRDRHORZ); 581 fb_writel((par->borderstart_v << 16) | par->borderstop_v, DISP_BRDRVERT); 582 fb_writel(0, DISP_BRDRCOLR); 583 584 /* display window start position */ 585 fb_writel(par->diwstart_h, DISP_DIWHSTRT); 586 fb_writel((par->diwstart_v << 16) | par->diwstart_v, DISP_DIWVSTRT); 587 588 /* misc. settings */ 589 fb_writel((0x16 << 16) | par->is_lowres, DISP_DIWCONF); 590 591 /* clock doubler (for VGA), scan doubler, display enable */ 592 fb_writel(((video_output == VO_VGA) << 23) | 593 (par->is_doublescan << 1) | 1, DISP_DIWMODE); 594 595 /* bits per pixel */ 596 fb_writel(fb_readl(DISP_DIWMODE) | (--bytesperpixel << 2), DISP_DIWMODE); 597 fb_writel(bytesperpixel << 2, DISP_PIXDEPTH); 598 599 /* video enable, color sync, interlace, 600 * hsync and vsync polarity (currently unused) */ 601 fb_writel(0x100 | ((par->is_interlaced /*|4*/) << 4), DISP_SYNCCONF); 602 } 603 604 /* Simulate blanking by making the border cover the entire screen */ 605 606 #define BLANK_BIT (1<<3) 607 608 static void pvr2_do_blank(void) 609 { 610 struct pvr2fb_par *par = currentpar; 611 unsigned long diwconf; 612 613 diwconf = fb_readl(DISP_DIWCONF); 614 if (do_blank > 0) 615 fb_writel(diwconf | BLANK_BIT, DISP_DIWCONF); 616 else 617 fb_writel(diwconf & ~BLANK_BIT, DISP_DIWCONF); 618 619 is_blanked = do_blank > 0 ? do_blank : 0; 620 } 621 622 static irqreturn_t __maybe_unused pvr2fb_interrupt(int irq, void *dev_id) 623 { 624 struct fb_info *info = dev_id; 625 626 if (do_vmode_pan || do_vmode_full) 627 pvr2_update_display(info); 628 if (do_vmode_full) 629 pvr2_init_display(info); 630 if (do_vmode_pan) 631 do_vmode_pan = 0; 632 if (do_vmode_full) 633 do_vmode_full = 0; 634 if (do_blank) { 635 pvr2_do_blank(); 636 do_blank = 0; 637 } 638 return IRQ_HANDLED; 639 } 640 641 #ifdef CONFIG_PVR2_DMA 642 static ssize_t pvr2fb_write(struct fb_info *info, const char *buf, 643 size_t count, loff_t *ppos) 644 { 645 unsigned long dst, start, end, len; 646 unsigned int nr_pages; 647 struct page **pages; 648 int ret, i; 649 650 nr_pages = (count + PAGE_SIZE - 1) >> PAGE_SHIFT; 651 652 pages = kmalloc_array(nr_pages, sizeof(struct page *), GFP_KERNEL); 653 if (!pages) 654 return -ENOMEM; 655 656 ret = pin_user_pages_fast((unsigned long)buf, nr_pages, FOLL_WRITE, pages); 657 if (ret < nr_pages) { 658 if (ret < 0) { 659 /* 660 * Clamp the unsigned nr_pages to zero so that the 661 * error handling works. And leave ret at whatever 662 * -errno value was returned from GUP. 663 */ 664 nr_pages = 0; 665 } else { 666 nr_pages = ret; 667 /* 668 * Use -EINVAL to represent a mildly desperate guess at 669 * why we got fewer pages (maybe even zero pages) than 670 * requested. 671 */ 672 ret = -EINVAL; 673 } 674 goto out_unmap; 675 } 676 677 dma_configure_channel(shdma, 0x12c1); 678 679 dst = (unsigned long)fb_info->screen_base + *ppos; 680 start = (unsigned long)page_address(pages[0]); 681 end = (unsigned long)page_address(pages[nr_pages]); 682 len = nr_pages << PAGE_SHIFT; 683 684 /* Half-assed contig check */ 685 if (start + len == end) { 686 /* As we do this in one shot, it's either all or nothing.. */ 687 if ((*ppos + len) > fb_info->fix.smem_len) { 688 ret = -ENOSPC; 689 goto out_unmap; 690 } 691 692 dma_write(shdma, start, 0, len); 693 dma_write(pvr2dma, 0, dst, len); 694 dma_wait_for_completion(pvr2dma); 695 696 goto out; 697 } 698 699 /* Not contiguous, writeout per-page instead.. */ 700 for (i = 0; i < nr_pages; i++, dst += PAGE_SIZE) { 701 if ((*ppos + (i << PAGE_SHIFT)) > fb_info->fix.smem_len) { 702 ret = -ENOSPC; 703 goto out_unmap; 704 } 705 706 dma_write_page(shdma, (unsigned long)page_address(pages[i]), 0); 707 dma_write_page(pvr2dma, 0, dst); 708 dma_wait_for_completion(pvr2dma); 709 } 710 711 out: 712 *ppos += count; 713 ret = count; 714 715 out_unmap: 716 unpin_user_pages(pages, nr_pages); 717 kfree(pages); 718 719 return ret; 720 } 721 #endif /* CONFIG_PVR2_DMA */ 722 723 static const struct fb_ops pvr2fb_ops = { 724 .owner = THIS_MODULE, 725 .fb_setcolreg = pvr2fb_setcolreg, 726 .fb_blank = pvr2fb_blank, 727 .fb_check_var = pvr2fb_check_var, 728 .fb_set_par = pvr2fb_set_par, 729 #ifdef CONFIG_PVR2_DMA 730 .fb_write = pvr2fb_write, 731 #endif 732 .fb_fillrect = cfb_fillrect, 733 .fb_copyarea = cfb_copyarea, 734 .fb_imageblit = cfb_imageblit, 735 }; 736 737 #ifndef MODULE 738 static int pvr2_get_param_val(const struct pvr2_params *p, const char *s, 739 int size) 740 { 741 int i; 742 743 for (i = 0; i < size; i++) { 744 if (!strncasecmp(p[i].name, s, strlen(s))) 745 return p[i].val; 746 } 747 return -1; 748 } 749 #endif 750 751 static char *pvr2_get_param_name(const struct pvr2_params *p, int val, 752 int size) 753 { 754 int i; 755 756 for (i = 0; i < size; i++) { 757 if (p[i].val == val) 758 return p[i].name; 759 } 760 return NULL; 761 } 762 763 /** 764 * pvr2fb_common_init 765 * 766 * Common init code for the PVR2 chips. 767 * 768 * This mostly takes care of the common aspects of the fb setup and 769 * registration. It's expected that the board-specific init code has 770 * already setup pvr2_fix with something meaningful at this point. 771 * 772 * Device info reporting is also done here, as well as picking a sane 773 * default from the modedb. For board-specific modelines, simply define 774 * a per-board modedb. 775 * 776 * Also worth noting is that the cable and video output types are likely 777 * always going to be VGA for the PCI-based PVR2 boards, but we leave this 778 * in for flexibility anyways. Who knows, maybe someone has tv-out on a 779 * PCI-based version of these things ;-) 780 */ 781 static int __maybe_unused pvr2fb_common_init(void) 782 { 783 struct pvr2fb_par *par = currentpar; 784 unsigned long modememused, rev; 785 786 fb_info->screen_base = ioremap(pvr2_fix.smem_start, 787 pvr2_fix.smem_len); 788 789 if (!fb_info->screen_base) { 790 printk(KERN_ERR "pvr2fb: Failed to remap smem space\n"); 791 goto out_err; 792 } 793 794 par->mmio_base = ioremap(pvr2_fix.mmio_start, 795 pvr2_fix.mmio_len); 796 if (!par->mmio_base) { 797 printk(KERN_ERR "pvr2fb: Failed to remap mmio space\n"); 798 goto out_err; 799 } 800 801 fb_memset(fb_info->screen_base, 0, pvr2_fix.smem_len); 802 803 pvr2_fix.ypanstep = nopan ? 0 : 1; 804 pvr2_fix.ywrapstep = nowrap ? 0 : 1; 805 806 fb_info->fbops = &pvr2fb_ops; 807 fb_info->fix = pvr2_fix; 808 fb_info->par = currentpar; 809 fb_info->pseudo_palette = currentpar->palette; 810 fb_info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; 811 812 if (video_output == VO_VGA) 813 defmode = DEFMODE_VGA; 814 815 if (!mode_option) 816 mode_option = "640x480@60"; 817 818 if (!fb_find_mode(&fb_info->var, fb_info, mode_option, pvr2_modedb, 819 NUM_TOTAL_MODES, &pvr2_modedb[defmode], 16)) 820 fb_info->var = pvr2_var; 821 822 fb_alloc_cmap(&fb_info->cmap, 256, 0); 823 824 if (register_framebuffer(fb_info) < 0) 825 goto out_err; 826 /*Must write PIXDEPTH to register before anything is displayed - so force init */ 827 pvr2_init_display(fb_info); 828 829 modememused = get_line_length(fb_info->var.xres_virtual, 830 fb_info->var.bits_per_pixel); 831 modememused *= fb_info->var.yres_virtual; 832 833 rev = fb_readl(par->mmio_base + 0x04); 834 835 fb_info(fb_info, "%s (rev %ld.%ld) frame buffer device, using %ldk/%ldk of video memory\n", 836 fb_info->fix.id, (rev >> 4) & 0x0f, rev & 0x0f, 837 modememused >> 10, 838 (unsigned long)(fb_info->fix.smem_len >> 10)); 839 fb_info(fb_info, "Mode %dx%d-%d pitch = %ld cable: %s video output: %s\n", 840 fb_info->var.xres, fb_info->var.yres, 841 fb_info->var.bits_per_pixel, 842 get_line_length(fb_info->var.xres, fb_info->var.bits_per_pixel), 843 pvr2_get_param_name(cables, cable_type, 3), 844 pvr2_get_param_name(outputs, video_output, 3)); 845 846 #ifdef CONFIG_SH_STORE_QUEUES 847 fb_notice(fb_info, "registering with SQ API\n"); 848 849 pvr2fb_map = sq_remap(fb_info->fix.smem_start, fb_info->fix.smem_len, 850 fb_info->fix.id, PAGE_SHARED); 851 852 fb_notice(fb_info, "Mapped video memory to SQ addr 0x%lx\n", 853 pvr2fb_map); 854 #endif 855 856 return 0; 857 858 out_err: 859 if (fb_info->screen_base) 860 iounmap(fb_info->screen_base); 861 if (par->mmio_base) 862 iounmap(par->mmio_base); 863 864 return -ENXIO; 865 } 866 867 #ifdef CONFIG_SH_DREAMCAST 868 static int __init pvr2fb_dc_init(void) 869 { 870 if (!mach_is_dreamcast()) 871 return -ENXIO; 872 873 /* Make a guess at the monitor based on the attached cable */ 874 if (pvr2_init_cable() == CT_VGA) { 875 fb_info->monspecs.hfmin = 30000; 876 fb_info->monspecs.hfmax = 70000; 877 fb_info->monspecs.vfmin = 60; 878 fb_info->monspecs.vfmax = 60; 879 } else { 880 /* Not VGA, using a TV (taken from acornfb) */ 881 fb_info->monspecs.hfmin = 15469; 882 fb_info->monspecs.hfmax = 15781; 883 fb_info->monspecs.vfmin = 49; 884 fb_info->monspecs.vfmax = 51; 885 } 886 887 /* 888 * XXX: This needs to pull default video output via BIOS or other means 889 */ 890 if (video_output < 0) { 891 if (cable_type == CT_VGA) { 892 video_output = VO_VGA; 893 } else { 894 video_output = VO_NTSC; 895 } 896 } 897 898 /* 899 * Nothing exciting about the DC PVR2 .. only a measly 8MiB. 900 */ 901 pvr2_fix.smem_start = 0xa5000000; /* RAM starts here */ 902 pvr2_fix.smem_len = 8 << 20; 903 904 pvr2_fix.mmio_start = 0xa05f8000; /* registers start here */ 905 pvr2_fix.mmio_len = 0x2000; 906 907 if (request_irq(HW_EVENT_VSYNC, pvr2fb_interrupt, IRQF_SHARED, 908 "pvr2 VBL handler", fb_info)) { 909 return -EBUSY; 910 } 911 912 #ifdef CONFIG_PVR2_DMA 913 if (request_dma(pvr2dma, "pvr2") != 0) { 914 free_irq(HW_EVENT_VSYNC, fb_info); 915 return -EBUSY; 916 } 917 #endif 918 919 return pvr2fb_common_init(); 920 } 921 922 static void pvr2fb_dc_exit(void) 923 { 924 if (fb_info->screen_base) { 925 iounmap(fb_info->screen_base); 926 fb_info->screen_base = NULL; 927 } 928 if (currentpar->mmio_base) { 929 iounmap(currentpar->mmio_base); 930 currentpar->mmio_base = NULL; 931 } 932 933 free_irq(HW_EVENT_VSYNC, fb_info); 934 #ifdef CONFIG_PVR2_DMA 935 free_dma(pvr2dma); 936 #endif 937 } 938 #endif /* CONFIG_SH_DREAMCAST */ 939 940 #ifdef CONFIG_PCI 941 static int pvr2fb_pci_probe(struct pci_dev *pdev, 942 const struct pci_device_id *ent) 943 { 944 int ret; 945 946 ret = aperture_remove_conflicting_pci_devices(pdev, "pvrfb"); 947 if (ret) 948 return ret; 949 950 ret = pci_enable_device(pdev); 951 if (ret) { 952 printk(KERN_ERR "pvr2fb: PCI enable failed\n"); 953 return ret; 954 } 955 956 ret = pci_request_regions(pdev, "pvr2fb"); 957 if (ret) { 958 printk(KERN_ERR "pvr2fb: PCI request regions failed\n"); 959 return ret; 960 } 961 962 /* 963 * Slightly more exciting than the DC PVR2 .. 16MiB! 964 */ 965 pvr2_fix.smem_start = pci_resource_start(pdev, 0); 966 pvr2_fix.smem_len = pci_resource_len(pdev, 0); 967 968 pvr2_fix.mmio_start = pci_resource_start(pdev, 1); 969 pvr2_fix.mmio_len = pci_resource_len(pdev, 1); 970 971 fb_info->device = &pdev->dev; 972 973 return pvr2fb_common_init(); 974 } 975 976 static void pvr2fb_pci_remove(struct pci_dev *pdev) 977 { 978 if (fb_info->screen_base) { 979 iounmap(fb_info->screen_base); 980 fb_info->screen_base = NULL; 981 } 982 if (currentpar->mmio_base) { 983 iounmap(currentpar->mmio_base); 984 currentpar->mmio_base = NULL; 985 } 986 987 pci_release_regions(pdev); 988 } 989 990 static const struct pci_device_id pvr2fb_pci_tbl[] = { 991 { PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_NEON250, 992 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 993 { 0, }, 994 }; 995 996 MODULE_DEVICE_TABLE(pci, pvr2fb_pci_tbl); 997 998 static struct pci_driver pvr2fb_pci_driver = { 999 .name = "pvr2fb", 1000 .id_table = pvr2fb_pci_tbl, 1001 .probe = pvr2fb_pci_probe, 1002 .remove = pvr2fb_pci_remove, 1003 }; 1004 1005 static int __init pvr2fb_pci_init(void) 1006 { 1007 return pci_register_driver(&pvr2fb_pci_driver); 1008 } 1009 1010 static void pvr2fb_pci_exit(void) 1011 { 1012 pci_unregister_driver(&pvr2fb_pci_driver); 1013 } 1014 #endif /* CONFIG_PCI */ 1015 1016 /* 1017 * Parse command arguments. Supported arguments are: 1018 * inverse Use inverse color maps 1019 * cable:composite|rgb|vga Override the video cable type 1020 * output:NTSC|PAL|VGA Override the video output format 1021 * 1022 * <xres>x<yres>[-<bpp>][@<refresh>] or, 1023 * <name>[-<bpp>][@<refresh>] Startup using this video mode 1024 */ 1025 1026 #ifndef MODULE 1027 static int __init pvr2fb_setup(char *options) 1028 { 1029 char *this_opt; 1030 char cable_arg[80]; 1031 char output_arg[80]; 1032 1033 if (!options || !*options) 1034 return 0; 1035 1036 cable_arg[0] = output_arg[0] = 0; 1037 1038 while ((this_opt = strsep(&options, ","))) { 1039 if (!*this_opt) 1040 continue; 1041 if (!strcmp(this_opt, "inverse")) { 1042 fb_invert_cmaps(); 1043 } else if (!strncmp(this_opt, "cable:", 6)) { 1044 strcpy(cable_arg, this_opt + 6); 1045 } else if (!strncmp(this_opt, "output:", 7)) { 1046 strcpy(output_arg, this_opt + 7); 1047 } else if (!strncmp(this_opt, "nopan", 5)) { 1048 nopan = 1; 1049 } else if (!strncmp(this_opt, "nowrap", 6)) { 1050 nowrap = 1; 1051 } else { 1052 mode_option = this_opt; 1053 } 1054 } 1055 1056 if (*cable_arg) 1057 cable_type = pvr2_get_param_val(cables, cable_arg, 3); 1058 if (*output_arg) 1059 video_output = pvr2_get_param_val(outputs, output_arg, 3); 1060 1061 return 0; 1062 } 1063 #endif 1064 1065 static struct pvr2_board { 1066 int (*init)(void); 1067 void (*exit)(void); 1068 char name[16]; 1069 } board_driver[] __refdata = { 1070 #ifdef CONFIG_SH_DREAMCAST 1071 { pvr2fb_dc_init, pvr2fb_dc_exit, "Sega DC PVR2" }, 1072 #endif 1073 #ifdef CONFIG_PCI 1074 { pvr2fb_pci_init, pvr2fb_pci_exit, "PCI PVR2" }, 1075 #endif 1076 { 0, }, 1077 }; 1078 1079 static int __init pvr2fb_init(void) 1080 { 1081 int i, ret = -ENODEV; 1082 1083 #ifndef MODULE 1084 char *option = NULL; 1085 1086 if (fb_get_options("pvr2fb", &option)) 1087 return -ENODEV; 1088 pvr2fb_setup(option); 1089 #endif 1090 1091 fb_info = framebuffer_alloc(sizeof(struct pvr2fb_par), NULL); 1092 if (!fb_info) 1093 return -ENOMEM; 1094 1095 currentpar = fb_info->par; 1096 1097 for (i = 0; i < ARRAY_SIZE(board_driver); i++) { 1098 struct pvr2_board *pvr_board = board_driver + i; 1099 1100 if (!pvr_board->init) 1101 continue; 1102 1103 ret = pvr_board->init(); 1104 1105 if (ret != 0) { 1106 printk(KERN_ERR "pvr2fb: Failed init of %s device\n", 1107 pvr_board->name); 1108 framebuffer_release(fb_info); 1109 break; 1110 } 1111 } 1112 1113 return ret; 1114 } 1115 1116 static void __exit pvr2fb_exit(void) 1117 { 1118 int i; 1119 1120 for (i = 0; i < ARRAY_SIZE(board_driver); i++) { 1121 struct pvr2_board *pvr_board = board_driver + i; 1122 1123 if (pvr_board->exit) 1124 pvr_board->exit(); 1125 } 1126 1127 #ifdef CONFIG_SH_STORE_QUEUES 1128 sq_unmap(pvr2fb_map); 1129 #endif 1130 1131 unregister_framebuffer(fb_info); 1132 framebuffer_release(fb_info); 1133 } 1134 1135 module_init(pvr2fb_init); 1136 module_exit(pvr2fb_exit); 1137 1138 MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, M. R. Brown <mrbrown@0xd6.org>"); 1139 MODULE_DESCRIPTION("Framebuffer driver for NEC PowerVR 2 based graphics boards"); 1140 MODULE_LICENSE("GPL"); 1141