1 /* 2 * linux/drivers/video/platinumfb-hw.c -- Frame buffer device for the 3 * Platinum on-board video in PowerMac 7200s (and some clones based 4 * on the same motherboard.) 5 * 6 * Created 09 Feb 1998 by Jon Howell <jonh@cs.dartmouth.edu> 7 * 8 * Copyright (C) 1998 Jon Howell 9 * 10 * based on drivers/macintosh/platinum.c: Console support 11 * for PowerMac "platinum" display adaptor. 12 * Copyright (C) 1996 Paul Mackerras and Mark Abene. 13 * 14 * based on skeletonfb.c: 15 * Created 28 Dec 1997 by Geert Uytterhoeven 16 * 17 * This file is subject to the terms and conditions of the GNU General Public 18 * License. See the file COPYING in the main directory of this archive 19 * for more details. 20 */ 21 22 /* 23 * Structure of the registers for the DACula colormap device. 24 */ 25 struct cmap_regs { 26 unsigned char addr; 27 char pad1[15]; 28 unsigned char d1; 29 char pad2[15]; 30 unsigned char d2; 31 char pad3[15]; 32 unsigned char lut; 33 char pad4[15]; 34 }; 35 36 /* 37 * Structure of the registers for the "platinum" display adaptor". 38 */ 39 struct preg { /* padded register */ 40 unsigned r; /* notice this is 32 bits. */ 41 char pad[12]; 42 }; 43 44 struct platinum_regs { 45 struct preg reg[128]; 46 }; 47 48 /* 49 * Register initialization tables for the platinum display. 50 * 51 * It seems that there are two different types of platinum display 52 * out there. Older ones use the values in clocksel[1], for which 53 * the formula for the clock frequency seems to be 54 * F = 14.3MHz * c0 / (c1 & 0x1f) / (1 << (c1 >> 5)) 55 * Newer ones use the values in clocksel[0], for which the formula 56 * seems to be 57 * F = 15MHz * c0 / ((c1 & 0x1f) + 2) / (1 << (c1 >> 5)) 58 */ 59 struct platinum_regvals { 60 int fb_offset; 61 int pitch[3]; 62 unsigned regs[26]; 63 unsigned char offset[3]; 64 unsigned char mode[3]; 65 unsigned char dacula_ctrl[3]; 66 unsigned char clock_params[2][2]; 67 }; 68 69 #define DIV2 0x20 70 #define DIV4 0x40 71 #define DIV8 0x60 72 #define DIV16 0x80 73 74 /* 1280x1024, 75Hz (20) */ 75 static struct platinum_regvals platinum_reg_init_20 = { 76 0x5c00, 77 { 1312, 2592, 2592 }, 78 { 0xffc, 4, 0, 0, 0, 0, 0x428, 0, 79 0, 0xb3, 0xd3, 0x12, 0x1a5, 0x23, 0x28, 0x2d, 80 0x5e, 0x19e, 0x1a4, 0x854, 0x852, 4, 9, 0x50, 81 0x850, 0x851 }, { 0x58, 0x5d, 0x5d }, 82 { 0, 0xff, 0xff }, { 0x51, 0x55, 0x55 }, 83 {{ 45, 3 }, { 66, 7 }} 84 }; 85 86 /* 1280x960, 75Hz (19) */ 87 static struct platinum_regvals platinum_reg_init_19 = { 88 0x5c00, 89 { 1312, 2592, 2592 }, 90 { 0xffc, 4, 0, 0, 0, 0, 0x428, 0, 91 0, 0xb2, 0xd2, 0x12, 0x1a3, 0x23, 0x28, 0x2d, 92 0x5c, 0x19c, 0x1a2, 0x7d0, 0x7ce, 4, 9, 0x4c, 93 0x7cc, 0x7cd }, { 0x56, 0x5b, 0x5b }, 94 { 0, 0xff, 0xff }, { 0x51, 0x55, 0x55 }, 95 {{ 42, 3 }, { 44, 5 }} 96 }; 97 98 /* 1152x870, 75Hz (18) */ 99 static struct platinum_regvals platinum_reg_init_18 = { 100 0x11b0, 101 { 1184, 2336, 4640 }, 102 { 0xff0, 4, 0, 0, 0, 0, 0x38f, 0, 103 0, 0x294, 0x16c, 0x20, 0x2d7, 0x3f, 0x49, 0x53, 104 0x82, 0x2c2, 0x2d6, 0x726, 0x724, 4, 9, 0x52, 105 0x71e, 0x722 }, { 0x74, 0x7c, 0x81 }, 106 { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, 107 {{ 26, 0 + DIV2 }, { 42, 6 }} 108 }; 109 110 /* 1024x768, 75Hz (17) */ 111 static struct platinum_regvals platinum_reg_init_17 = { 112 0x10b0, 113 { 1056, 2080, 4128 }, 114 { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, 115 0, 0x254, 0x14b, 0x18, 0x295, 0x2f, 0x32, 0x3b, 116 0x80, 0x280, 0x296, 0x648, 0x646, 4, 9, 0x40, 117 0x640, 0x644 }, { 0x72, 0x7a, 0x7f }, 118 { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, 119 {{ 54, 3 + DIV2 }, { 67, 12 }} 120 }; 121 122 /* 1024x768, 75Hz (16) */ 123 static struct platinum_regvals platinum_reg_init_16 = { 124 0x10b0, 125 { 1056, 2080, 4128 }, 126 { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, 127 0, 0x250, 0x147, 0x17, 0x28f, 0x2f, 0x35, 0x47, 128 0x82, 0x282, 0x28e, 0x640, 0x63e, 4, 9, 0x3c, 129 0x63c, 0x63d }, { 0x74, 0x7c, 0x81 }, 130 { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, 131 {{ 20, 0 + DIV2 }, { 11, 2 }} 132 }; 133 134 /* 1024x768, 70Hz (15) */ 135 static struct platinum_regvals platinum_reg_init_15 = { 136 0x10b0, 137 { 1056, 2080, 4128 }, 138 { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, 139 0, 0x254, 0x14b, 0x22, 0x297, 0x43, 0x49, 0x5b, 140 0x86, 0x286, 0x296, 0x64c, 0x64a, 0xa, 0xf, 0x44, 141 0x644, 0x646 }, { 0x78, 0x80, 0x85 }, 142 { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, 143 {{ 19, 0 + DIV2 }, { 110, 21 }} 144 }; 145 146 /* 1024x768, 60Hz (14) */ 147 static struct platinum_regvals platinum_reg_init_14 = { 148 0x10b0, 149 { 1056, 2080, 4128 }, 150 { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, 151 0, 0x25a, 0x14f, 0x22, 0x29f, 0x43, 0x49, 0x5b, 152 0x8e, 0x28e, 0x29e, 0x64c, 0x64a, 0xa, 0xf, 0x44, 153 0x644, 0x646 }, { 0x80, 0x88, 0x8d }, 154 { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, 155 {{ 71, 6 + DIV2 }, { 118, 13 + DIV2 }} 156 }; 157 158 /* 832x624, 75Hz (13) */ 159 static struct platinum_regvals platinum_reg_init_13 = { 160 0x70, 161 { 864, 1680, 3344 }, /* MacOS does 1680 instead of 1696 to fit 16bpp in 1MB, 162 * and we use 3344 instead of 3360 to fit in 2Mb 163 */ 164 { 0xff0, 4, 0, 0, 0, 0, 0x299, 0, 165 0, 0x21e, 0x120, 0x10, 0x23f, 0x1f, 0x25, 0x37, 166 0x8a, 0x22a, 0x23e, 0x536, 0x534, 4, 9, 0x52, 167 0x532, 0x533 }, { 0x7c, 0x84, 0x89 }, 168 { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, 169 {{ 30, 0 + DIV4 }, { 56, 7 + DIV2 }} 170 }; 171 172 /* 800x600, 75Hz (12) */ 173 static struct platinum_regvals platinum_reg_init_12 = { 174 0x1010, 175 { 832, 1632, 3232 }, 176 { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, 177 0, 0x1ce, 0x108, 0x14, 0x20f, 0x27, 0x30, 0x39, 178 0x72, 0x202, 0x20e, 0x4e2, 0x4e0, 4, 9, 0x2e, 179 0x4de, 0x4df }, { 0x64, 0x6c, 0x71 }, 180 { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, 181 {{ 122, 7 + DIV4 }, { 62, 9 + DIV2 }} 182 }; 183 184 /* 800x600, 72Hz (11) */ 185 static struct platinum_regvals platinum_reg_init_11 = { 186 0x1010, 187 { 832, 1632, 3232 }, 188 { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, 189 0, 0x1ca, 0x104, 0x1e, 0x207, 0x3b, 0x44, 0x4d, 190 0x56, 0x1e6, 0x206, 0x534, 0x532, 0xa, 0xe, 0x38, 191 0x4e8, 0x4ec }, { 0x48, 0x50, 0x55 }, 192 { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, 193 {{ 26, 0 + DIV4 }, { 42, 6 + DIV2 }} 194 }; 195 196 /* 800x600, 60Hz (10) */ 197 static struct platinum_regvals platinum_reg_init_10 = { 198 0x1010, 199 { 832, 1632, 3232 }, 200 { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, 201 0, 0x1ce, 0x108, 0x20, 0x20f, 0x3f, 0x45, 0x5d, 202 0x66, 0x1f6, 0x20e, 0x4e8, 0x4e6, 6, 0xa, 0x34, 203 0x4e4, 0x4e5 }, { 0x58, 0x60, 0x65 }, 204 { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, 205 {{ 54, 3 + DIV4 }, { 95, 1 + DIV8 }} 206 }; 207 208 /* 800x600, 56Hz (9) --unsupported? copy of mode 10 for now... */ 209 static struct platinum_regvals platinum_reg_init_9 = { 210 0x1010, 211 { 832, 1632, 3232 }, 212 { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, 213 0, 0x1ce, 0x108, 0x20, 0x20f, 0x3f, 0x45, 0x5d, 214 0x66, 0x1f6, 0x20e, 0x4e8, 0x4e6, 6, 0xa, 0x34, 215 0x4e4, 0x4e5 }, { 0x58, 0x60, 0x65 }, 216 { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, 217 {{ 54, 3 + DIV4 }, { 88, 1 + DIV8 }} 218 }; 219 220 /* 768x576, 50Hz Interlaced-PAL (8) */ 221 static struct platinum_regvals platinum_reg_init_8 = { 222 0x1010, 223 { 800, 1568, 3104 }, 224 { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, 225 0, 0xc8, 0xec, 0x11, 0x1d7, 0x22, 0x25, 0x36, 226 0x47, 0x1c7, 0x1d6, 0x271, 0x270, 4, 9, 0x27, 227 0x267, 0x26b }, { 0x39, 0x41, 0x46 }, 228 { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, 229 {{ 31, 0 + DIV16 }, { 74, 9 + DIV8 }} 230 }; 231 232 /* 640x870, 75Hz Portrait (7) */ 233 static struct platinum_regvals platinum_reg_init_7 = { 234 0xb10, 235 { 672, 1312, 2592 }, 236 { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, 237 0, 0x176, 0xd0, 0x14, 0x19f, 0x27, 0x2d, 0x3f, 238 0x4a, 0x18a, 0x19e, 0x72c, 0x72a, 4, 9, 0x58, 239 0x724, 0x72a }, { 0x3c, 0x44, 0x49 }, 240 { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, 241 {{ 30, 0 + DIV4 }, { 56, 7 + DIV2 }} 242 }; 243 244 /* 640x480, 67Hz (6) */ 245 static struct platinum_regvals platinum_reg_init_6 = { 246 0x1010, 247 { 672, 1312, 2592 }, 248 { 0xff0, 4, 0, 0, 0, 0, 0x209, 0, 249 0, 0x18e, 0xd8, 0x10, 0x1af, 0x1f, 0x25, 0x37, 250 0x4a, 0x18a, 0x1ae, 0x41a, 0x418, 4, 9, 0x52, 251 0x412, 0x416 }, { 0x3c, 0x44, 0x49 }, 252 { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, 253 {{ 99, 4 + DIV8 }, { 42, 5 + DIV4 }} 254 }; 255 256 /* 640x480, 60Hz (5) */ 257 static struct platinum_regvals platinum_reg_init_5 = { 258 0x1010, 259 { 672, 1312, 2592 }, 260 { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, 261 0, 0x15e, 0xc8, 0x18, 0x18f, 0x2f, 0x35, 0x3e, 262 0x42, 0x182, 0x18e, 0x41a, 0x418, 2, 7, 0x44, 263 0x404, 0x408 }, { 0x34, 0x3c, 0x41 }, 264 { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, 265 {{ 26, 0 + DIV8 }, { 14, 2 + DIV4 }} 266 }; 267 268 /* 640x480, 60Hz Interlaced-NTSC (4) */ 269 static struct platinum_regvals platinum_reg_init_4 = { 270 0x1010, 271 { 672, 1312, 2592 }, 272 { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, 273 0, 0xa5, 0xc3, 0xe, 0x185, 0x1c, 0x1f, 0x30, 274 0x37, 0x177, 0x184, 0x20d, 0x20c, 5, 0xb, 0x23, 275 0x203, 0x206 }, { 0x29, 0x31, 0x36 }, 276 { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, 277 {{ 94, 5 + DIV16 }, { 48, 7 + DIV8 }} 278 }; 279 280 /* 640x480, 50Hz Interlaced-PAL (3) */ 281 static struct platinum_regvals platinum_reg_init_3 = { 282 0x1010, 283 { 672, 1312, 2592 }, 284 { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, 285 0, 0xc8, 0xec, 0x11, 0x1d7, 0x22, 0x25, 0x36, 286 0x67, 0x1a7, 0x1d6, 0x271, 0x270, 4, 9, 0x57, 287 0x237, 0x26b }, { 0x59, 0x61, 0x66 }, 288 { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, 289 {{ 31, 0 + DIV16 }, { 74, 9 + DIV8 }} 290 }; 291 292 /* 512x384, 60Hz (2) */ 293 static struct platinum_regvals platinum_reg_init_2 = { 294 0x1010, 295 { 544, 1056, 2080 }, 296 { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, 297 0, 0x25c, 0x140, 0x10, 0x27f, 0x1f, 0x2b, 0x4f, 298 0x68, 0x268, 0x27e, 0x32e, 0x32c, 4, 9, 0x2a, 299 0x32a, 0x32b }, { 0x5a, 0x62, 0x67 }, 300 { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, 301 {{ 33, 2 + DIV8 }, { 79, 9 + DIV8 }} 302 }; 303 304 /* 512x384, 60Hz Interlaced-NTSC (1) */ 305 static struct platinum_regvals platinum_reg_init_1 = { 306 0x1010, 307 { 544, 1056, 2080 }, 308 { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, 309 0, 0xa5, 0xc3, 0xe, 0x185, 0x1c, 0x1f, 0x30, 310 0x57, 0x157, 0x184, 0x20d, 0x20c, 5, 0xb, 0x53, 311 0x1d3, 0x206 }, { 0x49, 0x51, 0x56 }, 312 { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, 313 {{ 94, 5 + DIV16 }, { 48, 7 + DIV8 }} 314 }; 315 316 static struct platinum_regvals *platinum_reg_init[VMODE_MAX] = { 317 &platinum_reg_init_1, 318 &platinum_reg_init_2, 319 &platinum_reg_init_3, 320 &platinum_reg_init_4, 321 &platinum_reg_init_5, 322 &platinum_reg_init_6, 323 &platinum_reg_init_7, 324 &platinum_reg_init_8, 325 &platinum_reg_init_9, 326 &platinum_reg_init_10, 327 &platinum_reg_init_11, 328 &platinum_reg_init_12, 329 &platinum_reg_init_13, 330 &platinum_reg_init_14, 331 &platinum_reg_init_15, 332 &platinum_reg_init_16, 333 &platinum_reg_init_17, 334 &platinum_reg_init_18, 335 &platinum_reg_init_19, 336 &platinum_reg_init_20 337 }; 338 339 struct vmode_attr { 340 int hres; 341 int vres; 342 int vfreq; 343 int interlaced; 344 }; 345 346 struct vmode_attr vmode_attrs[VMODE_MAX] = { 347 {512, 384, 60, 1}, 348 {512, 384, 60}, 349 {640, 480, 50, 1}, 350 {640, 480, 60, 1}, 351 {640, 480, 60}, 352 {640, 480, 67}, 353 {640, 870, 75}, 354 {768, 576, 50, 1}, 355 {800, 600, 56}, 356 {800, 600, 60}, 357 {800, 600, 72}, 358 {800, 600, 75}, 359 {832, 624, 75}, 360 {1024, 768, 60}, 361 {1024, 768, 72}, 362 {1024, 768, 75}, 363 {1024, 768, 75}, 364 {1152, 870, 75}, 365 {1280, 960, 75}, 366 {1280, 1024, 75} 367 }; 368 369