1 /* 2 * HDMI driver for OMAP5 3 * 4 * Copyright (C) 2014 Texas Instruments Incorporated 5 * 6 * Authors: 7 * Yong Zhi 8 * Mythri pk 9 * Archit Taneja <archit@ti.com> 10 * Tomi Valkeinen <tomi.valkeinen@ti.com> 11 * 12 * This program is free software; you can redistribute it and/or modify it 13 * under the terms of the GNU General Public License version 2 as published by 14 * the Free Software Foundation. 15 * 16 * This program is distributed in the hope that it will be useful, but WITHOUT 17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 19 * more details. 20 * 21 * You should have received a copy of the GNU General Public License along with 22 * this program. If not, see <http://www.gnu.org/licenses/>. 23 */ 24 25 #define DSS_SUBSYS_NAME "HDMI" 26 27 #include <linux/kernel.h> 28 #include <linux/module.h> 29 #include <linux/err.h> 30 #include <linux/io.h> 31 #include <linux/interrupt.h> 32 #include <linux/mutex.h> 33 #include <linux/delay.h> 34 #include <linux/string.h> 35 #include <linux/platform_device.h> 36 #include <linux/pm_runtime.h> 37 #include <linux/clk.h> 38 #include <linux/gpio.h> 39 #include <linux/regulator/consumer.h> 40 #include <linux/component.h> 41 #include <video/omapfb_dss.h> 42 #include <sound/omap-hdmi-audio.h> 43 44 #include "hdmi5_core.h" 45 #include "dss.h" 46 #include "dss_features.h" 47 48 static struct omap_hdmi hdmi; 49 50 static int hdmi_runtime_get(void) 51 { 52 int r; 53 54 DSSDBG("hdmi_runtime_get\n"); 55 56 r = pm_runtime_get_sync(&hdmi.pdev->dev); 57 WARN_ON(r < 0); 58 if (r < 0) 59 return r; 60 61 return 0; 62 } 63 64 static void hdmi_runtime_put(void) 65 { 66 int r; 67 68 DSSDBG("hdmi_runtime_put\n"); 69 70 r = pm_runtime_put_sync(&hdmi.pdev->dev); 71 WARN_ON(r < 0 && r != -ENOSYS); 72 } 73 74 static irqreturn_t hdmi_irq_handler(int irq, void *data) 75 { 76 struct hdmi_wp_data *wp = data; 77 u32 irqstatus; 78 79 irqstatus = hdmi_wp_get_irqstatus(wp); 80 hdmi_wp_set_irqstatus(wp, irqstatus); 81 82 if ((irqstatus & HDMI_IRQ_LINK_CONNECT) && 83 irqstatus & HDMI_IRQ_LINK_DISCONNECT) { 84 u32 v; 85 /* 86 * If we get both connect and disconnect interrupts at the same 87 * time, turn off the PHY, clear interrupts, and restart, which 88 * raises connect interrupt if a cable is connected, or nothing 89 * if cable is not connected. 90 */ 91 92 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); 93 94 /* 95 * We always get bogus CONNECT & DISCONNECT interrupts when 96 * setting the PHY to LDOON. To ignore those, we force the RXDET 97 * line to 0 until the PHY power state has been changed. 98 */ 99 v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL); 100 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */ 101 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */ 102 hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v); 103 104 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | 105 HDMI_IRQ_LINK_DISCONNECT); 106 107 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); 108 109 REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15); 110 111 } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) { 112 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); 113 } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) { 114 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); 115 } 116 117 return IRQ_HANDLED; 118 } 119 120 static int hdmi_init_regulator(void) 121 { 122 int r; 123 struct regulator *reg; 124 125 if (hdmi.vdda_reg != NULL) 126 return 0; 127 128 reg = devm_regulator_get(&hdmi.pdev->dev, "vdda"); 129 if (IS_ERR(reg)) { 130 DSSERR("can't get VDDA regulator\n"); 131 return PTR_ERR(reg); 132 } 133 134 r = regulator_set_voltage(reg, 1800000, 1800000); 135 if (r) { 136 devm_regulator_put(reg); 137 DSSWARN("can't set the regulator voltage\n"); 138 return r; 139 } 140 141 hdmi.vdda_reg = reg; 142 143 return 0; 144 } 145 146 static int hdmi_power_on_core(struct omap_dss_device *dssdev) 147 { 148 int r; 149 150 r = regulator_enable(hdmi.vdda_reg); 151 if (r) 152 return r; 153 154 r = hdmi_runtime_get(); 155 if (r) 156 goto err_runtime_get; 157 158 /* Make selection of HDMI in DSS */ 159 dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK); 160 161 hdmi.core_enabled = true; 162 163 return 0; 164 165 err_runtime_get: 166 regulator_disable(hdmi.vdda_reg); 167 168 return r; 169 } 170 171 static void hdmi_power_off_core(struct omap_dss_device *dssdev) 172 { 173 hdmi.core_enabled = false; 174 175 hdmi_runtime_put(); 176 regulator_disable(hdmi.vdda_reg); 177 } 178 179 static int hdmi_power_on_full(struct omap_dss_device *dssdev) 180 { 181 int r; 182 struct omap_video_timings *p; 183 struct omap_overlay_manager *mgr = hdmi.output.manager; 184 struct dss_pll_clock_info hdmi_cinfo = { 0 }; 185 186 r = hdmi_power_on_core(dssdev); 187 if (r) 188 return r; 189 190 p = &hdmi.cfg.timings; 191 192 DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res); 193 194 hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo); 195 196 /* disable and clear irqs */ 197 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff); 198 hdmi_wp_set_irqstatus(&hdmi.wp, 199 hdmi_wp_get_irqstatus(&hdmi.wp)); 200 201 r = dss_pll_enable(&hdmi.pll.pll); 202 if (r) { 203 DSSERR("Failed to enable PLL\n"); 204 goto err_pll_enable; 205 } 206 207 r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo); 208 if (r) { 209 DSSERR("Failed to configure PLL\n"); 210 goto err_pll_cfg; 211 } 212 213 r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco, 214 hdmi_cinfo.clkout[0]); 215 if (r) { 216 DSSDBG("Failed to start PHY\n"); 217 goto err_phy_cfg; 218 } 219 220 r = hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_LDOON); 221 if (r) 222 goto err_phy_pwr; 223 224 hdmi5_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg); 225 226 /* bypass TV gamma table */ 227 dispc_enable_gamma_table(0); 228 229 /* tv size */ 230 dss_mgr_set_timings(mgr, p); 231 232 r = hdmi_wp_video_start(&hdmi.wp); 233 if (r) 234 goto err_vid_enable; 235 236 r = dss_mgr_enable(mgr); 237 if (r) 238 goto err_mgr_enable; 239 240 hdmi_wp_set_irqenable(&hdmi.wp, 241 HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT); 242 243 return 0; 244 245 err_mgr_enable: 246 hdmi_wp_video_stop(&hdmi.wp); 247 err_vid_enable: 248 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF); 249 err_phy_pwr: 250 err_phy_cfg: 251 err_pll_cfg: 252 dss_pll_disable(&hdmi.pll.pll); 253 err_pll_enable: 254 hdmi_power_off_core(dssdev); 255 return -EIO; 256 } 257 258 static void hdmi_power_off_full(struct omap_dss_device *dssdev) 259 { 260 struct omap_overlay_manager *mgr = hdmi.output.manager; 261 262 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff); 263 264 dss_mgr_disable(mgr); 265 266 hdmi_wp_video_stop(&hdmi.wp); 267 268 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF); 269 270 dss_pll_disable(&hdmi.pll.pll); 271 272 hdmi_power_off_core(dssdev); 273 } 274 275 static int hdmi_display_check_timing(struct omap_dss_device *dssdev, 276 struct omap_video_timings *timings) 277 { 278 struct omap_dss_device *out = &hdmi.output; 279 280 /* TODO: proper interlace support */ 281 if (timings->interlace) 282 return -EINVAL; 283 284 if (!dispc_mgr_timings_ok(out->dispc_channel, timings)) 285 return -EINVAL; 286 287 return 0; 288 } 289 290 static void hdmi_display_set_timing(struct omap_dss_device *dssdev, 291 struct omap_video_timings *timings) 292 { 293 mutex_lock(&hdmi.lock); 294 295 hdmi.cfg.timings = *timings; 296 297 dispc_set_tv_pclk(timings->pixelclock); 298 299 mutex_unlock(&hdmi.lock); 300 } 301 302 static void hdmi_display_get_timings(struct omap_dss_device *dssdev, 303 struct omap_video_timings *timings) 304 { 305 *timings = hdmi.cfg.timings; 306 } 307 308 static void hdmi_dump_regs(struct seq_file *s) 309 { 310 mutex_lock(&hdmi.lock); 311 312 if (hdmi_runtime_get()) { 313 mutex_unlock(&hdmi.lock); 314 return; 315 } 316 317 hdmi_wp_dump(&hdmi.wp, s); 318 hdmi_pll_dump(&hdmi.pll, s); 319 hdmi_phy_dump(&hdmi.phy, s); 320 hdmi5_core_dump(&hdmi.core, s); 321 322 hdmi_runtime_put(); 323 mutex_unlock(&hdmi.lock); 324 } 325 326 static int read_edid(u8 *buf, int len) 327 { 328 int r; 329 int idlemode; 330 331 mutex_lock(&hdmi.lock); 332 333 r = hdmi_runtime_get(); 334 BUG_ON(r); 335 336 idlemode = REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2); 337 /* No-idle mode */ 338 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2); 339 340 r = hdmi5_read_edid(&hdmi.core, buf, len); 341 342 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2); 343 344 hdmi_runtime_put(); 345 mutex_unlock(&hdmi.lock); 346 347 return r; 348 } 349 350 static void hdmi_start_audio_stream(struct omap_hdmi *hd) 351 { 352 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2); 353 hdmi_wp_audio_enable(&hd->wp, true); 354 hdmi_wp_audio_core_req_enable(&hd->wp, true); 355 } 356 357 static void hdmi_stop_audio_stream(struct omap_hdmi *hd) 358 { 359 hdmi_wp_audio_core_req_enable(&hd->wp, false); 360 hdmi_wp_audio_enable(&hd->wp, false); 361 REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2); 362 } 363 364 static int hdmi_display_enable(struct omap_dss_device *dssdev) 365 { 366 struct omap_dss_device *out = &hdmi.output; 367 unsigned long flags; 368 int r = 0; 369 370 DSSDBG("ENTER hdmi_display_enable\n"); 371 372 mutex_lock(&hdmi.lock); 373 374 if (out->manager == NULL) { 375 DSSERR("failed to enable display: no output/manager\n"); 376 r = -ENODEV; 377 goto err0; 378 } 379 380 r = hdmi_power_on_full(dssdev); 381 if (r) { 382 DSSERR("failed to power on device\n"); 383 goto err0; 384 } 385 386 if (hdmi.audio_configured) { 387 r = hdmi5_audio_config(&hdmi.core, &hdmi.wp, &hdmi.audio_config, 388 hdmi.cfg.timings.pixelclock); 389 if (r) { 390 DSSERR("Error restoring audio configuration: %d", r); 391 hdmi.audio_abort_cb(&hdmi.pdev->dev); 392 hdmi.audio_configured = false; 393 } 394 } 395 396 spin_lock_irqsave(&hdmi.audio_playing_lock, flags); 397 if (hdmi.audio_configured && hdmi.audio_playing) 398 hdmi_start_audio_stream(&hdmi); 399 hdmi.display_enabled = true; 400 spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags); 401 402 mutex_unlock(&hdmi.lock); 403 return 0; 404 405 err0: 406 mutex_unlock(&hdmi.lock); 407 return r; 408 } 409 410 static void hdmi_display_disable(struct omap_dss_device *dssdev) 411 { 412 unsigned long flags; 413 414 DSSDBG("Enter hdmi_display_disable\n"); 415 416 mutex_lock(&hdmi.lock); 417 418 spin_lock_irqsave(&hdmi.audio_playing_lock, flags); 419 hdmi_stop_audio_stream(&hdmi); 420 hdmi.display_enabled = false; 421 spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags); 422 423 hdmi_power_off_full(dssdev); 424 425 mutex_unlock(&hdmi.lock); 426 } 427 428 static int hdmi_core_enable(struct omap_dss_device *dssdev) 429 { 430 int r = 0; 431 432 DSSDBG("ENTER omapdss_hdmi_core_enable\n"); 433 434 mutex_lock(&hdmi.lock); 435 436 r = hdmi_power_on_core(dssdev); 437 if (r) { 438 DSSERR("failed to power on device\n"); 439 goto err0; 440 } 441 442 mutex_unlock(&hdmi.lock); 443 return 0; 444 445 err0: 446 mutex_unlock(&hdmi.lock); 447 return r; 448 } 449 450 static void hdmi_core_disable(struct omap_dss_device *dssdev) 451 { 452 DSSDBG("Enter omapdss_hdmi_core_disable\n"); 453 454 mutex_lock(&hdmi.lock); 455 456 hdmi_power_off_core(dssdev); 457 458 mutex_unlock(&hdmi.lock); 459 } 460 461 static int hdmi_connect(struct omap_dss_device *dssdev, 462 struct omap_dss_device *dst) 463 { 464 struct omap_overlay_manager *mgr; 465 int r; 466 467 r = hdmi_init_regulator(); 468 if (r) 469 return r; 470 471 mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel); 472 if (!mgr) 473 return -ENODEV; 474 475 r = dss_mgr_connect(mgr, dssdev); 476 if (r) 477 return r; 478 479 r = omapdss_output_set_device(dssdev, dst); 480 if (r) { 481 DSSERR("failed to connect output to new device: %s\n", 482 dst->name); 483 dss_mgr_disconnect(mgr, dssdev); 484 return r; 485 } 486 487 return 0; 488 } 489 490 static void hdmi_disconnect(struct omap_dss_device *dssdev, 491 struct omap_dss_device *dst) 492 { 493 WARN_ON(dst != dssdev->dst); 494 495 if (dst != dssdev->dst) 496 return; 497 498 omapdss_output_unset_device(dssdev); 499 500 if (dssdev->manager) 501 dss_mgr_disconnect(dssdev->manager, dssdev); 502 } 503 504 static int hdmi_read_edid(struct omap_dss_device *dssdev, 505 u8 *edid, int len) 506 { 507 bool need_enable; 508 int r; 509 510 need_enable = hdmi.core_enabled == false; 511 512 if (need_enable) { 513 r = hdmi_core_enable(dssdev); 514 if (r) 515 return r; 516 } 517 518 r = read_edid(edid, len); 519 520 if (need_enable) 521 hdmi_core_disable(dssdev); 522 523 return r; 524 } 525 526 static int hdmi_set_infoframe(struct omap_dss_device *dssdev, 527 const struct hdmi_avi_infoframe *avi) 528 { 529 hdmi.cfg.infoframe = *avi; 530 return 0; 531 } 532 533 static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev, 534 bool hdmi_mode) 535 { 536 hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI; 537 return 0; 538 } 539 540 static const struct omapdss_hdmi_ops hdmi_ops = { 541 .connect = hdmi_connect, 542 .disconnect = hdmi_disconnect, 543 544 .enable = hdmi_display_enable, 545 .disable = hdmi_display_disable, 546 547 .check_timings = hdmi_display_check_timing, 548 .set_timings = hdmi_display_set_timing, 549 .get_timings = hdmi_display_get_timings, 550 551 .read_edid = hdmi_read_edid, 552 .set_infoframe = hdmi_set_infoframe, 553 .set_hdmi_mode = hdmi_set_hdmi_mode, 554 }; 555 556 static void hdmi_init_output(struct platform_device *pdev) 557 { 558 struct omap_dss_device *out = &hdmi.output; 559 560 out->dev = &pdev->dev; 561 out->id = OMAP_DSS_OUTPUT_HDMI; 562 out->output_type = OMAP_DISPLAY_TYPE_HDMI; 563 out->name = "hdmi.0"; 564 out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT; 565 out->ops.hdmi = &hdmi_ops; 566 out->owner = THIS_MODULE; 567 568 omapdss_register_output(out); 569 } 570 571 static void hdmi_uninit_output(struct platform_device *pdev) 572 { 573 struct omap_dss_device *out = &hdmi.output; 574 575 omapdss_unregister_output(out); 576 } 577 578 static int hdmi_probe_of(struct platform_device *pdev) 579 { 580 struct device_node *node = pdev->dev.of_node; 581 struct device_node *ep; 582 int r; 583 584 ep = omapdss_of_get_first_endpoint(node); 585 if (!ep) 586 return 0; 587 588 r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy); 589 if (r) 590 goto err; 591 592 of_node_put(ep); 593 return 0; 594 595 err: 596 of_node_put(ep); 597 return r; 598 } 599 600 /* Audio callbacks */ 601 static int hdmi_audio_startup(struct device *dev, 602 void (*abort_cb)(struct device *dev)) 603 { 604 struct omap_hdmi *hd = dev_get_drvdata(dev); 605 int ret = 0; 606 607 mutex_lock(&hd->lock); 608 609 if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) { 610 ret = -EPERM; 611 goto out; 612 } 613 614 hd->audio_abort_cb = abort_cb; 615 616 out: 617 mutex_unlock(&hd->lock); 618 619 return ret; 620 } 621 622 static int hdmi_audio_shutdown(struct device *dev) 623 { 624 struct omap_hdmi *hd = dev_get_drvdata(dev); 625 626 mutex_lock(&hd->lock); 627 hd->audio_abort_cb = NULL; 628 hd->audio_configured = false; 629 hd->audio_playing = false; 630 mutex_unlock(&hd->lock); 631 632 return 0; 633 } 634 635 static int hdmi_audio_start(struct device *dev) 636 { 637 struct omap_hdmi *hd = dev_get_drvdata(dev); 638 unsigned long flags; 639 640 WARN_ON(!hdmi_mode_has_audio(&hd->cfg)); 641 642 spin_lock_irqsave(&hd->audio_playing_lock, flags); 643 644 if (hd->display_enabled) 645 hdmi_start_audio_stream(hd); 646 hd->audio_playing = true; 647 648 spin_unlock_irqrestore(&hd->audio_playing_lock, flags); 649 return 0; 650 } 651 652 static void hdmi_audio_stop(struct device *dev) 653 { 654 struct omap_hdmi *hd = dev_get_drvdata(dev); 655 unsigned long flags; 656 657 WARN_ON(!hdmi_mode_has_audio(&hd->cfg)); 658 659 spin_lock_irqsave(&hd->audio_playing_lock, flags); 660 661 if (hd->display_enabled) 662 hdmi_stop_audio_stream(hd); 663 hd->audio_playing = false; 664 665 spin_unlock_irqrestore(&hd->audio_playing_lock, flags); 666 } 667 668 static int hdmi_audio_config(struct device *dev, 669 struct omap_dss_audio *dss_audio) 670 { 671 struct omap_hdmi *hd = dev_get_drvdata(dev); 672 int ret; 673 674 mutex_lock(&hd->lock); 675 676 if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) { 677 ret = -EPERM; 678 goto out; 679 } 680 681 ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio, 682 hd->cfg.timings.pixelclock); 683 684 if (!ret) { 685 hd->audio_configured = true; 686 hd->audio_config = *dss_audio; 687 } 688 out: 689 mutex_unlock(&hd->lock); 690 691 return ret; 692 } 693 694 static const struct omap_hdmi_audio_ops hdmi_audio_ops = { 695 .audio_startup = hdmi_audio_startup, 696 .audio_shutdown = hdmi_audio_shutdown, 697 .audio_start = hdmi_audio_start, 698 .audio_stop = hdmi_audio_stop, 699 .audio_config = hdmi_audio_config, 700 }; 701 702 static int hdmi_audio_register(struct device *dev) 703 { 704 struct omap_hdmi_audio_pdata pdata = { 705 .dev = dev, 706 .dss_version = omapdss_get_version(), 707 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp), 708 .ops = &hdmi_audio_ops, 709 }; 710 711 hdmi.audio_pdev = platform_device_register_data( 712 dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO, 713 &pdata, sizeof(pdata)); 714 715 if (IS_ERR(hdmi.audio_pdev)) 716 return PTR_ERR(hdmi.audio_pdev); 717 718 hdmi_runtime_get(); 719 hdmi.wp_idlemode = 720 REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2); 721 hdmi_runtime_put(); 722 723 return 0; 724 } 725 726 /* HDMI HW IP initialisation */ 727 static int hdmi5_bind(struct device *dev, struct device *master, void *data) 728 { 729 struct platform_device *pdev = to_platform_device(dev); 730 int r; 731 int irq; 732 733 hdmi.pdev = pdev; 734 dev_set_drvdata(&pdev->dev, &hdmi); 735 736 mutex_init(&hdmi.lock); 737 spin_lock_init(&hdmi.audio_playing_lock); 738 739 if (pdev->dev.of_node) { 740 r = hdmi_probe_of(pdev); 741 if (r) 742 return r; 743 } 744 745 r = hdmi_wp_init(pdev, &hdmi.wp); 746 if (r) 747 return r; 748 749 r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp); 750 if (r) 751 return r; 752 753 r = hdmi_phy_init(pdev, &hdmi.phy); 754 if (r) 755 goto err; 756 757 r = hdmi5_core_init(pdev, &hdmi.core); 758 if (r) 759 goto err; 760 761 irq = platform_get_irq(pdev, 0); 762 if (irq < 0) { 763 DSSERR("platform_get_irq failed\n"); 764 r = -ENODEV; 765 goto err; 766 } 767 768 r = devm_request_threaded_irq(&pdev->dev, irq, 769 NULL, hdmi_irq_handler, 770 IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp); 771 if (r) { 772 DSSERR("HDMI IRQ request failed\n"); 773 goto err; 774 } 775 776 pm_runtime_enable(&pdev->dev); 777 778 hdmi_init_output(pdev); 779 780 r = hdmi_audio_register(&pdev->dev); 781 if (r) { 782 DSSERR("Registering HDMI audio failed %d\n", r); 783 hdmi_uninit_output(pdev); 784 pm_runtime_disable(&pdev->dev); 785 return r; 786 } 787 788 dss_debugfs_create_file("hdmi", hdmi_dump_regs); 789 790 return 0; 791 err: 792 hdmi_pll_uninit(&hdmi.pll); 793 return r; 794 } 795 796 static void hdmi5_unbind(struct device *dev, struct device *master, void *data) 797 { 798 struct platform_device *pdev = to_platform_device(dev); 799 800 if (hdmi.audio_pdev) 801 platform_device_unregister(hdmi.audio_pdev); 802 803 hdmi_uninit_output(pdev); 804 805 hdmi_pll_uninit(&hdmi.pll); 806 807 pm_runtime_disable(&pdev->dev); 808 } 809 810 static const struct component_ops hdmi5_component_ops = { 811 .bind = hdmi5_bind, 812 .unbind = hdmi5_unbind, 813 }; 814 815 static int hdmi5_probe(struct platform_device *pdev) 816 { 817 return component_add(&pdev->dev, &hdmi5_component_ops); 818 } 819 820 static int hdmi5_remove(struct platform_device *pdev) 821 { 822 component_del(&pdev->dev, &hdmi5_component_ops); 823 return 0; 824 } 825 826 static int hdmi_runtime_suspend(struct device *dev) 827 { 828 dispc_runtime_put(); 829 830 return 0; 831 } 832 833 static int hdmi_runtime_resume(struct device *dev) 834 { 835 int r; 836 837 r = dispc_runtime_get(); 838 if (r < 0) 839 return r; 840 841 return 0; 842 } 843 844 static const struct dev_pm_ops hdmi_pm_ops = { 845 .runtime_suspend = hdmi_runtime_suspend, 846 .runtime_resume = hdmi_runtime_resume, 847 }; 848 849 static const struct of_device_id hdmi_of_match[] = { 850 { .compatible = "ti,omap5-hdmi", }, 851 { .compatible = "ti,dra7-hdmi", }, 852 {}, 853 }; 854 855 static struct platform_driver omapdss_hdmihw_driver = { 856 .probe = hdmi5_probe, 857 .remove = hdmi5_remove, 858 .driver = { 859 .name = "omapdss_hdmi5", 860 .pm = &hdmi_pm_ops, 861 .of_match_table = hdmi_of_match, 862 .suppress_bind_attrs = true, 863 }, 864 }; 865 866 int __init hdmi5_init_platform_driver(void) 867 { 868 return platform_driver_register(&omapdss_hdmihw_driver); 869 } 870 871 void hdmi5_uninit_platform_driver(void) 872 { 873 platform_driver_unregister(&omapdss_hdmihw_driver); 874 } 875