1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __MB862XX_H__
3 #define __MB862XX_H__
4 
5 struct mb862xx_l1_cfg {
6 	unsigned short sx;
7 	unsigned short sy;
8 	unsigned short sw;
9 	unsigned short sh;
10 	unsigned short dx;
11 	unsigned short dy;
12 	unsigned short dw;
13 	unsigned short dh;
14 	int mirror;
15 };
16 
17 #define MB862XX_BASE		'M'
18 #define MB862XX_L1_GET_CFG	_IOR(MB862XX_BASE, 0, struct mb862xx_l1_cfg*)
19 #define MB862XX_L1_SET_CFG	_IOW(MB862XX_BASE, 1, struct mb862xx_l1_cfg*)
20 #define MB862XX_L1_ENABLE	_IOW(MB862XX_BASE, 2, int)
21 #define MB862XX_L1_CAP_CTL	_IOW(MB862XX_BASE, 3, int)
22 
23 #ifdef __KERNEL__
24 
25 #define PCI_VENDOR_ID_FUJITSU_LIMITED	0x10cf
26 #define PCI_DEVICE_ID_FUJITSU_CORALP	0x2019
27 #define PCI_DEVICE_ID_FUJITSU_CORALPA	0x201e
28 #define PCI_DEVICE_ID_FUJITSU_CARMINE	0x202b
29 
30 #define GC_MMR_CORALP_EVB_VAL		0x11d7fa13
31 
32 enum gdctype {
33 	BT_NONE,
34 	BT_LIME,
35 	BT_MINT,
36 	BT_CORAL,
37 	BT_CORALP,
38 	BT_CARMINE,
39 };
40 
41 struct mb862xx_gc_mode {
42 	struct fb_videomode	def_mode;	/* mode of connected display */
43 	unsigned int		def_bpp;	/* default depth */
44 	unsigned long		max_vram;	/* connected SDRAM size */
45 	unsigned long		ccf;		/* gdc clk */
46 	unsigned long		mmr;		/* memory mode for SDRAM */
47 };
48 
49 /* private data */
50 struct mb862xxfb_par {
51 	struct fb_info		*info;		/* fb info head */
52 	struct device		*dev;
53 	struct pci_dev		*pdev;
54 	struct resource		*res;		/* framebuffer/mmio resource */
55 
56 	resource_size_t		fb_base_phys;	/* fb base, 36-bit PPC440EPx */
57 	resource_size_t		mmio_base_phys;	/* io base addr */
58 	void __iomem		*fb_base;	/* remapped framebuffer */
59 	void __iomem		*mmio_base;	/* remapped registers */
60 	size_t			mapped_vram;	/* length of remapped vram */
61 	size_t			mmio_len;	/* length of register region */
62 	unsigned long		cap_buf;	/* capture buffers offset */
63 	size_t			cap_len;	/* length of capture buffers */
64 
65 	void __iomem		*host;		/* relocatable reg. bases */
66 	void __iomem		*i2c;
67 	void __iomem		*disp;
68 	void __iomem		*disp1;
69 	void __iomem		*cap;
70 	void __iomem		*cap1;
71 	void __iomem		*draw;
72 	void __iomem		*geo;
73 	void __iomem		*pio;
74 	void __iomem		*ctrl;
75 	void __iomem		*dram_ctrl;
76 	void __iomem		*wrback;
77 
78 	unsigned int		irq;
79 	unsigned int		type;		/* GDC type */
80 	unsigned int		refclk;		/* disp. reference clock */
81 	struct mb862xx_gc_mode	*gc_mode;	/* GDC mode init data */
82 	int			pre_init;	/* don't init display if 1 */
83 	struct i2c_adapter	*adap;		/* GDC I2C bus adapter */
84 	int			i2c_rs;
85 
86 	struct mb862xx_l1_cfg	l1_cfg;
87 	int			l1_stride;
88 
89 	u32			pseudo_palette[16];
90 };
91 
92 extern void mb862xxfb_init_accel(struct fb_info *info, int xres);
93 #ifdef CONFIG_FB_MB862XX_I2C
94 extern int mb862xx_i2c_init(struct mb862xxfb_par *par);
95 extern void mb862xx_i2c_exit(struct mb862xxfb_par *par);
96 #else
97 static inline int mb862xx_i2c_init(struct mb862xxfb_par *par) { return 0; }
98 static inline void mb862xx_i2c_exit(struct mb862xxfb_par *par) { }
99 #endif
100 
101 #if defined(CONFIG_FB_MB862XX_LIME) && defined(CONFIG_FB_MB862XX_PCI_GDC)
102 #error	"Select Lime GDC or CoralP/Carmine support, but not both together"
103 #endif
104 #if defined(CONFIG_FB_MB862XX_LIME)
105 #define gdc_read	__raw_readl
106 #define gdc_write	__raw_writel
107 #else
108 #define gdc_read	readl
109 #define gdc_write	writel
110 #endif
111 
112 #define inreg(type, off)	\
113 	gdc_read((par->type + (off)))
114 
115 #define outreg(type, off, val)	\
116 	gdc_write((val), (par->type + (off)))
117 
118 #define pack(a, b)	(((a) << 16) | (b))
119 
120 #endif /* __KERNEL__ */
121 
122 #endif
123