1 #ifndef __MB862XX_H__ 2 #define __MB862XX_H__ 3 4 struct mb862xx_l1_cfg { 5 unsigned short sx; 6 unsigned short sy; 7 unsigned short sw; 8 unsigned short sh; 9 unsigned short dx; 10 unsigned short dy; 11 unsigned short dw; 12 unsigned short dh; 13 int mirror; 14 }; 15 16 #define MB862XX_BASE 'M' 17 #define MB862XX_L1_GET_CFG _IOR(MB862XX_BASE, 0, struct mb862xx_l1_cfg*) 18 #define MB862XX_L1_SET_CFG _IOW(MB862XX_BASE, 1, struct mb862xx_l1_cfg*) 19 #define MB862XX_L1_ENABLE _IOW(MB862XX_BASE, 2, int) 20 #define MB862XX_L1_CAP_CTL _IOW(MB862XX_BASE, 3, int) 21 22 #ifdef __KERNEL__ 23 24 #define PCI_VENDOR_ID_FUJITSU_LIMITED 0x10cf 25 #define PCI_DEVICE_ID_FUJITSU_CORALP 0x2019 26 #define PCI_DEVICE_ID_FUJITSU_CORALPA 0x201e 27 #define PCI_DEVICE_ID_FUJITSU_CARMINE 0x202b 28 29 #define GC_MMR_CORALP_EVB_VAL 0x11d7fa13 30 31 enum gdctype { 32 BT_NONE, 33 BT_LIME, 34 BT_MINT, 35 BT_CORAL, 36 BT_CORALP, 37 BT_CARMINE, 38 }; 39 40 struct mb862xx_gc_mode { 41 struct fb_videomode def_mode; /* mode of connected display */ 42 unsigned int def_bpp; /* default depth */ 43 unsigned long max_vram; /* connected SDRAM size */ 44 unsigned long ccf; /* gdc clk */ 45 unsigned long mmr; /* memory mode for SDRAM */ 46 }; 47 48 /* private data */ 49 struct mb862xxfb_par { 50 struct fb_info *info; /* fb info head */ 51 struct device *dev; 52 struct pci_dev *pdev; 53 struct resource *res; /* framebuffer/mmio resource */ 54 55 resource_size_t fb_base_phys; /* fb base, 36-bit PPC440EPx */ 56 resource_size_t mmio_base_phys; /* io base addr */ 57 void __iomem *fb_base; /* remapped framebuffer */ 58 void __iomem *mmio_base; /* remapped registers */ 59 size_t mapped_vram; /* length of remapped vram */ 60 size_t mmio_len; /* length of register region */ 61 unsigned long cap_buf; /* capture buffers offset */ 62 size_t cap_len; /* length of capture buffers */ 63 64 void __iomem *host; /* relocatable reg. bases */ 65 void __iomem *i2c; 66 void __iomem *disp; 67 void __iomem *disp1; 68 void __iomem *cap; 69 void __iomem *cap1; 70 void __iomem *draw; 71 void __iomem *geo; 72 void __iomem *pio; 73 void __iomem *ctrl; 74 void __iomem *dram_ctrl; 75 void __iomem *wrback; 76 77 unsigned int irq; 78 unsigned int type; /* GDC type */ 79 unsigned int refclk; /* disp. reference clock */ 80 struct mb862xx_gc_mode *gc_mode; /* GDC mode init data */ 81 int pre_init; /* don't init display if 1 */ 82 struct i2c_adapter *adap; /* GDC I2C bus adapter */ 83 int i2c_rs; 84 85 struct mb862xx_l1_cfg l1_cfg; 86 int l1_stride; 87 88 u32 pseudo_palette[16]; 89 }; 90 91 extern void mb862xxfb_init_accel(struct fb_info *info, int xres); 92 #ifdef CONFIG_FB_MB862XX_I2C 93 extern int mb862xx_i2c_init(struct mb862xxfb_par *par); 94 extern void mb862xx_i2c_exit(struct mb862xxfb_par *par); 95 #else 96 static inline int mb862xx_i2c_init(struct mb862xxfb_par *par) { return 0; } 97 static inline void mb862xx_i2c_exit(struct mb862xxfb_par *par) { } 98 #endif 99 100 #if defined(CONFIG_FB_MB862XX_LIME) && defined(CONFIG_FB_MB862XX_PCI_GDC) 101 #error "Select Lime GDC or CoralP/Carmine support, but not both together" 102 #endif 103 #if defined(CONFIG_FB_MB862XX_LIME) 104 #define gdc_read __raw_readl 105 #define gdc_write __raw_writel 106 #else 107 #define gdc_read readl 108 #define gdc_write writel 109 #endif 110 111 #define inreg(type, off) \ 112 gdc_read((par->type + (off))) 113 114 #define outreg(type, off, val) \ 115 gdc_write((val), (par->type + (off))) 116 117 #define pack(a, b) (((a) << 16) | (b)) 118 119 #endif /* __KERNEL__ */ 120 121 #endif 122