1 /* 2 * Freescale i.MX Frame Buffer device driver 3 * 4 * Copyright (C) 2004 Sascha Hauer, Pengutronix 5 * Based on acornfb.c Copyright (C) Russell King. 6 * 7 * This file is subject to the terms and conditions of the GNU General Public 8 * License. See the file COPYING in the main directory of this archive for 9 * more details. 10 * 11 * Please direct your questions and comments on this driver to the following 12 * email address: 13 * 14 * linux-arm-kernel@lists.arm.linux.org.uk 15 */ 16 17 #include <linux/module.h> 18 #include <linux/kernel.h> 19 #include <linux/errno.h> 20 #include <linux/string.h> 21 #include <linux/interrupt.h> 22 #include <linux/slab.h> 23 #include <linux/mm.h> 24 #include <linux/fb.h> 25 #include <linux/delay.h> 26 #include <linux/init.h> 27 #include <linux/ioport.h> 28 #include <linux/cpufreq.h> 29 #include <linux/clk.h> 30 #include <linux/platform_device.h> 31 #include <linux/dma-mapping.h> 32 #include <linux/io.h> 33 #include <linux/lcd.h> 34 #include <linux/math64.h> 35 #include <linux/of.h> 36 #include <linux/of_device.h> 37 38 #include <linux/regulator/consumer.h> 39 40 #include <video/of_display_timing.h> 41 #include <video/of_videomode.h> 42 #include <video/videomode.h> 43 44 #define PCR_TFT (1 << 31) 45 #define PCR_BPIX_8 (3 << 25) 46 #define PCR_BPIX_12 (4 << 25) 47 #define PCR_BPIX_16 (5 << 25) 48 #define PCR_BPIX_18 (6 << 25) 49 50 struct imx_fb_videomode { 51 struct fb_videomode mode; 52 u32 pcr; 53 bool aus_mode; 54 unsigned char bpp; 55 }; 56 57 /* 58 * Complain if VAR is out of range. 59 */ 60 #define DEBUG_VAR 1 61 62 #define DRIVER_NAME "imx-fb" 63 64 #define LCDC_SSA 0x00 65 66 #define LCDC_SIZE 0x04 67 #define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20) 68 69 #define YMAX_MASK_IMX1 0x1ff 70 #define YMAX_MASK_IMX21 0x3ff 71 72 #define LCDC_VPW 0x08 73 #define VPW_VPW(x) ((x) & 0x3ff) 74 75 #define LCDC_CPOS 0x0C 76 #define CPOS_CC1 (1<<31) 77 #define CPOS_CC0 (1<<30) 78 #define CPOS_OP (1<<28) 79 #define CPOS_CXP(x) (((x) & 3ff) << 16) 80 81 #define LCDC_LCWHB 0x10 82 #define LCWHB_BK_EN (1<<31) 83 #define LCWHB_CW(w) (((w) & 0x1f) << 24) 84 #define LCWHB_CH(h) (((h) & 0x1f) << 16) 85 #define LCWHB_BD(x) ((x) & 0xff) 86 87 #define LCDC_LCHCC 0x14 88 89 #define LCDC_PCR 0x18 90 91 #define LCDC_HCR 0x1C 92 #define HCR_H_WIDTH(x) (((x) & 0x3f) << 26) 93 #define HCR_H_WAIT_1(x) (((x) & 0xff) << 8) 94 #define HCR_H_WAIT_2(x) ((x) & 0xff) 95 96 #define LCDC_VCR 0x20 97 #define VCR_V_WIDTH(x) (((x) & 0x3f) << 26) 98 #define VCR_V_WAIT_1(x) (((x) & 0xff) << 8) 99 #define VCR_V_WAIT_2(x) ((x) & 0xff) 100 101 #define LCDC_POS 0x24 102 #define POS_POS(x) ((x) & 1f) 103 104 #define LCDC_LSCR1 0x28 105 /* bit fields in imxfb.h */ 106 107 #define LCDC_PWMR 0x2C 108 /* bit fields in imxfb.h */ 109 110 #define LCDC_DMACR 0x30 111 /* bit fields in imxfb.h */ 112 113 #define LCDC_RMCR 0x34 114 115 #define RMCR_LCDC_EN_MX1 (1<<1) 116 117 #define RMCR_SELF_REF (1<<0) 118 119 #define LCDC_LCDICR 0x38 120 #define LCDICR_INT_SYN (1<<2) 121 #define LCDICR_INT_CON (1) 122 123 #define LCDC_LCDISR 0x40 124 #define LCDISR_UDR_ERR (1<<3) 125 #define LCDISR_ERR_RES (1<<2) 126 #define LCDISR_EOF (1<<1) 127 #define LCDISR_BOF (1<<0) 128 129 #define IMXFB_LSCR1_DEFAULT 0x00120300 130 131 #define LCDC_LAUSCR 0x80 132 #define LAUSCR_AUS_MODE (1<<31) 133 134 /* Used fb-mode. Can be set on kernel command line, therefore file-static. */ 135 static const char *fb_mode; 136 137 /* 138 * These are the bitfields for each 139 * display depth that we support. 140 */ 141 struct imxfb_rgb { 142 struct fb_bitfield red; 143 struct fb_bitfield green; 144 struct fb_bitfield blue; 145 struct fb_bitfield transp; 146 }; 147 148 enum imxfb_type { 149 IMX1_FB, 150 IMX21_FB, 151 }; 152 153 struct imxfb_info { 154 struct platform_device *pdev; 155 void __iomem *regs; 156 struct clk *clk_ipg; 157 struct clk *clk_ahb; 158 struct clk *clk_per; 159 enum imxfb_type devtype; 160 bool enabled; 161 162 /* 163 * These are the addresses we mapped 164 * the framebuffer memory region to. 165 */ 166 dma_addr_t map_dma; 167 u_int map_size; 168 169 u_int palette_size; 170 171 dma_addr_t dbar1; 172 dma_addr_t dbar2; 173 174 u_int pcr; 175 u_int lauscr; 176 u_int pwmr; 177 u_int lscr1; 178 u_int dmacr; 179 bool cmap_inverse; 180 bool cmap_static; 181 182 struct imx_fb_videomode *mode; 183 int num_modes; 184 185 struct regulator *lcd_pwr; 186 int lcd_pwr_enabled; 187 }; 188 189 static const struct platform_device_id imxfb_devtype[] = { 190 { 191 .name = "imx1-fb", 192 .driver_data = IMX1_FB, 193 }, { 194 .name = "imx21-fb", 195 .driver_data = IMX21_FB, 196 }, { 197 /* sentinel */ 198 } 199 }; 200 MODULE_DEVICE_TABLE(platform, imxfb_devtype); 201 202 static const struct of_device_id imxfb_of_dev_id[] = { 203 { 204 .compatible = "fsl,imx1-fb", 205 .data = &imxfb_devtype[IMX1_FB], 206 }, { 207 .compatible = "fsl,imx21-fb", 208 .data = &imxfb_devtype[IMX21_FB], 209 }, { 210 /* sentinel */ 211 } 212 }; 213 MODULE_DEVICE_TABLE(of, imxfb_of_dev_id); 214 215 static inline int is_imx1_fb(struct imxfb_info *fbi) 216 { 217 return fbi->devtype == IMX1_FB; 218 } 219 220 #define IMX_NAME "IMX" 221 222 /* 223 * Minimum X and Y resolutions 224 */ 225 #define MIN_XRES 64 226 #define MIN_YRES 64 227 228 /* Actually this really is 18bit support, the lowest 2 bits of each colour 229 * are unused in hardware. We claim to have 24bit support to make software 230 * like X work, which does not support 18bit. 231 */ 232 static struct imxfb_rgb def_rgb_18 = { 233 .red = {.offset = 16, .length = 8,}, 234 .green = {.offset = 8, .length = 8,}, 235 .blue = {.offset = 0, .length = 8,}, 236 .transp = {.offset = 0, .length = 0,}, 237 }; 238 239 static struct imxfb_rgb def_rgb_16_tft = { 240 .red = {.offset = 11, .length = 5,}, 241 .green = {.offset = 5, .length = 6,}, 242 .blue = {.offset = 0, .length = 5,}, 243 .transp = {.offset = 0, .length = 0,}, 244 }; 245 246 static struct imxfb_rgb def_rgb_16_stn = { 247 .red = {.offset = 8, .length = 4,}, 248 .green = {.offset = 4, .length = 4,}, 249 .blue = {.offset = 0, .length = 4,}, 250 .transp = {.offset = 0, .length = 0,}, 251 }; 252 253 static struct imxfb_rgb def_rgb_8 = { 254 .red = {.offset = 0, .length = 8,}, 255 .green = {.offset = 0, .length = 8,}, 256 .blue = {.offset = 0, .length = 8,}, 257 .transp = {.offset = 0, .length = 0,}, 258 }; 259 260 static int imxfb_activate_var(struct fb_var_screeninfo *var, 261 struct fb_info *info); 262 263 static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) 264 { 265 chan &= 0xffff; 266 chan >>= 16 - bf->length; 267 return chan << bf->offset; 268 } 269 270 static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, 271 u_int trans, struct fb_info *info) 272 { 273 struct imxfb_info *fbi = info->par; 274 u_int val, ret = 1; 275 276 #define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16) 277 if (regno < fbi->palette_size) { 278 val = (CNVT_TOHW(red, 4) << 8) | 279 (CNVT_TOHW(green,4) << 4) | 280 CNVT_TOHW(blue, 4); 281 282 writel(val, fbi->regs + 0x800 + (regno << 2)); 283 ret = 0; 284 } 285 return ret; 286 } 287 288 static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, 289 u_int trans, struct fb_info *info) 290 { 291 struct imxfb_info *fbi = info->par; 292 unsigned int val; 293 int ret = 1; 294 295 /* 296 * If inverse mode was selected, invert all the colours 297 * rather than the register number. The register number 298 * is what you poke into the framebuffer to produce the 299 * colour you requested. 300 */ 301 if (fbi->cmap_inverse) { 302 red = 0xffff - red; 303 green = 0xffff - green; 304 blue = 0xffff - blue; 305 } 306 307 /* 308 * If greyscale is true, then we convert the RGB value 309 * to greyscale no mater what visual we are using. 310 */ 311 if (info->var.grayscale) 312 red = green = blue = (19595 * red + 38470 * green + 313 7471 * blue) >> 16; 314 315 switch (info->fix.visual) { 316 case FB_VISUAL_TRUECOLOR: 317 /* 318 * 12 or 16-bit True Colour. We encode the RGB value 319 * according to the RGB bitfield information. 320 */ 321 if (regno < 16) { 322 u32 *pal = info->pseudo_palette; 323 324 val = chan_to_field(red, &info->var.red); 325 val |= chan_to_field(green, &info->var.green); 326 val |= chan_to_field(blue, &info->var.blue); 327 328 pal[regno] = val; 329 ret = 0; 330 } 331 break; 332 333 case FB_VISUAL_STATIC_PSEUDOCOLOR: 334 case FB_VISUAL_PSEUDOCOLOR: 335 ret = imxfb_setpalettereg(regno, red, green, blue, trans, info); 336 break; 337 } 338 339 return ret; 340 } 341 342 static const struct imx_fb_videomode *imxfb_find_mode(struct imxfb_info *fbi) 343 { 344 struct imx_fb_videomode *m; 345 int i; 346 347 if (!fb_mode) 348 return &fbi->mode[0]; 349 350 for (i = 0, m = &fbi->mode[0]; i < fbi->num_modes; i++, m++) { 351 if (!strcmp(m->mode.name, fb_mode)) 352 return m; 353 } 354 return NULL; 355 } 356 357 /* 358 * imxfb_check_var(): 359 * Round up in the following order: bits_per_pixel, xres, 360 * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale, 361 * bitfields, horizontal timing, vertical timing. 362 */ 363 static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) 364 { 365 struct imxfb_info *fbi = info->par; 366 struct imxfb_rgb *rgb; 367 const struct imx_fb_videomode *imxfb_mode; 368 unsigned long lcd_clk; 369 unsigned long long tmp; 370 u32 pcr = 0; 371 372 if (var->xres < MIN_XRES) 373 var->xres = MIN_XRES; 374 if (var->yres < MIN_YRES) 375 var->yres = MIN_YRES; 376 377 imxfb_mode = imxfb_find_mode(fbi); 378 if (!imxfb_mode) 379 return -EINVAL; 380 381 var->xres = imxfb_mode->mode.xres; 382 var->yres = imxfb_mode->mode.yres; 383 var->bits_per_pixel = imxfb_mode->bpp; 384 var->pixclock = imxfb_mode->mode.pixclock; 385 var->hsync_len = imxfb_mode->mode.hsync_len; 386 var->left_margin = imxfb_mode->mode.left_margin; 387 var->right_margin = imxfb_mode->mode.right_margin; 388 var->vsync_len = imxfb_mode->mode.vsync_len; 389 var->upper_margin = imxfb_mode->mode.upper_margin; 390 var->lower_margin = imxfb_mode->mode.lower_margin; 391 var->sync = imxfb_mode->mode.sync; 392 var->xres_virtual = max(var->xres_virtual, var->xres); 393 var->yres_virtual = max(var->yres_virtual, var->yres); 394 395 pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel); 396 397 lcd_clk = clk_get_rate(fbi->clk_per); 398 399 tmp = var->pixclock * (unsigned long long)lcd_clk; 400 401 do_div(tmp, 1000000); 402 403 if (do_div(tmp, 1000000) > 500000) 404 tmp++; 405 406 pcr = (unsigned int)tmp; 407 408 if (--pcr > 0x3F) { 409 pcr = 0x3F; 410 printk(KERN_WARNING "Must limit pixel clock to %luHz\n", 411 lcd_clk / pcr); 412 } 413 414 switch (var->bits_per_pixel) { 415 case 32: 416 pcr |= PCR_BPIX_18; 417 rgb = &def_rgb_18; 418 break; 419 case 16: 420 default: 421 if (is_imx1_fb(fbi)) 422 pcr |= PCR_BPIX_12; 423 else 424 pcr |= PCR_BPIX_16; 425 426 if (imxfb_mode->pcr & PCR_TFT) 427 rgb = &def_rgb_16_tft; 428 else 429 rgb = &def_rgb_16_stn; 430 break; 431 case 8: 432 pcr |= PCR_BPIX_8; 433 rgb = &def_rgb_8; 434 break; 435 } 436 437 /* add sync polarities */ 438 pcr |= imxfb_mode->pcr & ~(0x3f | (7 << 25)); 439 440 fbi->pcr = pcr; 441 /* 442 * The LCDC AUS Mode Control Register does not exist on imx1. 443 */ 444 if (!is_imx1_fb(fbi) && imxfb_mode->aus_mode) 445 fbi->lauscr = LAUSCR_AUS_MODE; 446 447 /* 448 * Copy the RGB parameters for this display 449 * from the machine specific parameters. 450 */ 451 var->red = rgb->red; 452 var->green = rgb->green; 453 var->blue = rgb->blue; 454 var->transp = rgb->transp; 455 456 pr_debug("RGBT length = %d:%d:%d:%d\n", 457 var->red.length, var->green.length, var->blue.length, 458 var->transp.length); 459 460 pr_debug("RGBT offset = %d:%d:%d:%d\n", 461 var->red.offset, var->green.offset, var->blue.offset, 462 var->transp.offset); 463 464 return 0; 465 } 466 467 /* 468 * imxfb_set_par(): 469 * Set the user defined part of the display for the specified console 470 */ 471 static int imxfb_set_par(struct fb_info *info) 472 { 473 struct imxfb_info *fbi = info->par; 474 struct fb_var_screeninfo *var = &info->var; 475 476 if (var->bits_per_pixel == 16 || var->bits_per_pixel == 32) 477 info->fix.visual = FB_VISUAL_TRUECOLOR; 478 else if (!fbi->cmap_static) 479 info->fix.visual = FB_VISUAL_PSEUDOCOLOR; 480 else { 481 /* 482 * Some people have weird ideas about wanting static 483 * pseudocolor maps. I suspect their user space 484 * applications are broken. 485 */ 486 info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR; 487 } 488 489 info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8; 490 fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16; 491 492 imxfb_activate_var(var, info); 493 494 return 0; 495 } 496 497 static int imxfb_enable_controller(struct imxfb_info *fbi) 498 { 499 int ret; 500 501 if (fbi->enabled) 502 return 0; 503 504 pr_debug("Enabling LCD controller\n"); 505 506 writel(fbi->map_dma, fbi->regs + LCDC_SSA); 507 508 /* panning offset 0 (0 pixel offset) */ 509 writel(0x00000000, fbi->regs + LCDC_POS); 510 511 /* disable hardware cursor */ 512 writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1), 513 fbi->regs + LCDC_CPOS); 514 515 /* 516 * RMCR_LCDC_EN_MX1 is present on i.MX1 only, but doesn't hurt 517 * on other SoCs 518 */ 519 writel(RMCR_LCDC_EN_MX1, fbi->regs + LCDC_RMCR); 520 521 ret = clk_prepare_enable(fbi->clk_ipg); 522 if (ret) 523 goto err_enable_ipg; 524 525 ret = clk_prepare_enable(fbi->clk_ahb); 526 if (ret) 527 goto err_enable_ahb; 528 529 ret = clk_prepare_enable(fbi->clk_per); 530 if (ret) 531 goto err_enable_per; 532 533 fbi->enabled = true; 534 return 0; 535 536 err_enable_per: 537 clk_disable_unprepare(fbi->clk_ahb); 538 err_enable_ahb: 539 clk_disable_unprepare(fbi->clk_ipg); 540 err_enable_ipg: 541 writel(0, fbi->regs + LCDC_RMCR); 542 543 return ret; 544 } 545 546 static void imxfb_disable_controller(struct imxfb_info *fbi) 547 { 548 if (!fbi->enabled) 549 return; 550 551 pr_debug("Disabling LCD controller\n"); 552 553 clk_disable_unprepare(fbi->clk_per); 554 clk_disable_unprepare(fbi->clk_ahb); 555 clk_disable_unprepare(fbi->clk_ipg); 556 fbi->enabled = false; 557 558 writel(0, fbi->regs + LCDC_RMCR); 559 } 560 561 static int imxfb_blank(int blank, struct fb_info *info) 562 { 563 struct imxfb_info *fbi = info->par; 564 565 pr_debug("imxfb_blank: blank=%d\n", blank); 566 567 switch (blank) { 568 case FB_BLANK_POWERDOWN: 569 case FB_BLANK_VSYNC_SUSPEND: 570 case FB_BLANK_HSYNC_SUSPEND: 571 case FB_BLANK_NORMAL: 572 imxfb_disable_controller(fbi); 573 break; 574 575 case FB_BLANK_UNBLANK: 576 return imxfb_enable_controller(fbi); 577 } 578 return 0; 579 } 580 581 static const struct fb_ops imxfb_ops = { 582 .owner = THIS_MODULE, 583 FB_DEFAULT_IOMEM_OPS, 584 .fb_check_var = imxfb_check_var, 585 .fb_set_par = imxfb_set_par, 586 .fb_setcolreg = imxfb_setcolreg, 587 .fb_blank = imxfb_blank, 588 }; 589 590 /* 591 * imxfb_activate_var(): 592 * Configures LCD Controller based on entries in var parameter. Settings are 593 * only written to the controller if changes were made. 594 */ 595 static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info) 596 { 597 struct imxfb_info *fbi = info->par; 598 u32 ymax_mask = is_imx1_fb(fbi) ? YMAX_MASK_IMX1 : YMAX_MASK_IMX21; 599 600 pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n", 601 var->xres, var->hsync_len, 602 var->left_margin, var->right_margin); 603 pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n", 604 var->yres, var->vsync_len, 605 var->upper_margin, var->lower_margin); 606 607 #if DEBUG_VAR 608 if (var->xres < 16 || var->xres > 1024) 609 printk(KERN_ERR "%s: invalid xres %d\n", 610 info->fix.id, var->xres); 611 if (var->hsync_len < 1 || var->hsync_len > 64) 612 printk(KERN_ERR "%s: invalid hsync_len %d\n", 613 info->fix.id, var->hsync_len); 614 if (var->left_margin > 255) 615 printk(KERN_ERR "%s: invalid left_margin %d\n", 616 info->fix.id, var->left_margin); 617 if (var->right_margin > 255) 618 printk(KERN_ERR "%s: invalid right_margin %d\n", 619 info->fix.id, var->right_margin); 620 if (var->yres < 1 || var->yres > ymax_mask) 621 printk(KERN_ERR "%s: invalid yres %d\n", 622 info->fix.id, var->yres); 623 if (var->vsync_len > 100) 624 printk(KERN_ERR "%s: invalid vsync_len %d\n", 625 info->fix.id, var->vsync_len); 626 if (var->upper_margin > 63) 627 printk(KERN_ERR "%s: invalid upper_margin %d\n", 628 info->fix.id, var->upper_margin); 629 if (var->lower_margin > 255) 630 printk(KERN_ERR "%s: invalid lower_margin %d\n", 631 info->fix.id, var->lower_margin); 632 #endif 633 634 /* physical screen start address */ 635 writel(VPW_VPW(var->xres * var->bits_per_pixel / 8 / 4), 636 fbi->regs + LCDC_VPW); 637 638 writel(HCR_H_WIDTH(var->hsync_len - 1) | 639 HCR_H_WAIT_1(var->right_margin - 1) | 640 HCR_H_WAIT_2(var->left_margin - 3), 641 fbi->regs + LCDC_HCR); 642 643 writel(VCR_V_WIDTH(var->vsync_len) | 644 VCR_V_WAIT_1(var->lower_margin) | 645 VCR_V_WAIT_2(var->upper_margin), 646 fbi->regs + LCDC_VCR); 647 648 writel(SIZE_XMAX(var->xres) | (var->yres & ymax_mask), 649 fbi->regs + LCDC_SIZE); 650 651 writel(fbi->pcr, fbi->regs + LCDC_PCR); 652 if (fbi->pwmr) 653 writel(fbi->pwmr, fbi->regs + LCDC_PWMR); 654 writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); 655 656 /* dmacr = 0 is no valid value, as we need DMA control marks. */ 657 if (fbi->dmacr) 658 writel(fbi->dmacr, fbi->regs + LCDC_DMACR); 659 660 if (fbi->lauscr) 661 writel(fbi->lauscr, fbi->regs + LCDC_LAUSCR); 662 663 return 0; 664 } 665 666 static int imxfb_init_fbinfo(struct platform_device *pdev) 667 { 668 struct fb_info *info = platform_get_drvdata(pdev); 669 struct imxfb_info *fbi = info->par; 670 struct device_node *np; 671 672 pr_debug("%s\n",__func__); 673 674 info->pseudo_palette = kmalloc_array(16, sizeof(u32), GFP_KERNEL); 675 if (!info->pseudo_palette) 676 return -ENOMEM; 677 678 memset(fbi, 0, sizeof(struct imxfb_info)); 679 680 fbi->devtype = pdev->id_entry->driver_data; 681 682 strscpy(info->fix.id, IMX_NAME, sizeof(info->fix.id)); 683 684 info->fix.type = FB_TYPE_PACKED_PIXELS; 685 info->fix.type_aux = 0; 686 info->fix.xpanstep = 0; 687 info->fix.ypanstep = 0; 688 info->fix.ywrapstep = 0; 689 info->fix.accel = FB_ACCEL_NONE; 690 691 info->var.nonstd = 0; 692 info->var.activate = FB_ACTIVATE_NOW; 693 info->var.height = -1; 694 info->var.width = -1; 695 info->var.accel_flags = 0; 696 info->var.vmode = FB_VMODE_NONINTERLACED; 697 698 info->fbops = &imxfb_ops; 699 info->flags = FBINFO_READS_FAST; 700 701 np = pdev->dev.of_node; 702 info->var.grayscale = of_property_read_bool(np, 703 "cmap-greyscale"); 704 fbi->cmap_inverse = of_property_read_bool(np, "cmap-inverse"); 705 fbi->cmap_static = of_property_read_bool(np, "cmap-static"); 706 707 fbi->lscr1 = IMXFB_LSCR1_DEFAULT; 708 709 of_property_read_u32(np, "fsl,lpccr", &fbi->pwmr); 710 711 of_property_read_u32(np, "fsl,lscr1", &fbi->lscr1); 712 713 of_property_read_u32(np, "fsl,dmacr", &fbi->dmacr); 714 715 return 0; 716 } 717 718 static int imxfb_of_read_mode(struct device *dev, struct device_node *np, 719 struct imx_fb_videomode *imxfb_mode) 720 { 721 int ret; 722 struct fb_videomode *of_mode = &imxfb_mode->mode; 723 u32 bpp; 724 u32 pcr; 725 726 ret = of_property_read_string(np, "model", &of_mode->name); 727 if (ret) 728 of_mode->name = NULL; 729 730 ret = of_get_fb_videomode(np, of_mode, OF_USE_NATIVE_MODE); 731 if (ret) { 732 dev_err(dev, "Failed to get videomode from DT\n"); 733 return ret; 734 } 735 736 ret = of_property_read_u32(np, "bits-per-pixel", &bpp); 737 ret |= of_property_read_u32(np, "fsl,pcr", &pcr); 738 739 if (ret) { 740 dev_err(dev, "Failed to read bpp and pcr from DT\n"); 741 return -EINVAL; 742 } 743 744 if (bpp < 1 || bpp > 255) { 745 dev_err(dev, "Bits per pixel have to be between 1 and 255\n"); 746 return -EINVAL; 747 } 748 749 imxfb_mode->bpp = bpp; 750 imxfb_mode->pcr = pcr; 751 752 /* 753 * fsl,aus-mode is optional 754 */ 755 imxfb_mode->aus_mode = of_property_read_bool(np, "fsl,aus-mode"); 756 757 return 0; 758 } 759 760 static int imxfb_lcd_check_fb(struct lcd_device *lcddev, struct fb_info *fi) 761 { 762 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev); 763 764 if (!fi || fi->par == fbi) 765 return 1; 766 767 return 0; 768 } 769 770 static int imxfb_lcd_get_contrast(struct lcd_device *lcddev) 771 { 772 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev); 773 774 return fbi->pwmr & 0xff; 775 } 776 777 static int imxfb_lcd_set_contrast(struct lcd_device *lcddev, int contrast) 778 { 779 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev); 780 781 if (fbi->pwmr && fbi->enabled) { 782 if (contrast > 255) 783 contrast = 255; 784 else if (contrast < 0) 785 contrast = 0; 786 787 fbi->pwmr &= ~0xff; 788 fbi->pwmr |= contrast; 789 790 writel(fbi->pwmr, fbi->regs + LCDC_PWMR); 791 } 792 793 return 0; 794 } 795 796 static int imxfb_lcd_get_power(struct lcd_device *lcddev) 797 { 798 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev); 799 800 if (!IS_ERR(fbi->lcd_pwr) && 801 !regulator_is_enabled(fbi->lcd_pwr)) 802 return FB_BLANK_POWERDOWN; 803 804 return FB_BLANK_UNBLANK; 805 } 806 807 static int imxfb_regulator_set(struct imxfb_info *fbi, int enable) 808 { 809 int ret; 810 811 if (enable == fbi->lcd_pwr_enabled) 812 return 0; 813 814 if (enable) 815 ret = regulator_enable(fbi->lcd_pwr); 816 else 817 ret = regulator_disable(fbi->lcd_pwr); 818 819 if (ret == 0) 820 fbi->lcd_pwr_enabled = enable; 821 822 return ret; 823 } 824 825 static int imxfb_lcd_set_power(struct lcd_device *lcddev, int power) 826 { 827 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev); 828 829 if (!IS_ERR(fbi->lcd_pwr)) 830 return imxfb_regulator_set(fbi, power == FB_BLANK_UNBLANK); 831 832 return 0; 833 } 834 835 static struct lcd_ops imxfb_lcd_ops = { 836 .check_fb = imxfb_lcd_check_fb, 837 .get_contrast = imxfb_lcd_get_contrast, 838 .set_contrast = imxfb_lcd_set_contrast, 839 .get_power = imxfb_lcd_get_power, 840 .set_power = imxfb_lcd_set_power, 841 }; 842 843 static int imxfb_setup(void) 844 { 845 char *opt, *options = NULL; 846 847 if (fb_get_options("imxfb", &options)) 848 return -ENODEV; 849 850 if (!options || !*options) 851 return 0; 852 853 while ((opt = strsep(&options, ",")) != NULL) { 854 if (!*opt) 855 continue; 856 else 857 fb_mode = opt; 858 } 859 860 return 0; 861 } 862 863 static int imxfb_probe(struct platform_device *pdev) 864 { 865 struct imxfb_info *fbi; 866 struct lcd_device *lcd; 867 struct fb_info *info; 868 struct resource *res; 869 struct imx_fb_videomode *m; 870 const struct of_device_id *of_id; 871 struct device_node *display_np; 872 int ret, i; 873 int bytes_per_pixel; 874 875 dev_info(&pdev->dev, "i.MX Framebuffer driver\n"); 876 877 ret = imxfb_setup(); 878 if (ret < 0) 879 return ret; 880 881 of_id = of_match_device(imxfb_of_dev_id, &pdev->dev); 882 if (of_id) 883 pdev->id_entry = of_id->data; 884 885 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 886 if (!res) 887 return -ENODEV; 888 889 info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev); 890 if (!info) 891 return -ENOMEM; 892 893 fbi = info->par; 894 895 platform_set_drvdata(pdev, info); 896 897 ret = imxfb_init_fbinfo(pdev); 898 if (ret < 0) 899 goto failed_init; 900 901 fb_mode = NULL; 902 903 display_np = of_parse_phandle(pdev->dev.of_node, "display", 0); 904 if (!display_np) { 905 dev_err(&pdev->dev, "No display defined in devicetree\n"); 906 ret = -EINVAL; 907 goto failed_of_parse; 908 } 909 910 /* 911 * imxfb does not support more modes, we choose only the native 912 * mode. 913 */ 914 fbi->num_modes = 1; 915 916 fbi->mode = devm_kzalloc(&pdev->dev, 917 sizeof(struct imx_fb_videomode), GFP_KERNEL); 918 if (!fbi->mode) { 919 ret = -ENOMEM; 920 of_node_put(display_np); 921 goto failed_of_parse; 922 } 923 924 ret = imxfb_of_read_mode(&pdev->dev, display_np, fbi->mode); 925 of_node_put(display_np); 926 if (ret) 927 goto failed_of_parse; 928 929 /* Calculate maximum bytes used per pixel. In most cases this should 930 * be the same as m->bpp/8 */ 931 m = &fbi->mode[0]; 932 bytes_per_pixel = (m->bpp + 7) / 8; 933 for (i = 0; i < fbi->num_modes; i++, m++) 934 info->fix.smem_len = max_t(size_t, info->fix.smem_len, 935 m->mode.xres * m->mode.yres * bytes_per_pixel); 936 937 fbi->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); 938 if (IS_ERR(fbi->clk_ipg)) { 939 ret = PTR_ERR(fbi->clk_ipg); 940 goto failed_getclock; 941 } 942 943 /* 944 * The LCDC controller does not have an enable bit. The 945 * controller starts directly when the clocks are enabled. 946 * If the clocks are enabled when the controller is not yet 947 * programmed with proper register values (enabled at the 948 * bootloader, for example) then it just goes into some undefined 949 * state. 950 * To avoid this issue, let's enable and disable LCDC IPG clock 951 * so that we force some kind of 'reset' to the LCDC block. 952 */ 953 ret = clk_prepare_enable(fbi->clk_ipg); 954 if (ret) 955 goto failed_getclock; 956 clk_disable_unprepare(fbi->clk_ipg); 957 958 fbi->clk_ahb = devm_clk_get(&pdev->dev, "ahb"); 959 if (IS_ERR(fbi->clk_ahb)) { 960 ret = PTR_ERR(fbi->clk_ahb); 961 goto failed_getclock; 962 } 963 964 fbi->clk_per = devm_clk_get(&pdev->dev, "per"); 965 if (IS_ERR(fbi->clk_per)) { 966 ret = PTR_ERR(fbi->clk_per); 967 goto failed_getclock; 968 } 969 970 fbi->regs = devm_ioremap_resource(&pdev->dev, res); 971 if (IS_ERR(fbi->regs)) { 972 ret = PTR_ERR(fbi->regs); 973 goto failed_ioremap; 974 } 975 976 fbi->map_size = PAGE_ALIGN(info->fix.smem_len); 977 info->screen_buffer = dma_alloc_wc(&pdev->dev, fbi->map_size, 978 &fbi->map_dma, GFP_KERNEL); 979 if (!info->screen_buffer) { 980 dev_err(&pdev->dev, "Failed to allocate video RAM\n"); 981 ret = -ENOMEM; 982 goto failed_map; 983 } 984 985 info->fix.smem_start = fbi->map_dma; 986 987 INIT_LIST_HEAD(&info->modelist); 988 for (i = 0; i < fbi->num_modes; i++) 989 fb_add_videomode(&fbi->mode[i].mode, &info->modelist); 990 991 /* 992 * This makes sure that our colour bitfield 993 * descriptors are correctly initialised. 994 */ 995 imxfb_check_var(&info->var, info); 996 997 /* 998 * For modes > 8bpp, the color map is bypassed. 999 * Therefore, 256 entries are enough. 1000 */ 1001 ret = fb_alloc_cmap(&info->cmap, 256, 0); 1002 if (ret < 0) 1003 goto failed_cmap; 1004 1005 imxfb_set_par(info); 1006 ret = register_framebuffer(info); 1007 if (ret < 0) { 1008 dev_err(&pdev->dev, "failed to register framebuffer\n"); 1009 goto failed_register; 1010 } 1011 1012 fbi->lcd_pwr = devm_regulator_get(&pdev->dev, "lcd"); 1013 if (PTR_ERR(fbi->lcd_pwr) == -EPROBE_DEFER) { 1014 ret = -EPROBE_DEFER; 1015 goto failed_lcd; 1016 } 1017 1018 lcd = devm_lcd_device_register(&pdev->dev, "imxfb-lcd", &pdev->dev, fbi, 1019 &imxfb_lcd_ops); 1020 if (IS_ERR(lcd)) { 1021 ret = PTR_ERR(lcd); 1022 goto failed_lcd; 1023 } 1024 1025 lcd->props.max_contrast = 0xff; 1026 1027 imxfb_enable_controller(fbi); 1028 fbi->pdev = pdev; 1029 1030 return 0; 1031 1032 failed_lcd: 1033 unregister_framebuffer(info); 1034 1035 failed_register: 1036 fb_dealloc_cmap(&info->cmap); 1037 failed_cmap: 1038 dma_free_wc(&pdev->dev, fbi->map_size, info->screen_buffer, 1039 fbi->map_dma); 1040 failed_map: 1041 failed_ioremap: 1042 failed_getclock: 1043 release_mem_region(res->start, resource_size(res)); 1044 failed_of_parse: 1045 kfree(info->pseudo_palette); 1046 failed_init: 1047 framebuffer_release(info); 1048 return ret; 1049 } 1050 1051 static void imxfb_remove(struct platform_device *pdev) 1052 { 1053 struct fb_info *info = platform_get_drvdata(pdev); 1054 struct imxfb_info *fbi = info->par; 1055 1056 imxfb_disable_controller(fbi); 1057 1058 unregister_framebuffer(info); 1059 fb_dealloc_cmap(&info->cmap); 1060 dma_free_wc(&pdev->dev, fbi->map_size, info->screen_buffer, 1061 fbi->map_dma); 1062 kfree(info->pseudo_palette); 1063 framebuffer_release(info); 1064 } 1065 1066 static int __maybe_unused imxfb_suspend(struct device *dev) 1067 { 1068 struct fb_info *info = dev_get_drvdata(dev); 1069 struct imxfb_info *fbi = info->par; 1070 1071 imxfb_disable_controller(fbi); 1072 1073 return 0; 1074 } 1075 1076 static int __maybe_unused imxfb_resume(struct device *dev) 1077 { 1078 struct fb_info *info = dev_get_drvdata(dev); 1079 struct imxfb_info *fbi = info->par; 1080 1081 imxfb_enable_controller(fbi); 1082 1083 return 0; 1084 } 1085 1086 static SIMPLE_DEV_PM_OPS(imxfb_pm_ops, imxfb_suspend, imxfb_resume); 1087 1088 static struct platform_driver imxfb_driver = { 1089 .driver = { 1090 .name = DRIVER_NAME, 1091 .of_match_table = imxfb_of_dev_id, 1092 .pm = &imxfb_pm_ops, 1093 }, 1094 .probe = imxfb_probe, 1095 .remove_new = imxfb_remove, 1096 .id_table = imxfb_devtype, 1097 }; 1098 module_platform_driver(imxfb_driver); 1099 1100 MODULE_DESCRIPTION("Freescale i.MX framebuffer driver"); 1101 MODULE_AUTHOR("Sascha Hauer, Pengutronix"); 1102 MODULE_LICENSE("GPL"); 1103