1 /* 2 * Freescale i.MX Frame Buffer device driver 3 * 4 * Copyright (C) 2004 Sascha Hauer, Pengutronix 5 * Based on acornfb.c Copyright (C) Russell King. 6 * 7 * This file is subject to the terms and conditions of the GNU General Public 8 * License. See the file COPYING in the main directory of this archive for 9 * more details. 10 * 11 * Please direct your questions and comments on this driver to the following 12 * email address: 13 * 14 * linux-arm-kernel@lists.arm.linux.org.uk 15 */ 16 17 #include <linux/module.h> 18 #include <linux/kernel.h> 19 #include <linux/errno.h> 20 #include <linux/string.h> 21 #include <linux/interrupt.h> 22 #include <linux/slab.h> 23 #include <linux/mm.h> 24 #include <linux/fb.h> 25 #include <linux/delay.h> 26 #include <linux/init.h> 27 #include <linux/ioport.h> 28 #include <linux/cpufreq.h> 29 #include <linux/clk.h> 30 #include <linux/platform_device.h> 31 #include <linux/dma-mapping.h> 32 #include <linux/io.h> 33 #include <linux/lcd.h> 34 #include <linux/math64.h> 35 #include <linux/of.h> 36 #include <linux/of_device.h> 37 38 #include <linux/regulator/consumer.h> 39 40 #include <video/of_display_timing.h> 41 #include <video/of_videomode.h> 42 #include <video/videomode.h> 43 44 #define PCR_TFT (1 << 31) 45 #define PCR_COLOR (1 << 30) 46 #define PCR_BPIX_8 (3 << 25) 47 #define PCR_BPIX_12 (4 << 25) 48 #define PCR_BPIX_16 (5 << 25) 49 #define PCR_BPIX_18 (6 << 25) 50 51 struct imx_fb_videomode { 52 struct fb_videomode mode; 53 u32 pcr; 54 bool aus_mode; 55 unsigned char bpp; 56 }; 57 58 /* 59 * Complain if VAR is out of range. 60 */ 61 #define DEBUG_VAR 1 62 63 #define DRIVER_NAME "imx-fb" 64 65 #define LCDC_SSA 0x00 66 67 #define LCDC_SIZE 0x04 68 #define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20) 69 70 #define YMAX_MASK_IMX1 0x1ff 71 #define YMAX_MASK_IMX21 0x3ff 72 73 #define LCDC_VPW 0x08 74 #define VPW_VPW(x) ((x) & 0x3ff) 75 76 #define LCDC_CPOS 0x0C 77 #define CPOS_CC1 (1<<31) 78 #define CPOS_CC0 (1<<30) 79 #define CPOS_OP (1<<28) 80 #define CPOS_CXP(x) (((x) & 3ff) << 16) 81 82 #define LCDC_LCWHB 0x10 83 #define LCWHB_BK_EN (1<<31) 84 #define LCWHB_CW(w) (((w) & 0x1f) << 24) 85 #define LCWHB_CH(h) (((h) & 0x1f) << 16) 86 #define LCWHB_BD(x) ((x) & 0xff) 87 88 #define LCDC_LCHCC 0x14 89 90 #define LCDC_PCR 0x18 91 92 #define LCDC_HCR 0x1C 93 #define HCR_H_WIDTH(x) (((x) & 0x3f) << 26) 94 #define HCR_H_WAIT_1(x) (((x) & 0xff) << 8) 95 #define HCR_H_WAIT_2(x) ((x) & 0xff) 96 97 #define LCDC_VCR 0x20 98 #define VCR_V_WIDTH(x) (((x) & 0x3f) << 26) 99 #define VCR_V_WAIT_1(x) (((x) & 0xff) << 8) 100 #define VCR_V_WAIT_2(x) ((x) & 0xff) 101 102 #define LCDC_POS 0x24 103 #define POS_POS(x) ((x) & 1f) 104 105 #define LCDC_LSCR1 0x28 106 /* bit fields in imxfb.h */ 107 108 #define LCDC_PWMR 0x2C 109 /* bit fields in imxfb.h */ 110 111 #define LCDC_DMACR 0x30 112 /* bit fields in imxfb.h */ 113 114 #define LCDC_RMCR 0x34 115 116 #define RMCR_LCDC_EN_MX1 (1<<1) 117 118 #define RMCR_SELF_REF (1<<0) 119 120 #define LCDC_LCDICR 0x38 121 #define LCDICR_INT_SYN (1<<2) 122 #define LCDICR_INT_CON (1) 123 124 #define LCDC_LCDISR 0x40 125 #define LCDISR_UDR_ERR (1<<3) 126 #define LCDISR_ERR_RES (1<<2) 127 #define LCDISR_EOF (1<<1) 128 #define LCDISR_BOF (1<<0) 129 130 #define IMXFB_LSCR1_DEFAULT 0x00120300 131 132 #define LCDC_LAUSCR 0x80 133 #define LAUSCR_AUS_MODE (1<<31) 134 135 /* Used fb-mode. Can be set on kernel command line, therefore file-static. */ 136 static const char *fb_mode; 137 138 /* 139 * These are the bitfields for each 140 * display depth that we support. 141 */ 142 struct imxfb_rgb { 143 struct fb_bitfield red; 144 struct fb_bitfield green; 145 struct fb_bitfield blue; 146 struct fb_bitfield transp; 147 }; 148 149 enum imxfb_type { 150 IMX1_FB, 151 IMX21_FB, 152 }; 153 154 enum imxfb_panel_type { 155 PANEL_TYPE_MONOCHROME, 156 PANEL_TYPE_CSTN, 157 PANEL_TYPE_TFT, 158 }; 159 160 struct imxfb_info { 161 struct platform_device *pdev; 162 void __iomem *regs; 163 struct clk *clk_ipg; 164 struct clk *clk_ahb; 165 struct clk *clk_per; 166 enum imxfb_type devtype; 167 enum imxfb_panel_type panel_type; 168 bool enabled; 169 170 /* 171 * These are the addresses we mapped 172 * the framebuffer memory region to. 173 */ 174 dma_addr_t map_dma; 175 u_int map_size; 176 177 u_int palette_size; 178 179 dma_addr_t dbar1; 180 dma_addr_t dbar2; 181 182 u_int pcr; 183 u_int lauscr; 184 u_int pwmr; 185 u_int lscr1; 186 u_int dmacr; 187 bool cmap_inverse; 188 bool cmap_static; 189 190 struct imx_fb_videomode *mode; 191 int num_modes; 192 193 struct regulator *lcd_pwr; 194 int lcd_pwr_enabled; 195 }; 196 197 static const struct platform_device_id imxfb_devtype[] = { 198 { 199 .name = "imx1-fb", 200 .driver_data = IMX1_FB, 201 }, { 202 .name = "imx21-fb", 203 .driver_data = IMX21_FB, 204 }, { 205 /* sentinel */ 206 } 207 }; 208 MODULE_DEVICE_TABLE(platform, imxfb_devtype); 209 210 static const struct of_device_id imxfb_of_dev_id[] = { 211 { 212 .compatible = "fsl,imx1-fb", 213 .data = &imxfb_devtype[IMX1_FB], 214 }, { 215 .compatible = "fsl,imx21-fb", 216 .data = &imxfb_devtype[IMX21_FB], 217 }, { 218 /* sentinel */ 219 } 220 }; 221 MODULE_DEVICE_TABLE(of, imxfb_of_dev_id); 222 223 static inline int is_imx1_fb(struct imxfb_info *fbi) 224 { 225 return fbi->devtype == IMX1_FB; 226 } 227 228 #define IMX_NAME "IMX" 229 230 /* 231 * Minimum X and Y resolutions 232 */ 233 #define MIN_XRES 64 234 #define MIN_YRES 64 235 236 /* Actually this really is 18bit support, the lowest 2 bits of each colour 237 * are unused in hardware. We claim to have 24bit support to make software 238 * like X work, which does not support 18bit. 239 */ 240 static struct imxfb_rgb def_rgb_18 = { 241 .red = {.offset = 16, .length = 8,}, 242 .green = {.offset = 8, .length = 8,}, 243 .blue = {.offset = 0, .length = 8,}, 244 .transp = {.offset = 0, .length = 0,}, 245 }; 246 247 static struct imxfb_rgb def_rgb_16_tft = { 248 .red = {.offset = 11, .length = 5,}, 249 .green = {.offset = 5, .length = 6,}, 250 .blue = {.offset = 0, .length = 5,}, 251 .transp = {.offset = 0, .length = 0,}, 252 }; 253 254 static struct imxfb_rgb def_rgb_16_stn = { 255 .red = {.offset = 8, .length = 4,}, 256 .green = {.offset = 4, .length = 4,}, 257 .blue = {.offset = 0, .length = 4,}, 258 .transp = {.offset = 0, .length = 0,}, 259 }; 260 261 static struct imxfb_rgb def_rgb_8 = { 262 .red = {.offset = 0, .length = 8,}, 263 .green = {.offset = 0, .length = 8,}, 264 .blue = {.offset = 0, .length = 8,}, 265 .transp = {.offset = 0, .length = 0,}, 266 }; 267 268 static int imxfb_activate_var(struct fb_var_screeninfo *var, 269 struct fb_info *info); 270 271 static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) 272 { 273 chan &= 0xffff; 274 chan >>= 16 - bf->length; 275 return chan << bf->offset; 276 } 277 278 static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, 279 u_int trans, struct fb_info *info) 280 { 281 struct imxfb_info *fbi = info->par; 282 u_int val, ret = 1; 283 284 #define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16) 285 if (regno < fbi->palette_size) { 286 val = (CNVT_TOHW(red, 4) << 8) | 287 (CNVT_TOHW(green,4) << 4) | 288 CNVT_TOHW(blue, 4); 289 290 writel(val, fbi->regs + 0x800 + (regno << 2)); 291 ret = 0; 292 } 293 return ret; 294 } 295 296 static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, 297 u_int trans, struct fb_info *info) 298 { 299 struct imxfb_info *fbi = info->par; 300 unsigned int val; 301 int ret = 1; 302 303 /* 304 * If inverse mode was selected, invert all the colours 305 * rather than the register number. The register number 306 * is what you poke into the framebuffer to produce the 307 * colour you requested. 308 */ 309 if (fbi->cmap_inverse) { 310 red = 0xffff - red; 311 green = 0xffff - green; 312 blue = 0xffff - blue; 313 } 314 315 /* 316 * If greyscale is true, then we convert the RGB value 317 * to greyscale no mater what visual we are using. 318 */ 319 if (info->var.grayscale) 320 red = green = blue = (19595 * red + 38470 * green + 321 7471 * blue) >> 16; 322 323 switch (info->fix.visual) { 324 case FB_VISUAL_TRUECOLOR: 325 /* 326 * 12 or 16-bit True Colour. We encode the RGB value 327 * according to the RGB bitfield information. 328 */ 329 if (regno < 16) { 330 u32 *pal = info->pseudo_palette; 331 332 val = chan_to_field(red, &info->var.red); 333 val |= chan_to_field(green, &info->var.green); 334 val |= chan_to_field(blue, &info->var.blue); 335 336 pal[regno] = val; 337 ret = 0; 338 } 339 break; 340 341 case FB_VISUAL_STATIC_PSEUDOCOLOR: 342 case FB_VISUAL_PSEUDOCOLOR: 343 ret = imxfb_setpalettereg(regno, red, green, blue, trans, info); 344 break; 345 } 346 347 return ret; 348 } 349 350 static const struct imx_fb_videomode *imxfb_find_mode(struct imxfb_info *fbi) 351 { 352 struct imx_fb_videomode *m; 353 int i; 354 355 if (!fb_mode) 356 return &fbi->mode[0]; 357 358 for (i = 0, m = &fbi->mode[0]; i < fbi->num_modes; i++, m++) { 359 if (!strcmp(m->mode.name, fb_mode)) 360 return m; 361 } 362 return NULL; 363 } 364 365 /* 366 * imxfb_check_var(): 367 * Round up in the following order: bits_per_pixel, xres, 368 * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale, 369 * bitfields, horizontal timing, vertical timing. 370 */ 371 static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) 372 { 373 struct imxfb_info *fbi = info->par; 374 struct imxfb_rgb *rgb; 375 const struct imx_fb_videomode *imxfb_mode; 376 unsigned long lcd_clk; 377 unsigned long long tmp; 378 u32 pcr = 0; 379 380 if (var->xres < MIN_XRES) 381 var->xres = MIN_XRES; 382 if (var->yres < MIN_YRES) 383 var->yres = MIN_YRES; 384 385 imxfb_mode = imxfb_find_mode(fbi); 386 if (!imxfb_mode) 387 return -EINVAL; 388 389 var->xres = imxfb_mode->mode.xres; 390 var->yres = imxfb_mode->mode.yres; 391 var->bits_per_pixel = imxfb_mode->bpp; 392 var->pixclock = imxfb_mode->mode.pixclock; 393 var->hsync_len = imxfb_mode->mode.hsync_len; 394 var->left_margin = imxfb_mode->mode.left_margin; 395 var->right_margin = imxfb_mode->mode.right_margin; 396 var->vsync_len = imxfb_mode->mode.vsync_len; 397 var->upper_margin = imxfb_mode->mode.upper_margin; 398 var->lower_margin = imxfb_mode->mode.lower_margin; 399 var->sync = imxfb_mode->mode.sync; 400 var->xres_virtual = max(var->xres_virtual, var->xres); 401 var->yres_virtual = max(var->yres_virtual, var->yres); 402 403 pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel); 404 405 lcd_clk = clk_get_rate(fbi->clk_per); 406 407 tmp = var->pixclock * (unsigned long long)lcd_clk; 408 409 do_div(tmp, 1000000); 410 411 if (do_div(tmp, 1000000) > 500000) 412 tmp++; 413 414 pcr = (unsigned int)tmp; 415 416 if (--pcr > 0x3F) { 417 pcr = 0x3F; 418 printk(KERN_WARNING "Must limit pixel clock to %luHz\n", 419 lcd_clk / pcr); 420 } 421 422 switch (var->bits_per_pixel) { 423 case 32: 424 pcr |= PCR_BPIX_18; 425 rgb = &def_rgb_18; 426 break; 427 case 16: 428 default: 429 if (is_imx1_fb(fbi)) 430 pcr |= PCR_BPIX_12; 431 else 432 pcr |= PCR_BPIX_16; 433 434 if (imxfb_mode->pcr & PCR_TFT) 435 rgb = &def_rgb_16_tft; 436 else 437 rgb = &def_rgb_16_stn; 438 break; 439 case 8: 440 pcr |= PCR_BPIX_8; 441 rgb = &def_rgb_8; 442 break; 443 } 444 445 /* add sync polarities */ 446 pcr |= imxfb_mode->pcr & ~(0x3f | (7 << 25)); 447 448 fbi->pcr = pcr; 449 /* 450 * The LCDC AUS Mode Control Register does not exist on imx1. 451 */ 452 if (!is_imx1_fb(fbi) && imxfb_mode->aus_mode) 453 fbi->lauscr = LAUSCR_AUS_MODE; 454 455 if (imxfb_mode->pcr & PCR_TFT) 456 fbi->panel_type = PANEL_TYPE_TFT; 457 else if (imxfb_mode->pcr & PCR_COLOR) 458 fbi->panel_type = PANEL_TYPE_CSTN; 459 else 460 fbi->panel_type = PANEL_TYPE_MONOCHROME; 461 462 /* 463 * Copy the RGB parameters for this display 464 * from the machine specific parameters. 465 */ 466 var->red = rgb->red; 467 var->green = rgb->green; 468 var->blue = rgb->blue; 469 var->transp = rgb->transp; 470 471 pr_debug("RGBT length = %d:%d:%d:%d\n", 472 var->red.length, var->green.length, var->blue.length, 473 var->transp.length); 474 475 pr_debug("RGBT offset = %d:%d:%d:%d\n", 476 var->red.offset, var->green.offset, var->blue.offset, 477 var->transp.offset); 478 479 return 0; 480 } 481 482 /* 483 * imxfb_set_par(): 484 * Set the user defined part of the display for the specified console 485 */ 486 static int imxfb_set_par(struct fb_info *info) 487 { 488 struct imxfb_info *fbi = info->par; 489 struct fb_var_screeninfo *var = &info->var; 490 491 if (var->bits_per_pixel == 16 || var->bits_per_pixel == 32) 492 info->fix.visual = FB_VISUAL_TRUECOLOR; 493 else if (!fbi->cmap_static) 494 info->fix.visual = FB_VISUAL_PSEUDOCOLOR; 495 else { 496 /* 497 * Some people have weird ideas about wanting static 498 * pseudocolor maps. I suspect their user space 499 * applications are broken. 500 */ 501 info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR; 502 } 503 504 info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8; 505 fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16; 506 507 imxfb_activate_var(var, info); 508 509 return 0; 510 } 511 512 static int imxfb_enable_controller(struct imxfb_info *fbi) 513 { 514 int ret; 515 516 if (fbi->enabled) 517 return 0; 518 519 pr_debug("Enabling LCD controller\n"); 520 521 writel(fbi->map_dma, fbi->regs + LCDC_SSA); 522 523 /* panning offset 0 (0 pixel offset) */ 524 writel(0x00000000, fbi->regs + LCDC_POS); 525 526 /* disable hardware cursor */ 527 writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1), 528 fbi->regs + LCDC_CPOS); 529 530 /* 531 * RMCR_LCDC_EN_MX1 is present on i.MX1 only, but doesn't hurt 532 * on other SoCs 533 */ 534 writel(RMCR_LCDC_EN_MX1, fbi->regs + LCDC_RMCR); 535 536 ret = clk_prepare_enable(fbi->clk_ipg); 537 if (ret) 538 goto err_enable_ipg; 539 540 ret = clk_prepare_enable(fbi->clk_ahb); 541 if (ret) 542 goto err_enable_ahb; 543 544 ret = clk_prepare_enable(fbi->clk_per); 545 if (ret) 546 goto err_enable_per; 547 548 fbi->enabled = true; 549 return 0; 550 551 err_enable_per: 552 clk_disable_unprepare(fbi->clk_ahb); 553 err_enable_ahb: 554 clk_disable_unprepare(fbi->clk_ipg); 555 err_enable_ipg: 556 writel(0, fbi->regs + LCDC_RMCR); 557 558 return ret; 559 } 560 561 static void imxfb_disable_controller(struct imxfb_info *fbi) 562 { 563 if (!fbi->enabled) 564 return; 565 566 pr_debug("Disabling LCD controller\n"); 567 568 clk_disable_unprepare(fbi->clk_per); 569 clk_disable_unprepare(fbi->clk_ahb); 570 clk_disable_unprepare(fbi->clk_ipg); 571 fbi->enabled = false; 572 573 writel(0, fbi->regs + LCDC_RMCR); 574 } 575 576 static int imxfb_blank(int blank, struct fb_info *info) 577 { 578 struct imxfb_info *fbi = info->par; 579 580 pr_debug("imxfb_blank: blank=%d\n", blank); 581 582 switch (blank) { 583 case FB_BLANK_POWERDOWN: 584 case FB_BLANK_VSYNC_SUSPEND: 585 case FB_BLANK_HSYNC_SUSPEND: 586 case FB_BLANK_NORMAL: 587 imxfb_disable_controller(fbi); 588 break; 589 590 case FB_BLANK_UNBLANK: 591 return imxfb_enable_controller(fbi); 592 } 593 return 0; 594 } 595 596 static const struct fb_ops imxfb_ops = { 597 .owner = THIS_MODULE, 598 FB_DEFAULT_IOMEM_OPS, 599 .fb_check_var = imxfb_check_var, 600 .fb_set_par = imxfb_set_par, 601 .fb_setcolreg = imxfb_setcolreg, 602 .fb_blank = imxfb_blank, 603 }; 604 605 /* 606 * imxfb_activate_var(): 607 * Configures LCD Controller based on entries in var parameter. Settings are 608 * only written to the controller if changes were made. 609 */ 610 static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info) 611 { 612 struct imxfb_info *fbi = info->par; 613 u32 ymax_mask = is_imx1_fb(fbi) ? YMAX_MASK_IMX1 : YMAX_MASK_IMX21; 614 u8 left_margin_low; 615 616 pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n", 617 var->xres, var->hsync_len, 618 var->left_margin, var->right_margin); 619 pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n", 620 var->yres, var->vsync_len, 621 var->upper_margin, var->lower_margin); 622 623 if (fbi->panel_type == PANEL_TYPE_TFT) 624 left_margin_low = 3; 625 else if (fbi->panel_type == PANEL_TYPE_CSTN) 626 left_margin_low = 2; 627 else 628 left_margin_low = 0; 629 630 #if DEBUG_VAR 631 if (var->xres < 16 || var->xres > 1024) 632 printk(KERN_ERR "%s: invalid xres %d\n", 633 info->fix.id, var->xres); 634 if (var->hsync_len < 1 || var->hsync_len > 64) 635 printk(KERN_ERR "%s: invalid hsync_len %d\n", 636 info->fix.id, var->hsync_len); 637 if (var->left_margin < left_margin_low || var->left_margin > 255) 638 printk(KERN_ERR "%s: invalid left_margin %d\n", 639 info->fix.id, var->left_margin); 640 if (var->right_margin < 1 || var->right_margin > 255) 641 printk(KERN_ERR "%s: invalid right_margin %d\n", 642 info->fix.id, var->right_margin); 643 if (var->yres < 1 || var->yres > ymax_mask) 644 printk(KERN_ERR "%s: invalid yres %d\n", 645 info->fix.id, var->yres); 646 if (var->vsync_len > 100) 647 printk(KERN_ERR "%s: invalid vsync_len %d\n", 648 info->fix.id, var->vsync_len); 649 if (var->upper_margin > 63) 650 printk(KERN_ERR "%s: invalid upper_margin %d\n", 651 info->fix.id, var->upper_margin); 652 if (var->lower_margin > 255) 653 printk(KERN_ERR "%s: invalid lower_margin %d\n", 654 info->fix.id, var->lower_margin); 655 #endif 656 657 /* physical screen start address */ 658 writel(VPW_VPW(var->xres * var->bits_per_pixel / 8 / 4), 659 fbi->regs + LCDC_VPW); 660 661 writel(HCR_H_WIDTH(var->hsync_len - 1) | 662 HCR_H_WAIT_1(var->right_margin - 1) | 663 HCR_H_WAIT_2(var->left_margin - left_margin_low), 664 fbi->regs + LCDC_HCR); 665 666 writel(VCR_V_WIDTH(var->vsync_len) | 667 VCR_V_WAIT_1(var->lower_margin) | 668 VCR_V_WAIT_2(var->upper_margin), 669 fbi->regs + LCDC_VCR); 670 671 writel(SIZE_XMAX(var->xres) | (var->yres & ymax_mask), 672 fbi->regs + LCDC_SIZE); 673 674 writel(fbi->pcr, fbi->regs + LCDC_PCR); 675 if (fbi->pwmr) 676 writel(fbi->pwmr, fbi->regs + LCDC_PWMR); 677 writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); 678 679 /* dmacr = 0 is no valid value, as we need DMA control marks. */ 680 if (fbi->dmacr) 681 writel(fbi->dmacr, fbi->regs + LCDC_DMACR); 682 683 if (fbi->lauscr) 684 writel(fbi->lauscr, fbi->regs + LCDC_LAUSCR); 685 686 return 0; 687 } 688 689 static int imxfb_init_fbinfo(struct platform_device *pdev) 690 { 691 struct fb_info *info = platform_get_drvdata(pdev); 692 struct imxfb_info *fbi = info->par; 693 struct device_node *np; 694 695 pr_debug("%s\n",__func__); 696 697 info->pseudo_palette = devm_kmalloc_array(&pdev->dev, 16, 698 sizeof(u32), GFP_KERNEL); 699 if (!info->pseudo_palette) 700 return -ENOMEM; 701 702 memset(fbi, 0, sizeof(struct imxfb_info)); 703 704 fbi->devtype = pdev->id_entry->driver_data; 705 706 strscpy(info->fix.id, IMX_NAME, sizeof(info->fix.id)); 707 708 info->fix.type = FB_TYPE_PACKED_PIXELS; 709 info->fix.type_aux = 0; 710 info->fix.xpanstep = 0; 711 info->fix.ypanstep = 0; 712 info->fix.ywrapstep = 0; 713 info->fix.accel = FB_ACCEL_NONE; 714 715 info->var.nonstd = 0; 716 info->var.activate = FB_ACTIVATE_NOW; 717 info->var.height = -1; 718 info->var.width = -1; 719 info->var.accel_flags = 0; 720 info->var.vmode = FB_VMODE_NONINTERLACED; 721 722 info->fbops = &imxfb_ops; 723 info->flags = FBINFO_READS_FAST; 724 725 np = pdev->dev.of_node; 726 info->var.grayscale = of_property_read_bool(np, 727 "cmap-greyscale"); 728 fbi->cmap_inverse = of_property_read_bool(np, "cmap-inverse"); 729 fbi->cmap_static = of_property_read_bool(np, "cmap-static"); 730 731 fbi->lscr1 = IMXFB_LSCR1_DEFAULT; 732 733 of_property_read_u32(np, "fsl,lpccr", &fbi->pwmr); 734 735 of_property_read_u32(np, "fsl,lscr1", &fbi->lscr1); 736 737 of_property_read_u32(np, "fsl,dmacr", &fbi->dmacr); 738 739 return 0; 740 } 741 742 static int imxfb_of_read_mode(struct device *dev, struct device_node *np, 743 struct imx_fb_videomode *imxfb_mode) 744 { 745 int ret; 746 struct fb_videomode *of_mode = &imxfb_mode->mode; 747 u32 bpp; 748 u32 pcr; 749 750 ret = of_property_read_string(np, "model", &of_mode->name); 751 if (ret) 752 of_mode->name = NULL; 753 754 ret = of_get_fb_videomode(np, of_mode, OF_USE_NATIVE_MODE); 755 if (ret) { 756 dev_err(dev, "Failed to get videomode from DT\n"); 757 return ret; 758 } 759 760 ret = of_property_read_u32(np, "bits-per-pixel", &bpp); 761 ret |= of_property_read_u32(np, "fsl,pcr", &pcr); 762 763 if (ret) { 764 dev_err(dev, "Failed to read bpp and pcr from DT\n"); 765 return -EINVAL; 766 } 767 768 if (bpp < 1 || bpp > 255) { 769 dev_err(dev, "Bits per pixel have to be between 1 and 255\n"); 770 return -EINVAL; 771 } 772 773 imxfb_mode->bpp = bpp; 774 imxfb_mode->pcr = pcr; 775 776 /* 777 * fsl,aus-mode is optional 778 */ 779 imxfb_mode->aus_mode = of_property_read_bool(np, "fsl,aus-mode"); 780 781 return 0; 782 } 783 784 static int imxfb_lcd_check_fb(struct lcd_device *lcddev, struct fb_info *fi) 785 { 786 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev); 787 788 if (!fi || fi->par == fbi) 789 return 1; 790 791 return 0; 792 } 793 794 static int imxfb_lcd_get_contrast(struct lcd_device *lcddev) 795 { 796 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev); 797 798 return fbi->pwmr & 0xff; 799 } 800 801 static int imxfb_lcd_set_contrast(struct lcd_device *lcddev, int contrast) 802 { 803 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev); 804 805 if (fbi->pwmr && fbi->enabled) { 806 if (contrast > 255) 807 contrast = 255; 808 else if (contrast < 0) 809 contrast = 0; 810 811 fbi->pwmr &= ~0xff; 812 fbi->pwmr |= contrast; 813 814 writel(fbi->pwmr, fbi->regs + LCDC_PWMR); 815 } 816 817 return 0; 818 } 819 820 static int imxfb_lcd_get_power(struct lcd_device *lcddev) 821 { 822 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev); 823 824 if (!IS_ERR(fbi->lcd_pwr) && 825 !regulator_is_enabled(fbi->lcd_pwr)) 826 return FB_BLANK_POWERDOWN; 827 828 return FB_BLANK_UNBLANK; 829 } 830 831 static int imxfb_regulator_set(struct imxfb_info *fbi, int enable) 832 { 833 int ret; 834 835 if (enable == fbi->lcd_pwr_enabled) 836 return 0; 837 838 if (enable) 839 ret = regulator_enable(fbi->lcd_pwr); 840 else 841 ret = regulator_disable(fbi->lcd_pwr); 842 843 if (ret == 0) 844 fbi->lcd_pwr_enabled = enable; 845 846 return ret; 847 } 848 849 static int imxfb_lcd_set_power(struct lcd_device *lcddev, int power) 850 { 851 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev); 852 853 if (!IS_ERR(fbi->lcd_pwr)) 854 return imxfb_regulator_set(fbi, power == FB_BLANK_UNBLANK); 855 856 return 0; 857 } 858 859 static struct lcd_ops imxfb_lcd_ops = { 860 .check_fb = imxfb_lcd_check_fb, 861 .get_contrast = imxfb_lcd_get_contrast, 862 .set_contrast = imxfb_lcd_set_contrast, 863 .get_power = imxfb_lcd_get_power, 864 .set_power = imxfb_lcd_set_power, 865 }; 866 867 static int imxfb_setup(void) 868 { 869 char *opt, *options = NULL; 870 871 if (fb_get_options("imxfb", &options)) 872 return -ENODEV; 873 874 if (!options || !*options) 875 return 0; 876 877 while ((opt = strsep(&options, ",")) != NULL) { 878 if (!*opt) 879 continue; 880 else 881 fb_mode = opt; 882 } 883 884 return 0; 885 } 886 887 static int imxfb_probe(struct platform_device *pdev) 888 { 889 struct imxfb_info *fbi; 890 struct lcd_device *lcd; 891 struct fb_info *info; 892 struct imx_fb_videomode *m; 893 const struct of_device_id *of_id; 894 struct device_node *display_np; 895 int ret, i; 896 int bytes_per_pixel; 897 898 dev_info(&pdev->dev, "i.MX Framebuffer driver\n"); 899 900 ret = imxfb_setup(); 901 if (ret < 0) 902 return ret; 903 904 of_id = of_match_device(imxfb_of_dev_id, &pdev->dev); 905 if (of_id) 906 pdev->id_entry = of_id->data; 907 908 info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev); 909 if (!info) 910 return -ENOMEM; 911 912 fbi = info->par; 913 914 platform_set_drvdata(pdev, info); 915 916 ret = imxfb_init_fbinfo(pdev); 917 if (ret < 0) 918 goto failed_init; 919 920 fb_mode = NULL; 921 922 display_np = of_parse_phandle(pdev->dev.of_node, "display", 0); 923 if (!display_np) { 924 dev_err(&pdev->dev, "No display defined in devicetree\n"); 925 ret = -EINVAL; 926 goto failed_init; 927 } 928 929 /* 930 * imxfb does not support more modes, we choose only the native 931 * mode. 932 */ 933 fbi->num_modes = 1; 934 935 fbi->mode = devm_kzalloc(&pdev->dev, 936 sizeof(struct imx_fb_videomode), GFP_KERNEL); 937 if (!fbi->mode) { 938 ret = -ENOMEM; 939 of_node_put(display_np); 940 goto failed_init; 941 } 942 943 ret = imxfb_of_read_mode(&pdev->dev, display_np, fbi->mode); 944 of_node_put(display_np); 945 if (ret) 946 goto failed_init; 947 948 /* Calculate maximum bytes used per pixel. In most cases this should 949 * be the same as m->bpp/8 */ 950 m = &fbi->mode[0]; 951 bytes_per_pixel = (m->bpp + 7) / 8; 952 for (i = 0; i < fbi->num_modes; i++, m++) 953 info->fix.smem_len = max_t(size_t, info->fix.smem_len, 954 m->mode.xres * m->mode.yres * bytes_per_pixel); 955 956 fbi->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); 957 if (IS_ERR(fbi->clk_ipg)) { 958 ret = PTR_ERR(fbi->clk_ipg); 959 goto failed_init; 960 } 961 962 /* 963 * The LCDC controller does not have an enable bit. The 964 * controller starts directly when the clocks are enabled. 965 * If the clocks are enabled when the controller is not yet 966 * programmed with proper register values (enabled at the 967 * bootloader, for example) then it just goes into some undefined 968 * state. 969 * To avoid this issue, let's enable and disable LCDC IPG clock 970 * so that we force some kind of 'reset' to the LCDC block. 971 */ 972 ret = clk_prepare_enable(fbi->clk_ipg); 973 if (ret) 974 goto failed_init; 975 clk_disable_unprepare(fbi->clk_ipg); 976 977 fbi->clk_ahb = devm_clk_get(&pdev->dev, "ahb"); 978 if (IS_ERR(fbi->clk_ahb)) { 979 ret = PTR_ERR(fbi->clk_ahb); 980 goto failed_init; 981 } 982 983 fbi->clk_per = devm_clk_get(&pdev->dev, "per"); 984 if (IS_ERR(fbi->clk_per)) { 985 ret = PTR_ERR(fbi->clk_per); 986 goto failed_init; 987 } 988 989 fbi->regs = devm_platform_ioremap_resource(pdev, 0); 990 if (IS_ERR(fbi->regs)) { 991 ret = PTR_ERR(fbi->regs); 992 goto failed_init; 993 } 994 995 fbi->map_size = PAGE_ALIGN(info->fix.smem_len); 996 info->screen_buffer = dma_alloc_wc(&pdev->dev, fbi->map_size, 997 &fbi->map_dma, GFP_KERNEL); 998 if (!info->screen_buffer) { 999 dev_err(&pdev->dev, "Failed to allocate video RAM\n"); 1000 ret = -ENOMEM; 1001 goto failed_init; 1002 } 1003 1004 info->fix.smem_start = fbi->map_dma; 1005 1006 INIT_LIST_HEAD(&info->modelist); 1007 for (i = 0; i < fbi->num_modes; i++) 1008 fb_add_videomode(&fbi->mode[i].mode, &info->modelist); 1009 1010 /* 1011 * This makes sure that our colour bitfield 1012 * descriptors are correctly initialised. 1013 */ 1014 imxfb_check_var(&info->var, info); 1015 1016 /* 1017 * For modes > 8bpp, the color map is bypassed. 1018 * Therefore, 256 entries are enough. 1019 */ 1020 ret = fb_alloc_cmap(&info->cmap, 256, 0); 1021 if (ret < 0) 1022 goto failed_cmap; 1023 1024 imxfb_set_par(info); 1025 ret = register_framebuffer(info); 1026 if (ret < 0) { 1027 dev_err(&pdev->dev, "failed to register framebuffer\n"); 1028 goto failed_register; 1029 } 1030 1031 fbi->lcd_pwr = devm_regulator_get(&pdev->dev, "lcd"); 1032 if (PTR_ERR(fbi->lcd_pwr) == -EPROBE_DEFER) { 1033 ret = -EPROBE_DEFER; 1034 goto failed_lcd; 1035 } 1036 1037 lcd = devm_lcd_device_register(&pdev->dev, "imxfb-lcd", &pdev->dev, fbi, 1038 &imxfb_lcd_ops); 1039 if (IS_ERR(lcd)) { 1040 ret = PTR_ERR(lcd); 1041 goto failed_lcd; 1042 } 1043 1044 lcd->props.max_contrast = 0xff; 1045 1046 imxfb_enable_controller(fbi); 1047 fbi->pdev = pdev; 1048 1049 return 0; 1050 1051 failed_lcd: 1052 unregister_framebuffer(info); 1053 failed_register: 1054 fb_dealloc_cmap(&info->cmap); 1055 failed_cmap: 1056 dma_free_wc(&pdev->dev, fbi->map_size, info->screen_buffer, 1057 fbi->map_dma); 1058 failed_init: 1059 framebuffer_release(info); 1060 return ret; 1061 } 1062 1063 static void imxfb_remove(struct platform_device *pdev) 1064 { 1065 struct fb_info *info = platform_get_drvdata(pdev); 1066 struct imxfb_info *fbi = info->par; 1067 1068 imxfb_disable_controller(fbi); 1069 1070 unregister_framebuffer(info); 1071 fb_dealloc_cmap(&info->cmap); 1072 dma_free_wc(&pdev->dev, fbi->map_size, info->screen_buffer, 1073 fbi->map_dma); 1074 framebuffer_release(info); 1075 } 1076 1077 static int imxfb_suspend(struct device *dev) 1078 { 1079 struct fb_info *info = dev_get_drvdata(dev); 1080 struct imxfb_info *fbi = info->par; 1081 1082 imxfb_disable_controller(fbi); 1083 1084 return 0; 1085 } 1086 1087 static int imxfb_resume(struct device *dev) 1088 { 1089 struct fb_info *info = dev_get_drvdata(dev); 1090 struct imxfb_info *fbi = info->par; 1091 1092 imxfb_enable_controller(fbi); 1093 1094 return 0; 1095 } 1096 1097 static DEFINE_SIMPLE_DEV_PM_OPS(imxfb_pm_ops, imxfb_suspend, imxfb_resume); 1098 1099 static struct platform_driver imxfb_driver = { 1100 .driver = { 1101 .name = DRIVER_NAME, 1102 .of_match_table = imxfb_of_dev_id, 1103 .pm = pm_sleep_ptr(&imxfb_pm_ops), 1104 }, 1105 .probe = imxfb_probe, 1106 .remove_new = imxfb_remove, 1107 .id_table = imxfb_devtype, 1108 }; 1109 module_platform_driver(imxfb_driver); 1110 1111 MODULE_DESCRIPTION("Freescale i.MX framebuffer driver"); 1112 MODULE_AUTHOR("Sascha Hauer, Pengutronix"); 1113 MODULE_LICENSE("GPL"); 1114