1 /* 2 * controlfb.c -- frame buffer device for the PowerMac 'control' display 3 * 4 * Created 12 July 1998 by Dan Jacobowitz <dan@debian.org> 5 * Copyright (C) 1998 Dan Jacobowitz 6 * Copyright (C) 2001 Takashi Oe 7 * 8 * Mmap code by Michel Lanners <mlan@cpu.lu> 9 * 10 * Frame buffer structure from: 11 * drivers/video/chipsfb.c -- frame buffer device for 12 * Chips & Technologies 65550 chip. 13 * 14 * Copyright (C) 1998 Paul Mackerras 15 * 16 * This file is derived from the Powermac "chips" driver: 17 * Copyright (C) 1997 Fabio Riccardi. 18 * And from the frame buffer device for Open Firmware-initialized devices: 19 * Copyright (C) 1997 Geert Uytterhoeven. 20 * 21 * Hardware information from: 22 * control.c: Console support for PowerMac "control" display adaptor. 23 * Copyright (C) 1996 Paul Mackerras 24 * 25 * Updated to 2.5 framebuffer API by Ben Herrenschmidt 26 * <benh@kernel.crashing.org>, Paul Mackerras <paulus@samba.org>, 27 * and James Simmons <jsimmons@infradead.org>. 28 * 29 * This file is subject to the terms and conditions of the GNU General Public 30 * License. See the file COPYING in the main directory of this archive for 31 * more details. 32 */ 33 34 #include <linux/module.h> 35 #include <linux/kernel.h> 36 #include <linux/errno.h> 37 #include <linux/string.h> 38 #include <linux/mm.h> 39 #include <linux/slab.h> 40 #include <linux/vmalloc.h> 41 #include <linux/delay.h> 42 #include <linux/interrupt.h> 43 #include <linux/of.h> 44 #include <linux/of_address.h> 45 #include <linux/fb.h> 46 #include <linux/init.h> 47 #include <linux/pci.h> 48 #include <linux/nvram.h> 49 #include <linux/adb.h> 50 #include <linux/cuda.h> 51 #include <asm/prom.h> 52 #include <asm/btext.h> 53 54 #include "macmodes.h" 55 #include "controlfb.h" 56 57 struct fb_par_control { 58 int vmode, cmode; 59 int xres, yres; 60 int vxres, vyres; 61 int xoffset, yoffset; 62 int pitch; 63 struct control_regvals regvals; 64 unsigned long sync; 65 unsigned char ctrl; 66 }; 67 68 #define DIRTY(z) ((x)->z != (y)->z) 69 #define DIRTY_CMAP(z) (memcmp(&((x)->z), &((y)->z), sizeof((y)->z))) 70 static inline int PAR_EQUAL(struct fb_par_control *x, struct fb_par_control *y) 71 { 72 int i, results; 73 74 results = 1; 75 for (i = 0; i < 3; i++) 76 results &= !DIRTY(regvals.clock_params[i]); 77 if (!results) 78 return 0; 79 for (i = 0; i < 16; i++) 80 results &= !DIRTY(regvals.regs[i]); 81 if (!results) 82 return 0; 83 return (!DIRTY(cmode) && !DIRTY(xres) && !DIRTY(yres) 84 && !DIRTY(vxres) && !DIRTY(vyres)); 85 } 86 static inline int VAR_MATCH(struct fb_var_screeninfo *x, struct fb_var_screeninfo *y) 87 { 88 return (!DIRTY(bits_per_pixel) && !DIRTY(xres) 89 && !DIRTY(yres) && !DIRTY(xres_virtual) 90 && !DIRTY(yres_virtual) 91 && !DIRTY_CMAP(red) && !DIRTY_CMAP(green) && !DIRTY_CMAP(blue)); 92 } 93 94 struct fb_info_control { 95 struct fb_info info; 96 struct fb_par_control par; 97 u32 pseudo_palette[16]; 98 99 struct cmap_regs __iomem *cmap_regs; 100 unsigned long cmap_regs_phys; 101 102 struct control_regs __iomem *control_regs; 103 unsigned long control_regs_phys; 104 unsigned long control_regs_size; 105 106 __u8 __iomem *frame_buffer; 107 unsigned long frame_buffer_phys; 108 unsigned long fb_orig_base; 109 unsigned long fb_orig_size; 110 111 int control_use_bank2; 112 unsigned long total_vram; 113 unsigned char vram_attr; 114 }; 115 116 /* control register access macro */ 117 #define CNTRL_REG(INFO,REG) (&(((INFO)->control_regs->REG).r)) 118 119 120 /******************** Prototypes for exported functions ********************/ 121 /* 122 * struct fb_ops 123 */ 124 static int controlfb_pan_display(struct fb_var_screeninfo *var, 125 struct fb_info *info); 126 static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, 127 u_int transp, struct fb_info *info); 128 static int controlfb_blank(int blank_mode, struct fb_info *info); 129 static int controlfb_mmap(struct fb_info *info, 130 struct vm_area_struct *vma); 131 static int controlfb_set_par (struct fb_info *info); 132 static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info); 133 134 /******************** Prototypes for internal functions **********************/ 135 136 static void set_control_clock(unsigned char *params); 137 static int init_control(struct fb_info_control *p); 138 static void control_set_hardware(struct fb_info_control *p, 139 struct fb_par_control *par); 140 static int control_of_init(struct device_node *dp); 141 static void find_vram_size(struct fb_info_control *p); 142 static int read_control_sense(struct fb_info_control *p); 143 static int calc_clock_params(unsigned long clk, unsigned char *param); 144 static int control_var_to_par(struct fb_var_screeninfo *var, 145 struct fb_par_control *par, const struct fb_info *fb_info); 146 static inline void control_par_to_var(struct fb_par_control *par, 147 struct fb_var_screeninfo *var); 148 static void control_init_info(struct fb_info *info, struct fb_info_control *p); 149 static void control_cleanup(void); 150 151 152 /************************** Internal variables *******************************/ 153 154 static struct fb_info_control *control_fb; 155 156 static int default_vmode __initdata = VMODE_NVRAM; 157 static int default_cmode __initdata = CMODE_NVRAM; 158 159 160 static struct fb_ops controlfb_ops = { 161 .owner = THIS_MODULE, 162 .fb_check_var = controlfb_check_var, 163 .fb_set_par = controlfb_set_par, 164 .fb_setcolreg = controlfb_setcolreg, 165 .fb_pan_display = controlfb_pan_display, 166 .fb_blank = controlfb_blank, 167 .fb_mmap = controlfb_mmap, 168 .fb_fillrect = cfb_fillrect, 169 .fb_copyarea = cfb_copyarea, 170 .fb_imageblit = cfb_imageblit, 171 }; 172 173 174 /******************** The functions for controlfb_ops ********************/ 175 176 #ifdef MODULE 177 MODULE_LICENSE("GPL"); 178 179 int init_module(void) 180 { 181 struct device_node *dp; 182 int ret = -ENXIO; 183 184 dp = of_find_node_by_name(NULL, "control"); 185 if (dp != 0 && !control_of_init(dp)) 186 ret = 0; 187 of_node_put(dp); 188 189 return ret; 190 } 191 192 void cleanup_module(void) 193 { 194 control_cleanup(); 195 } 196 #endif 197 198 /* 199 * Checks a var structure 200 */ 201 static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info) 202 { 203 struct fb_par_control par; 204 int err; 205 206 err = control_var_to_par(var, &par, info); 207 if (err) 208 return err; 209 control_par_to_var(&par, var); 210 211 return 0; 212 } 213 214 /* 215 * Applies current var to display 216 */ 217 static int controlfb_set_par (struct fb_info *info) 218 { 219 struct fb_info_control *p = 220 container_of(info, struct fb_info_control, info); 221 struct fb_par_control par; 222 int err; 223 224 if((err = control_var_to_par(&info->var, &par, info))) { 225 printk (KERN_ERR "controlfb_set_par: error calling" 226 " control_var_to_par: %d.\n", err); 227 return err; 228 } 229 230 control_set_hardware(p, &par); 231 232 info->fix.visual = (p->par.cmode == CMODE_8) ? 233 FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR; 234 info->fix.line_length = p->par.pitch; 235 info->fix.xpanstep = 32 >> p->par.cmode; 236 info->fix.ypanstep = 1; 237 238 return 0; 239 } 240 241 /* 242 * Set screen start address according to var offset values 243 */ 244 static inline void set_screen_start(int xoffset, int yoffset, 245 struct fb_info_control *p) 246 { 247 struct fb_par_control *par = &p->par; 248 249 par->xoffset = xoffset; 250 par->yoffset = yoffset; 251 out_le32(CNTRL_REG(p,start_addr), 252 par->yoffset * par->pitch + (par->xoffset << par->cmode)); 253 } 254 255 256 static int controlfb_pan_display(struct fb_var_screeninfo *var, 257 struct fb_info *info) 258 { 259 unsigned int xoffset, hstep; 260 struct fb_info_control *p = 261 container_of(info, struct fb_info_control, info); 262 struct fb_par_control *par = &p->par; 263 264 /* 265 * make sure start addr will be 32-byte aligned 266 */ 267 hstep = 0x1f >> par->cmode; 268 xoffset = (var->xoffset + hstep) & ~hstep; 269 270 if (xoffset+par->xres > par->vxres || 271 var->yoffset+par->yres > par->vyres) 272 return -EINVAL; 273 274 set_screen_start(xoffset, var->yoffset, p); 275 276 return 0; 277 } 278 279 280 /* 281 * Private mmap since we want to have a different caching on the framebuffer 282 * for controlfb. 283 * Note there's no locking in here; it's done in fb_mmap() in fbmem.c. 284 */ 285 static int controlfb_mmap(struct fb_info *info, 286 struct vm_area_struct *vma) 287 { 288 unsigned long mmio_pgoff; 289 unsigned long start; 290 u32 len; 291 292 start = info->fix.smem_start; 293 len = info->fix.smem_len; 294 mmio_pgoff = PAGE_ALIGN((start & ~PAGE_MASK) + len) >> PAGE_SHIFT; 295 if (vma->vm_pgoff >= mmio_pgoff) { 296 if (info->var.accel_flags) 297 return -EINVAL; 298 vma->vm_pgoff -= mmio_pgoff; 299 start = info->fix.mmio_start; 300 len = info->fix.mmio_len; 301 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 302 } else { 303 /* framebuffer */ 304 vma->vm_page_prot = pgprot_cached_wthru(vma->vm_page_prot); 305 } 306 307 return vm_iomap_memory(vma, start, len); 308 } 309 310 static int controlfb_blank(int blank_mode, struct fb_info *info) 311 { 312 struct fb_info_control *p = 313 container_of(info, struct fb_info_control, info); 314 unsigned ctrl; 315 316 ctrl = le32_to_cpup(CNTRL_REG(p,ctrl)); 317 if (blank_mode > 0) 318 switch (blank_mode) { 319 case FB_BLANK_VSYNC_SUSPEND: 320 ctrl &= ~3; 321 break; 322 case FB_BLANK_HSYNC_SUSPEND: 323 ctrl &= ~0x30; 324 break; 325 case FB_BLANK_POWERDOWN: 326 ctrl &= ~0x33; 327 /* fall through */ 328 case FB_BLANK_NORMAL: 329 ctrl |= 0x400; 330 break; 331 default: 332 break; 333 } 334 else { 335 ctrl &= ~0x400; 336 ctrl |= 0x33; 337 } 338 out_le32(CNTRL_REG(p,ctrl), ctrl); 339 340 return 0; 341 } 342 343 static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, 344 u_int transp, struct fb_info *info) 345 { 346 struct fb_info_control *p = 347 container_of(info, struct fb_info_control, info); 348 __u8 r, g, b; 349 350 if (regno > 255) 351 return 1; 352 353 r = red >> 8; 354 g = green >> 8; 355 b = blue >> 8; 356 357 out_8(&p->cmap_regs->addr, regno); /* tell clut what addr to fill */ 358 out_8(&p->cmap_regs->lut, r); /* send one color channel at */ 359 out_8(&p->cmap_regs->lut, g); /* a time... */ 360 out_8(&p->cmap_regs->lut, b); 361 362 if (regno < 16) { 363 int i; 364 switch (p->par.cmode) { 365 case CMODE_16: 366 p->pseudo_palette[regno] = 367 (regno << 10) | (regno << 5) | regno; 368 break; 369 case CMODE_32: 370 i = (regno << 8) | regno; 371 p->pseudo_palette[regno] = (i << 16) | i; 372 break; 373 } 374 } 375 376 return 0; 377 } 378 379 380 /******************** End of controlfb_ops implementation ******************/ 381 382 383 384 static void set_control_clock(unsigned char *params) 385 { 386 #ifdef CONFIG_ADB_CUDA 387 struct adb_request req; 388 int i; 389 390 for (i = 0; i < 3; ++i) { 391 cuda_request(&req, NULL, 5, CUDA_PACKET, CUDA_GET_SET_IIC, 392 0x50, i + 1, params[i]); 393 while (!req.complete) 394 cuda_poll(); 395 } 396 #endif 397 } 398 399 400 /* 401 * finish off the driver initialization and register 402 */ 403 static int __init init_control(struct fb_info_control *p) 404 { 405 int full, sense, vmode, cmode, vyres; 406 struct fb_var_screeninfo var; 407 int rc; 408 409 printk(KERN_INFO "controlfb: "); 410 411 full = p->total_vram == 0x400000; 412 413 /* Try to pick a video mode out of NVRAM if we have one. */ 414 #ifdef CONFIG_NVRAM 415 if (default_cmode == CMODE_NVRAM) { 416 cmode = nvram_read_byte(NV_CMODE); 417 if(cmode < CMODE_8 || cmode > CMODE_32) 418 cmode = CMODE_8; 419 } else 420 #endif 421 cmode=default_cmode; 422 #ifdef CONFIG_NVRAM 423 if (default_vmode == VMODE_NVRAM) { 424 vmode = nvram_read_byte(NV_VMODE); 425 if (vmode < 1 || vmode > VMODE_MAX || 426 control_mac_modes[vmode - 1].m[full] < cmode) { 427 sense = read_control_sense(p); 428 printk("Monitor sense value = 0x%x, ", sense); 429 vmode = mac_map_monitor_sense(sense); 430 if (control_mac_modes[vmode - 1].m[full] < cmode) 431 vmode = VMODE_640_480_60; 432 } 433 } else 434 #endif 435 { 436 vmode=default_vmode; 437 if (control_mac_modes[vmode - 1].m[full] < cmode) { 438 if (cmode > CMODE_8) 439 cmode--; 440 else 441 vmode = VMODE_640_480_60; 442 } 443 } 444 445 /* Initialize info structure */ 446 control_init_info(&p->info, p); 447 448 /* Setup default var */ 449 if (mac_vmode_to_var(vmode, cmode, &var) < 0) { 450 /* This shouldn't happen! */ 451 printk("mac_vmode_to_var(%d, %d,) failed\n", vmode, cmode); 452 try_again: 453 vmode = VMODE_640_480_60; 454 cmode = CMODE_8; 455 if (mac_vmode_to_var(vmode, cmode, &var) < 0) { 456 printk(KERN_ERR "controlfb: mac_vmode_to_var() failed\n"); 457 return -ENXIO; 458 } 459 printk(KERN_INFO "controlfb: "); 460 } 461 printk("using video mode %d and color mode %d.\n", vmode, cmode); 462 463 vyres = (p->total_vram - CTRLFB_OFF) / (var.xres << cmode); 464 if (vyres > var.yres) 465 var.yres_virtual = vyres; 466 467 /* Apply default var */ 468 var.activate = FB_ACTIVATE_NOW; 469 rc = fb_set_var(&p->info, &var); 470 if (rc && (vmode != VMODE_640_480_60 || cmode != CMODE_8)) 471 goto try_again; 472 473 /* Register with fbdev layer */ 474 if (register_framebuffer(&p->info) < 0) 475 return -ENXIO; 476 477 fb_info(&p->info, "control display adapter\n"); 478 479 return 0; 480 } 481 482 #define RADACAL_WRITE(a,d) \ 483 out_8(&p->cmap_regs->addr, (a)); \ 484 out_8(&p->cmap_regs->dat, (d)) 485 486 /* Now how about actually saying, Make it so! */ 487 /* Some things in here probably don't need to be done each time. */ 488 static void control_set_hardware(struct fb_info_control *p, struct fb_par_control *par) 489 { 490 struct control_regvals *r; 491 volatile struct preg __iomem *rp; 492 int i, cmode; 493 494 if (PAR_EQUAL(&p->par, par)) { 495 /* 496 * check if only xoffset or yoffset differs. 497 * this prevents flickers in typical VT switch case. 498 */ 499 if (p->par.xoffset != par->xoffset || 500 p->par.yoffset != par->yoffset) 501 set_screen_start(par->xoffset, par->yoffset, p); 502 503 return; 504 } 505 506 p->par = *par; 507 cmode = p->par.cmode; 508 r = &par->regvals; 509 510 /* Turn off display */ 511 out_le32(CNTRL_REG(p,ctrl), 0x400 | par->ctrl); 512 513 set_control_clock(r->clock_params); 514 515 RADACAL_WRITE(0x20, r->radacal_ctrl); 516 RADACAL_WRITE(0x21, p->control_use_bank2 ? 0 : 1); 517 RADACAL_WRITE(0x10, 0); 518 RADACAL_WRITE(0x11, 0); 519 520 rp = &p->control_regs->vswin; 521 for (i = 0; i < 16; ++i, ++rp) 522 out_le32(&rp->r, r->regs[i]); 523 524 out_le32(CNTRL_REG(p,pitch), par->pitch); 525 out_le32(CNTRL_REG(p,mode), r->mode); 526 out_le32(CNTRL_REG(p,vram_attr), p->vram_attr); 527 out_le32(CNTRL_REG(p,start_addr), par->yoffset * par->pitch 528 + (par->xoffset << cmode)); 529 out_le32(CNTRL_REG(p,rfrcnt), 0x1e5); 530 out_le32(CNTRL_REG(p,intr_ena), 0); 531 532 /* Turn on display */ 533 out_le32(CNTRL_REG(p,ctrl), par->ctrl); 534 535 #ifdef CONFIG_BOOTX_TEXT 536 btext_update_display(p->frame_buffer_phys + CTRLFB_OFF, 537 p->par.xres, p->par.yres, 538 (cmode == CMODE_32? 32: cmode == CMODE_16? 16: 8), 539 p->par.pitch); 540 #endif /* CONFIG_BOOTX_TEXT */ 541 } 542 543 544 /* 545 * Parse user specified options (`video=controlfb:') 546 */ 547 static void __init control_setup(char *options) 548 { 549 char *this_opt; 550 551 if (!options || !*options) 552 return; 553 554 while ((this_opt = strsep(&options, ",")) != NULL) { 555 if (!strncmp(this_opt, "vmode:", 6)) { 556 int vmode = simple_strtoul(this_opt+6, NULL, 0); 557 if (vmode > 0 && vmode <= VMODE_MAX && 558 control_mac_modes[vmode - 1].m[1] >= 0) 559 default_vmode = vmode; 560 } else if (!strncmp(this_opt, "cmode:", 6)) { 561 int depth = simple_strtoul(this_opt+6, NULL, 0); 562 switch (depth) { 563 case CMODE_8: 564 case CMODE_16: 565 case CMODE_32: 566 default_cmode = depth; 567 break; 568 case 8: 569 default_cmode = CMODE_8; 570 break; 571 case 15: 572 case 16: 573 default_cmode = CMODE_16; 574 break; 575 case 24: 576 case 32: 577 default_cmode = CMODE_32; 578 break; 579 } 580 } 581 } 582 } 583 584 static int __init control_init(void) 585 { 586 struct device_node *dp; 587 char *option = NULL; 588 int ret = -ENXIO; 589 590 if (fb_get_options("controlfb", &option)) 591 return -ENODEV; 592 control_setup(option); 593 594 dp = of_find_node_by_name(NULL, "control"); 595 if (dp != 0 && !control_of_init(dp)) 596 ret = 0; 597 of_node_put(dp); 598 599 return ret; 600 } 601 602 module_init(control_init); 603 604 /* Work out which banks of VRAM we have installed. */ 605 /* danj: I guess the card just ignores writes to nonexistant VRAM... */ 606 607 static void __init find_vram_size(struct fb_info_control *p) 608 { 609 int bank1, bank2; 610 611 /* 612 * Set VRAM in 2MB (bank 1) mode 613 * VRAM Bank 2 will be accessible through offset 0x600000 if present 614 * and VRAM Bank 1 will not respond at that offset even if present 615 */ 616 out_le32(CNTRL_REG(p,vram_attr), 0x31); 617 618 out_8(&p->frame_buffer[0x600000], 0xb3); 619 out_8(&p->frame_buffer[0x600001], 0x71); 620 asm volatile("eieio; dcbf 0,%0" : : "r" (&p->frame_buffer[0x600000]) 621 : "memory" ); 622 mb(); 623 asm volatile("eieio; dcbi 0,%0" : : "r" (&p->frame_buffer[0x600000]) 624 : "memory" ); 625 mb(); 626 627 bank2 = (in_8(&p->frame_buffer[0x600000]) == 0xb3) 628 && (in_8(&p->frame_buffer[0x600001]) == 0x71); 629 630 /* 631 * Set VRAM in 2MB (bank 2) mode 632 * VRAM Bank 1 will be accessible through offset 0x000000 if present 633 * and VRAM Bank 2 will not respond at that offset even if present 634 */ 635 out_le32(CNTRL_REG(p,vram_attr), 0x39); 636 637 out_8(&p->frame_buffer[0], 0x5a); 638 out_8(&p->frame_buffer[1], 0xc7); 639 asm volatile("eieio; dcbf 0,%0" : : "r" (&p->frame_buffer[0]) 640 : "memory" ); 641 mb(); 642 asm volatile("eieio; dcbi 0,%0" : : "r" (&p->frame_buffer[0]) 643 : "memory" ); 644 mb(); 645 646 bank1 = (in_8(&p->frame_buffer[0]) == 0x5a) 647 && (in_8(&p->frame_buffer[1]) == 0xc7); 648 649 if (bank2) { 650 if (!bank1) { 651 /* 652 * vram bank 2 only 653 */ 654 p->control_use_bank2 = 1; 655 p->vram_attr = 0x39; 656 p->frame_buffer += 0x600000; 657 p->frame_buffer_phys += 0x600000; 658 } else { 659 /* 660 * 4 MB vram 661 */ 662 p->vram_attr = 0x51; 663 } 664 } else { 665 /* 666 * vram bank 1 only 667 */ 668 p->vram_attr = 0x31; 669 } 670 671 p->total_vram = (bank1 + bank2) * 0x200000; 672 673 printk(KERN_INFO "controlfb: VRAM Total = %dMB " 674 "(%dMB @ bank 1, %dMB @ bank 2)\n", 675 (bank1 + bank2) << 1, bank1 << 1, bank2 << 1); 676 } 677 678 679 /* 680 * find "control" and initialize 681 */ 682 static int __init control_of_init(struct device_node *dp) 683 { 684 struct fb_info_control *p; 685 struct resource fb_res, reg_res; 686 687 if (control_fb) { 688 printk(KERN_ERR "controlfb: only one control is supported\n"); 689 return -ENXIO; 690 } 691 692 if (of_pci_address_to_resource(dp, 2, &fb_res) || 693 of_pci_address_to_resource(dp, 1, ®_res)) { 694 printk(KERN_ERR "can't get 2 addresses for control\n"); 695 return -ENXIO; 696 } 697 p = kzalloc(sizeof(*p), GFP_KERNEL); 698 if (p == 0) 699 return -ENXIO; 700 control_fb = p; /* save it for cleanups */ 701 702 /* Map in frame buffer and registers */ 703 p->fb_orig_base = fb_res.start; 704 p->fb_orig_size = resource_size(&fb_res); 705 /* use the big-endian aperture (??) */ 706 p->frame_buffer_phys = fb_res.start + 0x800000; 707 p->control_regs_phys = reg_res.start; 708 p->control_regs_size = resource_size(®_res); 709 710 if (!p->fb_orig_base || 711 !request_mem_region(p->fb_orig_base,p->fb_orig_size,"controlfb")) { 712 p->fb_orig_base = 0; 713 goto error_out; 714 } 715 /* map at most 8MB for the frame buffer */ 716 p->frame_buffer = ioremap_wt(p->frame_buffer_phys, 0x800000); 717 718 if (!p->control_regs_phys || 719 !request_mem_region(p->control_regs_phys, p->control_regs_size, 720 "controlfb regs")) { 721 p->control_regs_phys = 0; 722 goto error_out; 723 } 724 p->control_regs = ioremap(p->control_regs_phys, p->control_regs_size); 725 726 p->cmap_regs_phys = 0xf301b000; /* XXX not in prom? */ 727 if (!request_mem_region(p->cmap_regs_phys, 0x1000, "controlfb cmap")) { 728 p->cmap_regs_phys = 0; 729 goto error_out; 730 } 731 p->cmap_regs = ioremap(p->cmap_regs_phys, 0x1000); 732 733 if (!p->cmap_regs || !p->control_regs || !p->frame_buffer) 734 goto error_out; 735 736 find_vram_size(p); 737 if (!p->total_vram) 738 goto error_out; 739 740 if (init_control(p) < 0) 741 goto error_out; 742 743 return 0; 744 745 error_out: 746 control_cleanup(); 747 return -ENXIO; 748 } 749 750 /* 751 * Get the monitor sense value. 752 * Note that this can be called before calibrate_delay, 753 * so we can't use udelay. 754 */ 755 static int read_control_sense(struct fb_info_control *p) 756 { 757 int sense; 758 759 out_le32(CNTRL_REG(p,mon_sense), 7); /* drive all lines high */ 760 __delay(200); 761 out_le32(CNTRL_REG(p,mon_sense), 077); /* turn off drivers */ 762 __delay(2000); 763 sense = (in_le32(CNTRL_REG(p,mon_sense)) & 0x1c0) << 2; 764 765 /* drive each sense line low in turn and collect the other 2 */ 766 out_le32(CNTRL_REG(p,mon_sense), 033); /* drive A low */ 767 __delay(2000); 768 sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0xc0) >> 2; 769 out_le32(CNTRL_REG(p,mon_sense), 055); /* drive B low */ 770 __delay(2000); 771 sense |= ((in_le32(CNTRL_REG(p,mon_sense)) & 0x100) >> 5) 772 | ((in_le32(CNTRL_REG(p,mon_sense)) & 0x40) >> 4); 773 out_le32(CNTRL_REG(p,mon_sense), 066); /* drive C low */ 774 __delay(2000); 775 sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0x180) >> 7; 776 777 out_le32(CNTRL_REG(p,mon_sense), 077); /* turn off drivers */ 778 779 return sense; 780 } 781 782 /********************** Various translation functions **********************/ 783 784 #define CONTROL_PIXCLOCK_BASE 256016 785 #define CONTROL_PIXCLOCK_MIN 5000 /* ~ 200 MHz dot clock */ 786 787 /* 788 * calculate the clock paramaters to be sent to CUDA according to given 789 * pixclock in pico second. 790 */ 791 static int calc_clock_params(unsigned long clk, unsigned char *param) 792 { 793 unsigned long p0, p1, p2, k, l, m, n, min; 794 795 if (clk > (CONTROL_PIXCLOCK_BASE << 3)) 796 return 1; 797 798 p2 = ((clk << 4) < CONTROL_PIXCLOCK_BASE)? 3: 2; 799 l = clk << p2; 800 p0 = 0; 801 p1 = 0; 802 for (k = 1, min = l; k < 32; k++) { 803 unsigned long rem; 804 805 m = CONTROL_PIXCLOCK_BASE * k; 806 n = m / l; 807 rem = m % l; 808 if (n && (n < 128) && rem < min) { 809 p0 = k; 810 p1 = n; 811 min = rem; 812 } 813 } 814 if (!p0 || !p1) 815 return 1; 816 817 param[0] = p0; 818 param[1] = p1; 819 param[2] = p2; 820 821 return 0; 822 } 823 824 825 /* 826 * This routine takes a user-supplied var, and picks the best vmode/cmode 827 * from it. 828 */ 829 830 static int control_var_to_par(struct fb_var_screeninfo *var, 831 struct fb_par_control *par, const struct fb_info *fb_info) 832 { 833 int cmode, piped_diff, hstep; 834 unsigned hperiod, hssync, hsblank, hesync, heblank, piped, heq, hlfln, 835 hserr, vperiod, vssync, vesync, veblank, vsblank, vswin, vewin; 836 unsigned long pixclock; 837 struct fb_info_control *p = 838 container_of(fb_info, struct fb_info_control, info); 839 struct control_regvals *r = &par->regvals; 840 841 switch (var->bits_per_pixel) { 842 case 8: 843 par->cmode = CMODE_8; 844 if (p->total_vram > 0x200000) { 845 r->mode = 3; 846 r->radacal_ctrl = 0x20; 847 piped_diff = 13; 848 } else { 849 r->mode = 2; 850 r->radacal_ctrl = 0x10; 851 piped_diff = 9; 852 } 853 break; 854 case 15: 855 case 16: 856 par->cmode = CMODE_16; 857 if (p->total_vram > 0x200000) { 858 r->mode = 2; 859 r->radacal_ctrl = 0x24; 860 piped_diff = 5; 861 } else { 862 r->mode = 1; 863 r->radacal_ctrl = 0x14; 864 piped_diff = 3; 865 } 866 break; 867 case 32: 868 par->cmode = CMODE_32; 869 if (p->total_vram > 0x200000) { 870 r->mode = 1; 871 r->radacal_ctrl = 0x28; 872 } else { 873 r->mode = 0; 874 r->radacal_ctrl = 0x18; 875 } 876 piped_diff = 1; 877 break; 878 default: 879 return -EINVAL; 880 } 881 882 /* 883 * adjust xres and vxres so that the corresponding memory widths are 884 * 32-byte aligned 885 */ 886 hstep = 31 >> par->cmode; 887 par->xres = (var->xres + hstep) & ~hstep; 888 par->vxres = (var->xres_virtual + hstep) & ~hstep; 889 par->xoffset = (var->xoffset + hstep) & ~hstep; 890 if (par->vxres < par->xres) 891 par->vxres = par->xres; 892 par->pitch = par->vxres << par->cmode; 893 894 par->yres = var->yres; 895 par->vyres = var->yres_virtual; 896 par->yoffset = var->yoffset; 897 if (par->vyres < par->yres) 898 par->vyres = par->yres; 899 900 par->sync = var->sync; 901 902 if (par->pitch * par->vyres + CTRLFB_OFF > p->total_vram) 903 return -EINVAL; 904 905 if (par->xoffset + par->xres > par->vxres) 906 par->xoffset = par->vxres - par->xres; 907 if (par->yoffset + par->yres > par->vyres) 908 par->yoffset = par->vyres - par->yres; 909 910 pixclock = (var->pixclock < CONTROL_PIXCLOCK_MIN)? CONTROL_PIXCLOCK_MIN: 911 var->pixclock; 912 if (calc_clock_params(pixclock, r->clock_params)) 913 return -EINVAL; 914 915 hperiod = ((var->left_margin + par->xres + var->right_margin 916 + var->hsync_len) >> 1) - 2; 917 hssync = hperiod + 1; 918 hsblank = hssync - (var->right_margin >> 1); 919 hesync = (var->hsync_len >> 1) - 1; 920 heblank = (var->left_margin >> 1) + hesync; 921 piped = heblank - piped_diff; 922 heq = var->hsync_len >> 2; 923 hlfln = (hperiod+2) >> 1; 924 hserr = hssync-hesync; 925 vperiod = (var->vsync_len + var->lower_margin + par->yres 926 + var->upper_margin) << 1; 927 vssync = vperiod - 2; 928 vesync = (var->vsync_len << 1) - vperiod + vssync; 929 veblank = (var->upper_margin << 1) + vesync; 930 vsblank = vssync - (var->lower_margin << 1); 931 vswin = (vsblank+vssync) >> 1; 932 vewin = (vesync+veblank) >> 1; 933 934 r->regs[0] = vswin; 935 r->regs[1] = vsblank; 936 r->regs[2] = veblank; 937 r->regs[3] = vewin; 938 r->regs[4] = vesync; 939 r->regs[5] = vssync; 940 r->regs[6] = vperiod; 941 r->regs[7] = piped; 942 r->regs[8] = hperiod; 943 r->regs[9] = hsblank; 944 r->regs[10] = heblank; 945 r->regs[11] = hesync; 946 r->regs[12] = hssync; 947 r->regs[13] = heq; 948 r->regs[14] = hlfln; 949 r->regs[15] = hserr; 950 951 if (par->xres >= 1280 && par->cmode >= CMODE_16) 952 par->ctrl = 0x7f; 953 else 954 par->ctrl = 0x3b; 955 956 if (mac_var_to_vmode(var, &par->vmode, &cmode)) 957 par->vmode = 0; 958 959 return 0; 960 } 961 962 963 /* 964 * Convert hardware data in par to an fb_var_screeninfo 965 */ 966 967 static void control_par_to_var(struct fb_par_control *par, struct fb_var_screeninfo *var) 968 { 969 struct control_regints *rv; 970 971 rv = (struct control_regints *) par->regvals.regs; 972 973 memset(var, 0, sizeof(*var)); 974 var->xres = par->xres; 975 var->yres = par->yres; 976 var->xres_virtual = par->vxres; 977 var->yres_virtual = par->vyres; 978 var->xoffset = par->xoffset; 979 var->yoffset = par->yoffset; 980 981 switch(par->cmode) { 982 default: 983 case CMODE_8: 984 var->bits_per_pixel = 8; 985 var->red.length = 8; 986 var->green.length = 8; 987 var->blue.length = 8; 988 break; 989 case CMODE_16: /* RGB 555 */ 990 var->bits_per_pixel = 16; 991 var->red.offset = 10; 992 var->red.length = 5; 993 var->green.offset = 5; 994 var->green.length = 5; 995 var->blue.length = 5; 996 break; 997 case CMODE_32: /* RGB 888 */ 998 var->bits_per_pixel = 32; 999 var->red.offset = 16; 1000 var->red.length = 8; 1001 var->green.offset = 8; 1002 var->green.length = 8; 1003 var->blue.length = 8; 1004 var->transp.offset = 24; 1005 var->transp.length = 8; 1006 break; 1007 } 1008 var->height = -1; 1009 var->width = -1; 1010 var->vmode = FB_VMODE_NONINTERLACED; 1011 1012 var->left_margin = (rv->heblank - rv->hesync) << 1; 1013 var->right_margin = (rv->hssync - rv->hsblank) << 1; 1014 var->hsync_len = (rv->hperiod + 2 - rv->hssync + rv->hesync) << 1; 1015 1016 var->upper_margin = (rv->veblank - rv->vesync) >> 1; 1017 var->lower_margin = (rv->vssync - rv->vsblank) >> 1; 1018 var->vsync_len = (rv->vperiod - rv->vssync + rv->vesync) >> 1; 1019 1020 var->sync = par->sync; 1021 1022 /* 1023 * 10^12 * clock_params[0] / (3906400 * clock_params[1] 1024 * * 2^clock_params[2]) 1025 * (10^12 * clock_params[0] / (3906400 * clock_params[1])) 1026 * >> clock_params[2] 1027 */ 1028 /* (255990.17 * clock_params[0] / clock_params[1]) >> clock_params[2] */ 1029 var->pixclock = CONTROL_PIXCLOCK_BASE * par->regvals.clock_params[0]; 1030 var->pixclock /= par->regvals.clock_params[1]; 1031 var->pixclock >>= par->regvals.clock_params[2]; 1032 } 1033 1034 /* 1035 * Set misc info vars for this driver 1036 */ 1037 static void __init control_init_info(struct fb_info *info, struct fb_info_control *p) 1038 { 1039 /* Fill fb_info */ 1040 info->par = &p->par; 1041 info->fbops = &controlfb_ops; 1042 info->pseudo_palette = p->pseudo_palette; 1043 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; 1044 info->screen_base = p->frame_buffer + CTRLFB_OFF; 1045 1046 fb_alloc_cmap(&info->cmap, 256, 0); 1047 1048 /* Fill fix common fields */ 1049 strcpy(info->fix.id, "control"); 1050 info->fix.mmio_start = p->control_regs_phys; 1051 info->fix.mmio_len = sizeof(struct control_regs); 1052 info->fix.type = FB_TYPE_PACKED_PIXELS; 1053 info->fix.smem_start = p->frame_buffer_phys + CTRLFB_OFF; 1054 info->fix.smem_len = p->total_vram - CTRLFB_OFF; 1055 info->fix.ywrapstep = 0; 1056 info->fix.type_aux = 0; 1057 info->fix.accel = FB_ACCEL_NONE; 1058 } 1059 1060 1061 static void control_cleanup(void) 1062 { 1063 struct fb_info_control *p = control_fb; 1064 1065 if (!p) 1066 return; 1067 1068 if (p->cmap_regs) 1069 iounmap(p->cmap_regs); 1070 if (p->control_regs) 1071 iounmap(p->control_regs); 1072 if (p->frame_buffer) { 1073 if (p->control_use_bank2) 1074 p->frame_buffer -= 0x600000; 1075 iounmap(p->frame_buffer); 1076 } 1077 if (p->cmap_regs_phys) 1078 release_mem_region(p->cmap_regs_phys, 0x1000); 1079 if (p->control_regs_phys) 1080 release_mem_region(p->control_regs_phys, p->control_regs_size); 1081 if (p->fb_orig_base) 1082 release_mem_region(p->fb_orig_base, p->fb_orig_size); 1083 kfree(p); 1084 } 1085 1086 1087