1 /* 2 * controlfb.c -- frame buffer device for the PowerMac 'control' display 3 * 4 * Created 12 July 1998 by Dan Jacobowitz <dan@debian.org> 5 * Copyright (C) 1998 Dan Jacobowitz 6 * Copyright (C) 2001 Takashi Oe 7 * 8 * Mmap code by Michel Lanners <mlan@cpu.lu> 9 * 10 * Frame buffer structure from: 11 * drivers/video/chipsfb.c -- frame buffer device for 12 * Chips & Technologies 65550 chip. 13 * 14 * Copyright (C) 1998 Paul Mackerras 15 * 16 * This file is derived from the Powermac "chips" driver: 17 * Copyright (C) 1997 Fabio Riccardi. 18 * And from the frame buffer device for Open Firmware-initialized devices: 19 * Copyright (C) 1997 Geert Uytterhoeven. 20 * 21 * Hardware information from: 22 * control.c: Console support for PowerMac "control" display adaptor. 23 * Copyright (C) 1996 Paul Mackerras 24 * 25 * Updated to 2.5 framebuffer API by Ben Herrenschmidt 26 * <benh@kernel.crashing.org>, Paul Mackerras <paulus@samba.org>, 27 * and James Simmons <jsimmons@infradead.org>. 28 * 29 * This file is subject to the terms and conditions of the GNU General Public 30 * License. See the file COPYING in the main directory of this archive for 31 * more details. 32 */ 33 34 #include <linux/kernel.h> 35 #include <linux/errno.h> 36 #include <linux/string.h> 37 #include <linux/mm.h> 38 #include <linux/slab.h> 39 #include <linux/vmalloc.h> 40 #include <linux/delay.h> 41 #include <linux/interrupt.h> 42 #include <linux/of.h> 43 #include <linux/of_address.h> 44 #include <linux/fb.h> 45 #include <linux/init.h> 46 #include <linux/pci.h> 47 #include <linux/nvram.h> 48 #include <linux/adb.h> 49 #include <linux/cuda.h> 50 #ifdef CONFIG_BOOTX_TEXT 51 #include <asm/btext.h> 52 #endif 53 54 #include "macmodes.h" 55 #include "controlfb.h" 56 57 #if !defined(CONFIG_PPC_PMAC) || !defined(CONFIG_PPC32) 58 #define invalid_vram_cache(addr) 59 #undef in_8 60 #undef out_8 61 #undef in_le32 62 #undef out_le32 63 #define in_8(addr) 0 64 #define out_8(addr, val) (void)(val) 65 #define in_le32(addr) 0 66 #define out_le32(addr, val) (void)(val) 67 #ifndef pgprot_cached_wthru 68 #define pgprot_cached_wthru(prot) (prot) 69 #endif 70 #else 71 static void invalid_vram_cache(void __force *addr) 72 { 73 eieio(); 74 dcbf(addr); 75 mb(); 76 eieio(); 77 dcbf(addr); 78 mb(); 79 } 80 #endif 81 82 struct fb_par_control { 83 int vmode, cmode; 84 int xres, yres; 85 int vxres, vyres; 86 int xoffset, yoffset; 87 int pitch; 88 struct control_regvals regvals; 89 unsigned long sync; 90 unsigned char ctrl; 91 }; 92 93 #define DIRTY(z) ((x)->z != (y)->z) 94 #define DIRTY_CMAP(z) (memcmp(&((x)->z), &((y)->z), sizeof((y)->z))) 95 static inline int PAR_EQUAL(struct fb_par_control *x, struct fb_par_control *y) 96 { 97 int i, results; 98 99 results = 1; 100 for (i = 0; i < 3; i++) 101 results &= !DIRTY(regvals.clock_params[i]); 102 if (!results) 103 return 0; 104 for (i = 0; i < 16; i++) 105 results &= !DIRTY(regvals.regs[i]); 106 if (!results) 107 return 0; 108 return (!DIRTY(cmode) && !DIRTY(xres) && !DIRTY(yres) 109 && !DIRTY(vxres) && !DIRTY(vyres)); 110 } 111 static inline int VAR_MATCH(struct fb_var_screeninfo *x, struct fb_var_screeninfo *y) 112 { 113 return (!DIRTY(bits_per_pixel) && !DIRTY(xres) 114 && !DIRTY(yres) && !DIRTY(xres_virtual) 115 && !DIRTY(yres_virtual) 116 && !DIRTY_CMAP(red) && !DIRTY_CMAP(green) && !DIRTY_CMAP(blue)); 117 } 118 119 struct fb_info_control { 120 struct fb_info info; 121 struct fb_par_control par; 122 u32 pseudo_palette[16]; 123 124 struct cmap_regs __iomem *cmap_regs; 125 unsigned long cmap_regs_phys; 126 127 struct control_regs __iomem *control_regs; 128 unsigned long control_regs_phys; 129 unsigned long control_regs_size; 130 131 __u8 __iomem *frame_buffer; 132 unsigned long frame_buffer_phys; 133 unsigned long fb_orig_base; 134 unsigned long fb_orig_size; 135 136 int control_use_bank2; 137 unsigned long total_vram; 138 unsigned char vram_attr; 139 }; 140 141 /* control register access macro */ 142 #define CNTRL_REG(INFO,REG) (&(((INFO)->control_regs->REG).r)) 143 144 145 /************************** Internal variables *******************************/ 146 147 static struct fb_info_control *control_fb; 148 149 static int default_vmode __initdata = VMODE_NVRAM; 150 static int default_cmode __initdata = CMODE_NVRAM; 151 152 153 static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, 154 u_int transp, struct fb_info *info) 155 { 156 struct fb_info_control *p = 157 container_of(info, struct fb_info_control, info); 158 __u8 r, g, b; 159 160 if (regno > 255) 161 return 1; 162 163 r = red >> 8; 164 g = green >> 8; 165 b = blue >> 8; 166 167 out_8(&p->cmap_regs->addr, regno); /* tell clut what addr to fill */ 168 out_8(&p->cmap_regs->lut, r); /* send one color channel at */ 169 out_8(&p->cmap_regs->lut, g); /* a time... */ 170 out_8(&p->cmap_regs->lut, b); 171 172 if (regno < 16) { 173 int i; 174 switch (p->par.cmode) { 175 case CMODE_16: 176 p->pseudo_palette[regno] = 177 (regno << 10) | (regno << 5) | regno; 178 break; 179 case CMODE_32: 180 i = (regno << 8) | regno; 181 p->pseudo_palette[regno] = (i << 16) | i; 182 break; 183 } 184 } 185 186 return 0; 187 } 188 189 190 /******************** End of controlfb_ops implementation ******************/ 191 192 193 194 static void set_control_clock(unsigned char *params) 195 { 196 #ifdef CONFIG_ADB_CUDA 197 struct adb_request req; 198 int i; 199 200 for (i = 0; i < 3; ++i) { 201 cuda_request(&req, NULL, 5, CUDA_PACKET, CUDA_GET_SET_IIC, 202 0x50, i + 1, params[i]); 203 while (!req.complete) 204 cuda_poll(); 205 } 206 #endif 207 } 208 209 /* 210 * Set screen start address according to var offset values 211 */ 212 static inline void set_screen_start(int xoffset, int yoffset, 213 struct fb_info_control *p) 214 { 215 struct fb_par_control *par = &p->par; 216 217 par->xoffset = xoffset; 218 par->yoffset = yoffset; 219 out_le32(CNTRL_REG(p,start_addr), 220 par->yoffset * par->pitch + (par->xoffset << par->cmode)); 221 } 222 223 #define RADACAL_WRITE(a,d) \ 224 out_8(&p->cmap_regs->addr, (a)); \ 225 out_8(&p->cmap_regs->dat, (d)) 226 227 /* Now how about actually saying, Make it so! */ 228 /* Some things in here probably don't need to be done each time. */ 229 static void control_set_hardware(struct fb_info_control *p, struct fb_par_control *par) 230 { 231 struct control_regvals *r; 232 volatile struct preg __iomem *rp; 233 int i, cmode; 234 235 if (PAR_EQUAL(&p->par, par)) { 236 /* 237 * check if only xoffset or yoffset differs. 238 * this prevents flickers in typical VT switch case. 239 */ 240 if (p->par.xoffset != par->xoffset || 241 p->par.yoffset != par->yoffset) 242 set_screen_start(par->xoffset, par->yoffset, p); 243 244 return; 245 } 246 247 p->par = *par; 248 cmode = p->par.cmode; 249 r = &par->regvals; 250 251 /* Turn off display */ 252 out_le32(CNTRL_REG(p,ctrl), 0x400 | par->ctrl); 253 254 set_control_clock(r->clock_params); 255 256 RADACAL_WRITE(0x20, r->radacal_ctrl); 257 RADACAL_WRITE(0x21, p->control_use_bank2 ? 0 : 1); 258 RADACAL_WRITE(0x10, 0); 259 RADACAL_WRITE(0x11, 0); 260 261 rp = &p->control_regs->vswin; 262 for (i = 0; i < 16; ++i, ++rp) 263 out_le32(&rp->r, r->regs[i]); 264 265 out_le32(CNTRL_REG(p,pitch), par->pitch); 266 out_le32(CNTRL_REG(p,mode), r->mode); 267 out_le32(CNTRL_REG(p,vram_attr), p->vram_attr); 268 out_le32(CNTRL_REG(p,start_addr), par->yoffset * par->pitch 269 + (par->xoffset << cmode)); 270 out_le32(CNTRL_REG(p,rfrcnt), 0x1e5); 271 out_le32(CNTRL_REG(p,intr_ena), 0); 272 273 /* Turn on display */ 274 out_le32(CNTRL_REG(p,ctrl), par->ctrl); 275 276 #ifdef CONFIG_BOOTX_TEXT 277 btext_update_display(p->frame_buffer_phys + CTRLFB_OFF, 278 p->par.xres, p->par.yres, 279 (cmode == CMODE_32? 32: cmode == CMODE_16? 16: 8), 280 p->par.pitch); 281 #endif /* CONFIG_BOOTX_TEXT */ 282 } 283 284 /* Work out which banks of VRAM we have installed. */ 285 /* danj: I guess the card just ignores writes to nonexistant VRAM... */ 286 287 static void __init find_vram_size(struct fb_info_control *p) 288 { 289 int bank1, bank2; 290 291 /* 292 * Set VRAM in 2MB (bank 1) mode 293 * VRAM Bank 2 will be accessible through offset 0x600000 if present 294 * and VRAM Bank 1 will not respond at that offset even if present 295 */ 296 out_le32(CNTRL_REG(p,vram_attr), 0x31); 297 298 out_8(&p->frame_buffer[0x600000], 0xb3); 299 out_8(&p->frame_buffer[0x600001], 0x71); 300 invalid_vram_cache(&p->frame_buffer[0x600000]); 301 302 bank2 = (in_8(&p->frame_buffer[0x600000]) == 0xb3) 303 && (in_8(&p->frame_buffer[0x600001]) == 0x71); 304 305 /* 306 * Set VRAM in 2MB (bank 2) mode 307 * VRAM Bank 1 will be accessible through offset 0x000000 if present 308 * and VRAM Bank 2 will not respond at that offset even if present 309 */ 310 out_le32(CNTRL_REG(p,vram_attr), 0x39); 311 312 out_8(&p->frame_buffer[0], 0x5a); 313 out_8(&p->frame_buffer[1], 0xc7); 314 invalid_vram_cache(&p->frame_buffer[0]); 315 316 bank1 = (in_8(&p->frame_buffer[0]) == 0x5a) 317 && (in_8(&p->frame_buffer[1]) == 0xc7); 318 319 if (bank2) { 320 if (!bank1) { 321 /* 322 * vram bank 2 only 323 */ 324 p->control_use_bank2 = 1; 325 p->vram_attr = 0x39; 326 p->frame_buffer += 0x600000; 327 p->frame_buffer_phys += 0x600000; 328 } else { 329 /* 330 * 4 MB vram 331 */ 332 p->vram_attr = 0x51; 333 } 334 } else { 335 /* 336 * vram bank 1 only 337 */ 338 p->vram_attr = 0x31; 339 } 340 341 p->total_vram = (bank1 + bank2) * 0x200000; 342 343 printk(KERN_INFO "controlfb: VRAM Total = %dMB " 344 "(%dMB @ bank 1, %dMB @ bank 2)\n", 345 (bank1 + bank2) << 1, bank1 << 1, bank2 << 1); 346 } 347 348 /* 349 * Get the monitor sense value. 350 * Note that this can be called before calibrate_delay, 351 * so we can't use udelay. 352 */ 353 static int read_control_sense(struct fb_info_control *p) 354 { 355 int sense; 356 357 out_le32(CNTRL_REG(p,mon_sense), 7); /* drive all lines high */ 358 __delay(200); 359 out_le32(CNTRL_REG(p,mon_sense), 077); /* turn off drivers */ 360 __delay(2000); 361 sense = (in_le32(CNTRL_REG(p,mon_sense)) & 0x1c0) << 2; 362 363 /* drive each sense line low in turn and collect the other 2 */ 364 out_le32(CNTRL_REG(p,mon_sense), 033); /* drive A low */ 365 __delay(2000); 366 sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0xc0) >> 2; 367 out_le32(CNTRL_REG(p,mon_sense), 055); /* drive B low */ 368 __delay(2000); 369 sense |= ((in_le32(CNTRL_REG(p,mon_sense)) & 0x100) >> 5) 370 | ((in_le32(CNTRL_REG(p,mon_sense)) & 0x40) >> 4); 371 out_le32(CNTRL_REG(p,mon_sense), 066); /* drive C low */ 372 __delay(2000); 373 sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0x180) >> 7; 374 375 out_le32(CNTRL_REG(p,mon_sense), 077); /* turn off drivers */ 376 377 return sense; 378 } 379 380 /********************** Various translation functions **********************/ 381 382 #define CONTROL_PIXCLOCK_BASE 256016 383 #define CONTROL_PIXCLOCK_MIN 5000 /* ~ 200 MHz dot clock */ 384 385 /* 386 * calculate the clock paramaters to be sent to CUDA according to given 387 * pixclock in pico second. 388 */ 389 static int calc_clock_params(unsigned long clk, unsigned char *param) 390 { 391 unsigned long p0, p1, p2, k, l, m, n, min; 392 393 if (clk > (CONTROL_PIXCLOCK_BASE << 3)) 394 return 1; 395 396 p2 = ((clk << 4) < CONTROL_PIXCLOCK_BASE)? 3: 2; 397 l = clk << p2; 398 p0 = 0; 399 p1 = 0; 400 for (k = 1, min = l; k < 32; k++) { 401 unsigned long rem; 402 403 m = CONTROL_PIXCLOCK_BASE * k; 404 n = m / l; 405 rem = m % l; 406 if (n && (n < 128) && rem < min) { 407 p0 = k; 408 p1 = n; 409 min = rem; 410 } 411 } 412 if (!p0 || !p1) 413 return 1; 414 415 param[0] = p0; 416 param[1] = p1; 417 param[2] = p2; 418 419 return 0; 420 } 421 422 423 /* 424 * This routine takes a user-supplied var, and picks the best vmode/cmode 425 * from it. 426 */ 427 428 static int control_var_to_par(struct fb_var_screeninfo *var, 429 struct fb_par_control *par, const struct fb_info *fb_info) 430 { 431 int cmode, piped_diff, hstep; 432 unsigned hperiod, hssync, hsblank, hesync, heblank, piped, heq, hlfln, 433 hserr, vperiod, vssync, vesync, veblank, vsblank, vswin, vewin; 434 unsigned long pixclock; 435 struct fb_info_control *p = 436 container_of(fb_info, struct fb_info_control, info); 437 struct control_regvals *r = &par->regvals; 438 439 switch (var->bits_per_pixel) { 440 case 8: 441 par->cmode = CMODE_8; 442 if (p->total_vram > 0x200000) { 443 r->mode = 3; 444 r->radacal_ctrl = 0x20; 445 piped_diff = 13; 446 } else { 447 r->mode = 2; 448 r->radacal_ctrl = 0x10; 449 piped_diff = 9; 450 } 451 break; 452 case 15: 453 case 16: 454 par->cmode = CMODE_16; 455 if (p->total_vram > 0x200000) { 456 r->mode = 2; 457 r->radacal_ctrl = 0x24; 458 piped_diff = 5; 459 } else { 460 r->mode = 1; 461 r->radacal_ctrl = 0x14; 462 piped_diff = 3; 463 } 464 break; 465 case 32: 466 par->cmode = CMODE_32; 467 if (p->total_vram > 0x200000) { 468 r->mode = 1; 469 r->radacal_ctrl = 0x28; 470 } else { 471 r->mode = 0; 472 r->radacal_ctrl = 0x18; 473 } 474 piped_diff = 1; 475 break; 476 default: 477 return -EINVAL; 478 } 479 480 /* 481 * adjust xres and vxres so that the corresponding memory widths are 482 * 32-byte aligned 483 */ 484 hstep = 31 >> par->cmode; 485 par->xres = (var->xres + hstep) & ~hstep; 486 par->vxres = (var->xres_virtual + hstep) & ~hstep; 487 par->xoffset = (var->xoffset + hstep) & ~hstep; 488 if (par->vxres < par->xres) 489 par->vxres = par->xres; 490 par->pitch = par->vxres << par->cmode; 491 492 par->yres = var->yres; 493 par->vyres = var->yres_virtual; 494 par->yoffset = var->yoffset; 495 if (par->vyres < par->yres) 496 par->vyres = par->yres; 497 498 par->sync = var->sync; 499 500 if (par->pitch * par->vyres + CTRLFB_OFF > p->total_vram) 501 return -EINVAL; 502 503 if (par->xoffset + par->xres > par->vxres) 504 par->xoffset = par->vxres - par->xres; 505 if (par->yoffset + par->yres > par->vyres) 506 par->yoffset = par->vyres - par->yres; 507 508 pixclock = (var->pixclock < CONTROL_PIXCLOCK_MIN)? CONTROL_PIXCLOCK_MIN: 509 var->pixclock; 510 if (calc_clock_params(pixclock, r->clock_params)) 511 return -EINVAL; 512 513 hperiod = ((var->left_margin + par->xres + var->right_margin 514 + var->hsync_len) >> 1) - 2; 515 hssync = hperiod + 1; 516 hsblank = hssync - (var->right_margin >> 1); 517 hesync = (var->hsync_len >> 1) - 1; 518 heblank = (var->left_margin >> 1) + hesync; 519 piped = heblank - piped_diff; 520 heq = var->hsync_len >> 2; 521 hlfln = (hperiod+2) >> 1; 522 hserr = hssync-hesync; 523 vperiod = (var->vsync_len + var->lower_margin + par->yres 524 + var->upper_margin) << 1; 525 vssync = vperiod - 2; 526 vesync = (var->vsync_len << 1) - vperiod + vssync; 527 veblank = (var->upper_margin << 1) + vesync; 528 vsblank = vssync - (var->lower_margin << 1); 529 vswin = (vsblank+vssync) >> 1; 530 vewin = (vesync+veblank) >> 1; 531 532 r->regs[0] = vswin; 533 r->regs[1] = vsblank; 534 r->regs[2] = veblank; 535 r->regs[3] = vewin; 536 r->regs[4] = vesync; 537 r->regs[5] = vssync; 538 r->regs[6] = vperiod; 539 r->regs[7] = piped; 540 r->regs[8] = hperiod; 541 r->regs[9] = hsblank; 542 r->regs[10] = heblank; 543 r->regs[11] = hesync; 544 r->regs[12] = hssync; 545 r->regs[13] = heq; 546 r->regs[14] = hlfln; 547 r->regs[15] = hserr; 548 549 if (par->xres >= 1280 && par->cmode >= CMODE_16) 550 par->ctrl = 0x7f; 551 else 552 par->ctrl = 0x3b; 553 554 if (mac_var_to_vmode(var, &par->vmode, &cmode)) 555 par->vmode = 0; 556 557 return 0; 558 } 559 560 561 /* 562 * Convert hardware data in par to an fb_var_screeninfo 563 */ 564 565 static void control_par_to_var(struct fb_par_control *par, struct fb_var_screeninfo *var) 566 { 567 struct control_regints *rv; 568 569 rv = (struct control_regints *) par->regvals.regs; 570 571 memset(var, 0, sizeof(*var)); 572 var->xres = par->xres; 573 var->yres = par->yres; 574 var->xres_virtual = par->vxres; 575 var->yres_virtual = par->vyres; 576 var->xoffset = par->xoffset; 577 var->yoffset = par->yoffset; 578 579 switch(par->cmode) { 580 default: 581 case CMODE_8: 582 var->bits_per_pixel = 8; 583 var->red.length = 8; 584 var->green.length = 8; 585 var->blue.length = 8; 586 break; 587 case CMODE_16: /* RGB 555 */ 588 var->bits_per_pixel = 16; 589 var->red.offset = 10; 590 var->red.length = 5; 591 var->green.offset = 5; 592 var->green.length = 5; 593 var->blue.length = 5; 594 break; 595 case CMODE_32: /* RGB 888 */ 596 var->bits_per_pixel = 32; 597 var->red.offset = 16; 598 var->red.length = 8; 599 var->green.offset = 8; 600 var->green.length = 8; 601 var->blue.length = 8; 602 var->transp.offset = 24; 603 var->transp.length = 8; 604 break; 605 } 606 var->height = -1; 607 var->width = -1; 608 var->vmode = FB_VMODE_NONINTERLACED; 609 610 var->left_margin = (rv->heblank - rv->hesync) << 1; 611 var->right_margin = (rv->hssync - rv->hsblank) << 1; 612 var->hsync_len = (rv->hperiod + 2 - rv->hssync + rv->hesync) << 1; 613 614 var->upper_margin = (rv->veblank - rv->vesync) >> 1; 615 var->lower_margin = (rv->vssync - rv->vsblank) >> 1; 616 var->vsync_len = (rv->vperiod - rv->vssync + rv->vesync) >> 1; 617 618 var->sync = par->sync; 619 620 /* 621 * 10^12 * clock_params[0] / (3906400 * clock_params[1] 622 * * 2^clock_params[2]) 623 * (10^12 * clock_params[0] / (3906400 * clock_params[1])) 624 * >> clock_params[2] 625 */ 626 /* (255990.17 * clock_params[0] / clock_params[1]) >> clock_params[2] */ 627 var->pixclock = CONTROL_PIXCLOCK_BASE * par->regvals.clock_params[0]; 628 var->pixclock /= par->regvals.clock_params[1]; 629 var->pixclock >>= par->regvals.clock_params[2]; 630 } 631 632 /******************** The functions for controlfb_ops ********************/ 633 634 /* 635 * Checks a var structure 636 */ 637 static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info) 638 { 639 struct fb_par_control par; 640 int err; 641 642 err = control_var_to_par(var, &par, info); 643 if (err) 644 return err; 645 control_par_to_var(&par, var); 646 647 return 0; 648 } 649 650 /* 651 * Applies current var to display 652 */ 653 static int controlfb_set_par (struct fb_info *info) 654 { 655 struct fb_info_control *p = 656 container_of(info, struct fb_info_control, info); 657 struct fb_par_control par; 658 int err; 659 660 if((err = control_var_to_par(&info->var, &par, info))) { 661 printk (KERN_ERR "controlfb_set_par: error calling" 662 " control_var_to_par: %d.\n", err); 663 return err; 664 } 665 666 control_set_hardware(p, &par); 667 668 info->fix.visual = (p->par.cmode == CMODE_8) ? 669 FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR; 670 info->fix.line_length = p->par.pitch; 671 info->fix.xpanstep = 32 >> p->par.cmode; 672 info->fix.ypanstep = 1; 673 674 return 0; 675 } 676 677 static int controlfb_pan_display(struct fb_var_screeninfo *var, 678 struct fb_info *info) 679 { 680 unsigned int xoffset, hstep; 681 struct fb_info_control *p = 682 container_of(info, struct fb_info_control, info); 683 struct fb_par_control *par = &p->par; 684 685 /* 686 * make sure start addr will be 32-byte aligned 687 */ 688 hstep = 0x1f >> par->cmode; 689 xoffset = (var->xoffset + hstep) & ~hstep; 690 691 if (xoffset+par->xres > par->vxres || 692 var->yoffset+par->yres > par->vyres) 693 return -EINVAL; 694 695 set_screen_start(xoffset, var->yoffset, p); 696 697 return 0; 698 } 699 700 static int controlfb_blank(int blank_mode, struct fb_info *info) 701 { 702 struct fb_info_control __maybe_unused *p = 703 container_of(info, struct fb_info_control, info); 704 unsigned ctrl; 705 706 ctrl = in_le32(CNTRL_REG(p, ctrl)); 707 if (blank_mode > 0) 708 switch (blank_mode) { 709 case FB_BLANK_VSYNC_SUSPEND: 710 ctrl &= ~3; 711 break; 712 case FB_BLANK_HSYNC_SUSPEND: 713 ctrl &= ~0x30; 714 break; 715 case FB_BLANK_POWERDOWN: 716 ctrl &= ~0x33; 717 fallthrough; 718 case FB_BLANK_NORMAL: 719 ctrl |= 0x400; 720 break; 721 default: 722 break; 723 } 724 else { 725 ctrl &= ~0x400; 726 ctrl |= 0x33; 727 } 728 out_le32(CNTRL_REG(p,ctrl), ctrl); 729 730 return 0; 731 } 732 733 /* 734 * Private mmap since we want to have a different caching on the framebuffer 735 * for controlfb. 736 * Note there's no locking in here; it's done in fb_mmap() in fbmem.c. 737 */ 738 static int controlfb_mmap(struct fb_info *info, 739 struct vm_area_struct *vma) 740 { 741 unsigned long mmio_pgoff; 742 unsigned long start; 743 u32 len; 744 745 start = info->fix.smem_start; 746 len = info->fix.smem_len; 747 mmio_pgoff = PAGE_ALIGN((start & ~PAGE_MASK) + len) >> PAGE_SHIFT; 748 if (vma->vm_pgoff >= mmio_pgoff) { 749 if (info->var.accel_flags) 750 return -EINVAL; 751 vma->vm_pgoff -= mmio_pgoff; 752 start = info->fix.mmio_start; 753 len = info->fix.mmio_len; 754 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 755 } else { 756 /* framebuffer */ 757 vma->vm_page_prot = pgprot_cached_wthru(vma->vm_page_prot); 758 } 759 760 return vm_iomap_memory(vma, start, len); 761 } 762 763 static const struct fb_ops controlfb_ops = { 764 .owner = THIS_MODULE, 765 .fb_check_var = controlfb_check_var, 766 .fb_set_par = controlfb_set_par, 767 .fb_setcolreg = controlfb_setcolreg, 768 .fb_pan_display = controlfb_pan_display, 769 .fb_blank = controlfb_blank, 770 .fb_mmap = controlfb_mmap, 771 .fb_fillrect = cfb_fillrect, 772 .fb_copyarea = cfb_copyarea, 773 .fb_imageblit = cfb_imageblit, 774 }; 775 776 /* 777 * Set misc info vars for this driver 778 */ 779 static void __init control_init_info(struct fb_info *info, struct fb_info_control *p) 780 { 781 /* Fill fb_info */ 782 info->par = &p->par; 783 info->fbops = &controlfb_ops; 784 info->pseudo_palette = p->pseudo_palette; 785 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; 786 info->screen_base = p->frame_buffer + CTRLFB_OFF; 787 788 fb_alloc_cmap(&info->cmap, 256, 0); 789 790 /* Fill fix common fields */ 791 strcpy(info->fix.id, "control"); 792 info->fix.mmio_start = p->control_regs_phys; 793 info->fix.mmio_len = sizeof(struct control_regs); 794 info->fix.type = FB_TYPE_PACKED_PIXELS; 795 info->fix.smem_start = p->frame_buffer_phys + CTRLFB_OFF; 796 info->fix.smem_len = p->total_vram - CTRLFB_OFF; 797 info->fix.ywrapstep = 0; 798 info->fix.type_aux = 0; 799 info->fix.accel = FB_ACCEL_NONE; 800 } 801 802 /* 803 * Parse user specified options (`video=controlfb:') 804 */ 805 static void __init control_setup(char *options) 806 { 807 char *this_opt; 808 809 if (!options || !*options) 810 return; 811 812 while ((this_opt = strsep(&options, ",")) != NULL) { 813 if (!strncmp(this_opt, "vmode:", 6)) { 814 int vmode = simple_strtoul(this_opt+6, NULL, 0); 815 if (vmode > 0 && vmode <= VMODE_MAX && 816 control_mac_modes[vmode - 1].m[1] >= 0) 817 default_vmode = vmode; 818 } else if (!strncmp(this_opt, "cmode:", 6)) { 819 int depth = simple_strtoul(this_opt+6, NULL, 0); 820 switch (depth) { 821 case CMODE_8: 822 case CMODE_16: 823 case CMODE_32: 824 default_cmode = depth; 825 break; 826 case 8: 827 default_cmode = CMODE_8; 828 break; 829 case 15: 830 case 16: 831 default_cmode = CMODE_16; 832 break; 833 case 24: 834 case 32: 835 default_cmode = CMODE_32; 836 break; 837 } 838 } 839 } 840 } 841 842 /* 843 * finish off the driver initialization and register 844 */ 845 static int __init init_control(struct fb_info_control *p) 846 { 847 int full, sense, vmode, cmode, vyres; 848 struct fb_var_screeninfo var; 849 int rc; 850 851 printk(KERN_INFO "controlfb: "); 852 853 full = p->total_vram == 0x400000; 854 855 /* Try to pick a video mode out of NVRAM if we have one. */ 856 cmode = default_cmode; 857 if (IS_REACHABLE(CONFIG_NVRAM) && cmode == CMODE_NVRAM) 858 cmode = nvram_read_byte(NV_CMODE); 859 if (cmode < CMODE_8 || cmode > CMODE_32) 860 cmode = CMODE_8; 861 862 vmode = default_vmode; 863 if (IS_REACHABLE(CONFIG_NVRAM) && vmode == VMODE_NVRAM) 864 vmode = nvram_read_byte(NV_VMODE); 865 if (vmode < 1 || vmode > VMODE_MAX || 866 control_mac_modes[vmode - 1].m[full] < cmode) { 867 sense = read_control_sense(p); 868 printk(KERN_CONT "Monitor sense value = 0x%x, ", sense); 869 vmode = mac_map_monitor_sense(sense); 870 if (control_mac_modes[vmode - 1].m[full] < 0) 871 vmode = VMODE_640_480_60; 872 cmode = min(cmode, control_mac_modes[vmode - 1].m[full]); 873 } 874 875 /* Initialize info structure */ 876 control_init_info(&p->info, p); 877 878 /* Setup default var */ 879 if (mac_vmode_to_var(vmode, cmode, &var) < 0) { 880 /* This shouldn't happen! */ 881 printk("mac_vmode_to_var(%d, %d,) failed\n", vmode, cmode); 882 try_again: 883 vmode = VMODE_640_480_60; 884 cmode = CMODE_8; 885 if (mac_vmode_to_var(vmode, cmode, &var) < 0) { 886 printk(KERN_ERR "controlfb: mac_vmode_to_var() failed\n"); 887 return -ENXIO; 888 } 889 printk(KERN_INFO "controlfb: "); 890 } 891 printk("using video mode %d and color mode %d.\n", vmode, cmode); 892 893 vyres = (p->total_vram - CTRLFB_OFF) / (var.xres << cmode); 894 if (vyres > var.yres) 895 var.yres_virtual = vyres; 896 897 /* Apply default var */ 898 var.activate = FB_ACTIVATE_NOW; 899 rc = fb_set_var(&p->info, &var); 900 if (rc && (vmode != VMODE_640_480_60 || cmode != CMODE_8)) 901 goto try_again; 902 903 /* Register with fbdev layer */ 904 if (register_framebuffer(&p->info) < 0) 905 return -ENXIO; 906 907 fb_info(&p->info, "control display adapter\n"); 908 909 return 0; 910 } 911 912 static void control_cleanup(void) 913 { 914 struct fb_info_control *p = control_fb; 915 916 if (!p) 917 return; 918 919 if (p->cmap_regs) 920 iounmap(p->cmap_regs); 921 if (p->control_regs) 922 iounmap(p->control_regs); 923 if (p->frame_buffer) { 924 if (p->control_use_bank2) 925 p->frame_buffer -= 0x600000; 926 iounmap(p->frame_buffer); 927 } 928 if (p->cmap_regs_phys) 929 release_mem_region(p->cmap_regs_phys, 0x1000); 930 if (p->control_regs_phys) 931 release_mem_region(p->control_regs_phys, p->control_regs_size); 932 if (p->fb_orig_base) 933 release_mem_region(p->fb_orig_base, p->fb_orig_size); 934 kfree(p); 935 } 936 937 /* 938 * find "control" and initialize 939 */ 940 static int __init control_of_init(struct device_node *dp) 941 { 942 struct fb_info_control *p; 943 struct resource fb_res, reg_res; 944 945 if (control_fb) { 946 printk(KERN_ERR "controlfb: only one control is supported\n"); 947 return -ENXIO; 948 } 949 950 if (of_pci_address_to_resource(dp, 2, &fb_res) || 951 of_pci_address_to_resource(dp, 1, ®_res)) { 952 printk(KERN_ERR "can't get 2 addresses for control\n"); 953 return -ENXIO; 954 } 955 p = kzalloc(sizeof(*p), GFP_KERNEL); 956 if (!p) 957 return -ENOMEM; 958 control_fb = p; /* save it for cleanups */ 959 960 /* Map in frame buffer and registers */ 961 p->fb_orig_base = fb_res.start; 962 p->fb_orig_size = resource_size(&fb_res); 963 /* use the big-endian aperture (??) */ 964 p->frame_buffer_phys = fb_res.start + 0x800000; 965 p->control_regs_phys = reg_res.start; 966 p->control_regs_size = resource_size(®_res); 967 968 if (!p->fb_orig_base || 969 !request_mem_region(p->fb_orig_base,p->fb_orig_size,"controlfb")) { 970 p->fb_orig_base = 0; 971 goto error_out; 972 } 973 /* map at most 8MB for the frame buffer */ 974 p->frame_buffer = ioremap_wt(p->frame_buffer_phys, 0x800000); 975 976 if (!p->control_regs_phys || 977 !request_mem_region(p->control_regs_phys, p->control_regs_size, 978 "controlfb regs")) { 979 p->control_regs_phys = 0; 980 goto error_out; 981 } 982 p->control_regs = ioremap(p->control_regs_phys, p->control_regs_size); 983 984 p->cmap_regs_phys = 0xf301b000; /* XXX not in prom? */ 985 if (!request_mem_region(p->cmap_regs_phys, 0x1000, "controlfb cmap")) { 986 p->cmap_regs_phys = 0; 987 goto error_out; 988 } 989 p->cmap_regs = ioremap(p->cmap_regs_phys, 0x1000); 990 991 if (!p->cmap_regs || !p->control_regs || !p->frame_buffer) 992 goto error_out; 993 994 find_vram_size(p); 995 if (!p->total_vram) 996 goto error_out; 997 998 if (init_control(p) < 0) 999 goto error_out; 1000 1001 return 0; 1002 1003 error_out: 1004 control_cleanup(); 1005 return -ENXIO; 1006 } 1007 1008 static int __init control_init(void) 1009 { 1010 struct device_node *dp; 1011 char *option = NULL; 1012 int ret = -ENXIO; 1013 1014 if (fb_get_options("controlfb", &option)) 1015 return -ENODEV; 1016 control_setup(option); 1017 1018 dp = of_find_node_by_name(NULL, "control"); 1019 if (dp && !control_of_init(dp)) 1020 ret = 0; 1021 of_node_put(dp); 1022 1023 return ret; 1024 } 1025 1026 device_initcall(control_init); 1027