1 /* 2 * Driver for AT91/AT32 LCD Controller 3 * 4 * Copyright (C) 2007 Atmel Corporation 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file COPYING in the main directory of this archive for 8 * more details. 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/platform_device.h> 13 #include <linux/dma-mapping.h> 14 #include <linux/interrupt.h> 15 #include <linux/clk.h> 16 #include <linux/fb.h> 17 #include <linux/init.h> 18 #include <linux/delay.h> 19 #include <linux/backlight.h> 20 #include <linux/gfp.h> 21 #include <linux/module.h> 22 #include <linux/platform_data/atmel.h> 23 #include <linux/of.h> 24 #include <linux/of_device.h> 25 #include <linux/of_gpio.h> 26 #include <video/of_display_timing.h> 27 #include <video/videomode.h> 28 29 #include <mach/cpu.h> 30 #include <asm/gpio.h> 31 32 #include <video/atmel_lcdc.h> 33 34 struct atmel_lcdfb_config { 35 bool have_alt_pixclock; 36 bool have_hozval; 37 bool have_intensity_bit; 38 }; 39 40 /* LCD Controller info data structure, stored in device platform_data */ 41 struct atmel_lcdfb_info { 42 spinlock_t lock; 43 struct fb_info *info; 44 void __iomem *mmio; 45 int irq_base; 46 struct work_struct task; 47 48 unsigned int smem_len; 49 struct platform_device *pdev; 50 struct clk *bus_clk; 51 struct clk *lcdc_clk; 52 53 struct backlight_device *backlight; 54 u8 bl_power; 55 u8 saved_lcdcon; 56 57 u32 pseudo_palette[16]; 58 bool have_intensity_bit; 59 60 struct atmel_lcdfb_pdata pdata; 61 62 struct atmel_lcdfb_config *config; 63 }; 64 65 struct atmel_lcdfb_power_ctrl_gpio { 66 int gpio; 67 int active_low; 68 69 struct list_head list; 70 }; 71 72 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg)) 73 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg)) 74 75 /* configurable parameters */ 76 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8 77 #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */ 78 #define ATMEL_LCDC_FIFO_SIZE 512 /* words */ 79 80 static struct atmel_lcdfb_config at91sam9261_config = { 81 .have_hozval = true, 82 .have_intensity_bit = true, 83 }; 84 85 static struct atmel_lcdfb_config at91sam9263_config = { 86 .have_intensity_bit = true, 87 }; 88 89 static struct atmel_lcdfb_config at91sam9g10_config = { 90 .have_hozval = true, 91 }; 92 93 static struct atmel_lcdfb_config at91sam9g45_config = { 94 .have_alt_pixclock = true, 95 }; 96 97 static struct atmel_lcdfb_config at91sam9g45es_config = { 98 }; 99 100 static struct atmel_lcdfb_config at91sam9rl_config = { 101 .have_intensity_bit = true, 102 }; 103 104 static struct atmel_lcdfb_config at32ap_config = { 105 .have_hozval = true, 106 }; 107 108 static const struct platform_device_id atmel_lcdfb_devtypes[] = { 109 { 110 .name = "at91sam9261-lcdfb", 111 .driver_data = (unsigned long)&at91sam9261_config, 112 }, { 113 .name = "at91sam9263-lcdfb", 114 .driver_data = (unsigned long)&at91sam9263_config, 115 }, { 116 .name = "at91sam9g10-lcdfb", 117 .driver_data = (unsigned long)&at91sam9g10_config, 118 }, { 119 .name = "at91sam9g45-lcdfb", 120 .driver_data = (unsigned long)&at91sam9g45_config, 121 }, { 122 .name = "at91sam9g45es-lcdfb", 123 .driver_data = (unsigned long)&at91sam9g45es_config, 124 }, { 125 .name = "at91sam9rl-lcdfb", 126 .driver_data = (unsigned long)&at91sam9rl_config, 127 }, { 128 .name = "at32ap-lcdfb", 129 .driver_data = (unsigned long)&at32ap_config, 130 }, { 131 /* terminator */ 132 } 133 }; 134 MODULE_DEVICE_TABLE(platform, atmel_lcdfb_devtypes); 135 136 static struct atmel_lcdfb_config * 137 atmel_lcdfb_get_config(struct platform_device *pdev) 138 { 139 unsigned long data; 140 141 data = platform_get_device_id(pdev)->driver_data; 142 143 return (struct atmel_lcdfb_config *)data; 144 } 145 146 #if defined(CONFIG_ARCH_AT91) 147 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \ 148 | FBINFO_PARTIAL_PAN_OK \ 149 | FBINFO_HWACCEL_YPAN) 150 151 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo, 152 struct fb_var_screeninfo *var, 153 struct fb_info *info) 154 { 155 156 } 157 #elif defined(CONFIG_AVR32) 158 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \ 159 | FBINFO_PARTIAL_PAN_OK \ 160 | FBINFO_HWACCEL_XPAN \ 161 | FBINFO_HWACCEL_YPAN) 162 163 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo, 164 struct fb_var_screeninfo *var, 165 struct fb_info *info) 166 { 167 u32 dma2dcfg; 168 u32 pixeloff; 169 170 pixeloff = (var->xoffset * info->var.bits_per_pixel) & 0x1f; 171 172 dma2dcfg = (info->var.xres_virtual - info->var.xres) 173 * info->var.bits_per_pixel / 8; 174 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET; 175 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg); 176 177 /* Update configuration */ 178 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 179 lcdc_readl(sinfo, ATMEL_LCDC_DMACON) 180 | ATMEL_LCDC_DMAUPDT); 181 } 182 #endif 183 184 static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8 185 | ATMEL_LCDC_POL_POSITIVE 186 | ATMEL_LCDC_ENA_PWMENABLE; 187 188 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC 189 190 /* some bl->props field just changed */ 191 static int atmel_bl_update_status(struct backlight_device *bl) 192 { 193 struct atmel_lcdfb_info *sinfo = bl_get_data(bl); 194 int power = sinfo->bl_power; 195 int brightness = bl->props.brightness; 196 197 /* REVISIT there may be a meaningful difference between 198 * fb_blank and power ... there seem to be some cases 199 * this doesn't handle correctly. 200 */ 201 if (bl->props.fb_blank != sinfo->bl_power) 202 power = bl->props.fb_blank; 203 else if (bl->props.power != sinfo->bl_power) 204 power = bl->props.power; 205 206 if (brightness < 0 && power == FB_BLANK_UNBLANK) 207 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL); 208 else if (power != FB_BLANK_UNBLANK) 209 brightness = 0; 210 211 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness); 212 if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE) 213 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 214 brightness ? contrast_ctr : 0); 215 else 216 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr); 217 218 bl->props.fb_blank = bl->props.power = sinfo->bl_power = power; 219 220 return 0; 221 } 222 223 static int atmel_bl_get_brightness(struct backlight_device *bl) 224 { 225 struct atmel_lcdfb_info *sinfo = bl_get_data(bl); 226 227 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL); 228 } 229 230 static const struct backlight_ops atmel_lcdc_bl_ops = { 231 .update_status = atmel_bl_update_status, 232 .get_brightness = atmel_bl_get_brightness, 233 }; 234 235 static void init_backlight(struct atmel_lcdfb_info *sinfo) 236 { 237 struct backlight_properties props; 238 struct backlight_device *bl; 239 240 sinfo->bl_power = FB_BLANK_UNBLANK; 241 242 if (sinfo->backlight) 243 return; 244 245 memset(&props, 0, sizeof(struct backlight_properties)); 246 props.type = BACKLIGHT_RAW; 247 props.max_brightness = 0xff; 248 bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo, 249 &atmel_lcdc_bl_ops, &props); 250 if (IS_ERR(bl)) { 251 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n", 252 PTR_ERR(bl)); 253 return; 254 } 255 sinfo->backlight = bl; 256 257 bl->props.power = FB_BLANK_UNBLANK; 258 bl->props.fb_blank = FB_BLANK_UNBLANK; 259 bl->props.brightness = atmel_bl_get_brightness(bl); 260 } 261 262 static void exit_backlight(struct atmel_lcdfb_info *sinfo) 263 { 264 if (!sinfo->backlight) 265 return; 266 267 if (sinfo->backlight->ops) { 268 sinfo->backlight->props.power = FB_BLANK_POWERDOWN; 269 sinfo->backlight->ops->update_status(sinfo->backlight); 270 } 271 backlight_device_unregister(sinfo->backlight); 272 } 273 274 #else 275 276 static void init_backlight(struct atmel_lcdfb_info *sinfo) 277 { 278 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n"); 279 } 280 281 static void exit_backlight(struct atmel_lcdfb_info *sinfo) 282 { 283 } 284 285 #endif 286 287 static void init_contrast(struct atmel_lcdfb_info *sinfo) 288 { 289 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 290 291 /* contrast pwm can be 'inverted' */ 292 if (pdata->lcdcon_pol_negative) 293 contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE); 294 295 /* have some default contrast/backlight settings */ 296 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr); 297 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT); 298 299 if (pdata->lcdcon_is_backlight) 300 init_backlight(sinfo); 301 } 302 303 static inline void atmel_lcdfb_power_control(struct atmel_lcdfb_info *sinfo, int on) 304 { 305 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 306 307 if (pdata->atmel_lcdfb_power_control) 308 pdata->atmel_lcdfb_power_control(pdata, on); 309 } 310 311 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = { 312 .type = FB_TYPE_PACKED_PIXELS, 313 .visual = FB_VISUAL_TRUECOLOR, 314 .xpanstep = 0, 315 .ypanstep = 1, 316 .ywrapstep = 0, 317 .accel = FB_ACCEL_NONE, 318 }; 319 320 static unsigned long compute_hozval(struct atmel_lcdfb_info *sinfo, 321 unsigned long xres) 322 { 323 unsigned long lcdcon2; 324 unsigned long value; 325 326 if (!sinfo->config->have_hozval) 327 return xres; 328 329 lcdcon2 = lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2); 330 value = xres; 331 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) { 332 /* STN display */ 333 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) { 334 value *= 3; 335 } 336 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4 337 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8 338 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL )) 339 value = DIV_ROUND_UP(value, 4); 340 else 341 value = DIV_ROUND_UP(value, 8); 342 } 343 344 return value; 345 } 346 347 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo) 348 { 349 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 350 351 /* Turn off the LCD controller and the DMA controller */ 352 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, 353 pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET); 354 355 /* Wait for the LCDC core to become idle */ 356 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY) 357 msleep(10); 358 359 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0); 360 } 361 362 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo) 363 { 364 atmel_lcdfb_stop_nowait(sinfo); 365 366 /* Wait for DMA engine to become idle... */ 367 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY) 368 msleep(10); 369 } 370 371 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo) 372 { 373 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 374 375 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, pdata->default_dmacon); 376 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, 377 (pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET) 378 | ATMEL_LCDC_PWR); 379 } 380 381 static void atmel_lcdfb_update_dma(struct fb_info *info, 382 struct fb_var_screeninfo *var) 383 { 384 struct atmel_lcdfb_info *sinfo = info->par; 385 struct fb_fix_screeninfo *fix = &info->fix; 386 unsigned long dma_addr; 387 388 dma_addr = (fix->smem_start + var->yoffset * fix->line_length 389 + var->xoffset * info->var.bits_per_pixel / 8); 390 391 dma_addr &= ~3UL; 392 393 /* Set framebuffer DMA base address and pixel offset */ 394 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr); 395 396 atmel_lcdfb_update_dma2d(sinfo, var, info); 397 } 398 399 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo) 400 { 401 struct fb_info *info = sinfo->info; 402 403 dma_free_writecombine(info->device, info->fix.smem_len, 404 info->screen_base, info->fix.smem_start); 405 } 406 407 /** 408 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory 409 * @sinfo: the frame buffer to allocate memory for 410 * 411 * This function is called only from the atmel_lcdfb_probe() 412 * so no locking by fb_info->mm_lock around smem_len setting is needed. 413 */ 414 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo) 415 { 416 struct fb_info *info = sinfo->info; 417 struct fb_var_screeninfo *var = &info->var; 418 unsigned int smem_len; 419 420 smem_len = (var->xres_virtual * var->yres_virtual 421 * ((var->bits_per_pixel + 7) / 8)); 422 info->fix.smem_len = max(smem_len, sinfo->smem_len); 423 424 info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len, 425 (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL); 426 427 if (!info->screen_base) { 428 return -ENOMEM; 429 } 430 431 memset(info->screen_base, 0, info->fix.smem_len); 432 433 return 0; 434 } 435 436 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var, 437 struct fb_info *info) 438 { 439 struct fb_videomode varfbmode; 440 const struct fb_videomode *fbmode = NULL; 441 442 fb_var_to_videomode(&varfbmode, var); 443 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist); 444 if (fbmode) 445 fb_videomode_to_var(var, fbmode); 446 return fbmode; 447 } 448 449 450 /** 451 * atmel_lcdfb_check_var - Validates a var passed in. 452 * @var: frame buffer variable screen structure 453 * @info: frame buffer structure that represents a single frame buffer 454 * 455 * Checks to see if the hardware supports the state requested by 456 * var passed in. This function does not alter the hardware 457 * state!!! This means the data stored in struct fb_info and 458 * struct atmel_lcdfb_info do not change. This includes the var 459 * inside of struct fb_info. Do NOT change these. This function 460 * can be called on its own if we intent to only test a mode and 461 * not actually set it. The stuff in modedb.c is a example of 462 * this. If the var passed in is slightly off by what the 463 * hardware can support then we alter the var PASSED in to what 464 * we can do. If the hardware doesn't support mode change a 465 * -EINVAL will be returned by the upper layers. You don't need 466 * to implement this function then. If you hardware doesn't 467 * support changing the resolution then this function is not 468 * needed. In this case the driver would just provide a var that 469 * represents the static state the screen is in. 470 * 471 * Returns negative errno on error, or zero on success. 472 */ 473 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var, 474 struct fb_info *info) 475 { 476 struct device *dev = info->device; 477 struct atmel_lcdfb_info *sinfo = info->par; 478 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 479 unsigned long clk_value_khz; 480 481 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; 482 483 dev_dbg(dev, "%s:\n", __func__); 484 485 if (!(var->pixclock && var->bits_per_pixel)) { 486 /* choose a suitable mode if possible */ 487 if (!atmel_lcdfb_choose_mode(var, info)) { 488 dev_err(dev, "needed value not specified\n"); 489 return -EINVAL; 490 } 491 } 492 493 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres); 494 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock)); 495 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel); 496 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz); 497 498 if (PICOS2KHZ(var->pixclock) > clk_value_khz) { 499 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock)); 500 return -EINVAL; 501 } 502 503 /* Do not allow to have real resoulution larger than virtual */ 504 if (var->xres > var->xres_virtual) 505 var->xres_virtual = var->xres; 506 507 if (var->yres > var->yres_virtual) 508 var->yres_virtual = var->yres; 509 510 /* Force same alignment for each line */ 511 var->xres = (var->xres + 3) & ~3UL; 512 var->xres_virtual = (var->xres_virtual + 3) & ~3UL; 513 514 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0; 515 var->transp.msb_right = 0; 516 var->transp.offset = var->transp.length = 0; 517 var->xoffset = var->yoffset = 0; 518 519 if (info->fix.smem_len) { 520 unsigned int smem_len = (var->xres_virtual * var->yres_virtual 521 * ((var->bits_per_pixel + 7) / 8)); 522 if (smem_len > info->fix.smem_len) { 523 dev_err(dev, "Frame buffer is too small (%u) for screen size (need at least %u)\n", 524 info->fix.smem_len, smem_len); 525 return -EINVAL; 526 } 527 } 528 529 /* Saturate vertical and horizontal timings at maximum values */ 530 var->vsync_len = min_t(u32, var->vsync_len, 531 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1); 532 var->upper_margin = min_t(u32, var->upper_margin, 533 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET); 534 var->lower_margin = min_t(u32, var->lower_margin, 535 ATMEL_LCDC_VFP); 536 var->right_margin = min_t(u32, var->right_margin, 537 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1); 538 var->hsync_len = min_t(u32, var->hsync_len, 539 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1); 540 var->left_margin = min_t(u32, var->left_margin, 541 ATMEL_LCDC_HBP + 1); 542 543 /* Some parameters can't be zero */ 544 var->vsync_len = max_t(u32, var->vsync_len, 1); 545 var->right_margin = max_t(u32, var->right_margin, 1); 546 var->hsync_len = max_t(u32, var->hsync_len, 1); 547 var->left_margin = max_t(u32, var->left_margin, 1); 548 549 switch (var->bits_per_pixel) { 550 case 1: 551 case 2: 552 case 4: 553 case 8: 554 var->red.offset = var->green.offset = var->blue.offset = 0; 555 var->red.length = var->green.length = var->blue.length 556 = var->bits_per_pixel; 557 break; 558 case 16: 559 /* Older SOCs use IBGR:555 rather than BGR:565. */ 560 if (sinfo->config->have_intensity_bit) 561 var->green.length = 5; 562 else 563 var->green.length = 6; 564 565 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) { 566 /* RGB:5X5 mode */ 567 var->red.offset = var->green.length + 5; 568 var->blue.offset = 0; 569 } else { 570 /* BGR:5X5 mode */ 571 var->red.offset = 0; 572 var->blue.offset = var->green.length + 5; 573 } 574 var->green.offset = 5; 575 var->red.length = var->blue.length = 5; 576 break; 577 case 32: 578 var->transp.offset = 24; 579 var->transp.length = 8; 580 /* fall through */ 581 case 24: 582 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) { 583 /* RGB:888 mode */ 584 var->red.offset = 16; 585 var->blue.offset = 0; 586 } else { 587 /* BGR:888 mode */ 588 var->red.offset = 0; 589 var->blue.offset = 16; 590 } 591 var->green.offset = 8; 592 var->red.length = var->green.length = var->blue.length = 8; 593 break; 594 default: 595 dev_err(dev, "color depth %d not supported\n", 596 var->bits_per_pixel); 597 return -EINVAL; 598 } 599 600 return 0; 601 } 602 603 /* 604 * LCD reset sequence 605 */ 606 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo) 607 { 608 might_sleep(); 609 610 atmel_lcdfb_stop(sinfo); 611 atmel_lcdfb_start(sinfo); 612 } 613 614 /** 615 * atmel_lcdfb_set_par - Alters the hardware state. 616 * @info: frame buffer structure that represents a single frame buffer 617 * 618 * Using the fb_var_screeninfo in fb_info we set the resolution 619 * of the this particular framebuffer. This function alters the 620 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't 621 * not alter var in fb_info since we are using that data. This 622 * means we depend on the data in var inside fb_info to be 623 * supported by the hardware. atmel_lcdfb_check_var is always called 624 * before atmel_lcdfb_set_par to ensure this. Again if you can't 625 * change the resolution you don't need this function. 626 * 627 */ 628 static int atmel_lcdfb_set_par(struct fb_info *info) 629 { 630 struct atmel_lcdfb_info *sinfo = info->par; 631 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 632 unsigned long hozval_linesz; 633 unsigned long value; 634 unsigned long clk_value_khz; 635 unsigned long bits_per_line; 636 unsigned long pix_factor = 2; 637 638 might_sleep(); 639 640 dev_dbg(info->device, "%s:\n", __func__); 641 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n", 642 info->var.xres, info->var.yres, 643 info->var.xres_virtual, info->var.yres_virtual); 644 645 atmel_lcdfb_stop_nowait(sinfo); 646 647 if (info->var.bits_per_pixel == 1) 648 info->fix.visual = FB_VISUAL_MONO01; 649 else if (info->var.bits_per_pixel <= 8) 650 info->fix.visual = FB_VISUAL_PSEUDOCOLOR; 651 else 652 info->fix.visual = FB_VISUAL_TRUECOLOR; 653 654 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel; 655 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8); 656 657 /* Re-initialize the DMA engine... */ 658 dev_dbg(info->device, " * update DMA engine\n"); 659 atmel_lcdfb_update_dma(info, &info->var); 660 661 /* ...set frame size and burst length = 8 words (?) */ 662 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32; 663 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET); 664 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value); 665 666 /* Now, the LCDC core... */ 667 668 /* Set pixel clock */ 669 if (sinfo->config->have_alt_pixclock) 670 pix_factor = 1; 671 672 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; 673 674 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock)); 675 676 if (value < pix_factor) { 677 dev_notice(info->device, "Bypassing pixel clock divider\n"); 678 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS); 679 } else { 680 value = (value / pix_factor) - 1; 681 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", 682 value); 683 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, 684 value << ATMEL_LCDC_CLKVAL_OFFSET); 685 info->var.pixclock = 686 KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1))); 687 dev_dbg(info->device, " updated pixclk: %lu KHz\n", 688 PICOS2KHZ(info->var.pixclock)); 689 } 690 691 692 /* Initialize control register 2 */ 693 value = pdata->default_lcdcon2; 694 695 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT)) 696 value |= ATMEL_LCDC_INVLINE_INVERTED; 697 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT)) 698 value |= ATMEL_LCDC_INVFRAME_INVERTED; 699 700 switch (info->var.bits_per_pixel) { 701 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break; 702 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break; 703 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break; 704 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break; 705 case 15: /* fall through */ 706 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break; 707 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break; 708 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break; 709 default: BUG(); break; 710 } 711 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value); 712 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value); 713 714 /* Vertical timing */ 715 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET; 716 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET; 717 value |= info->var.lower_margin; 718 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value); 719 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value); 720 721 /* Horizontal timing */ 722 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET; 723 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET; 724 value |= (info->var.left_margin - 1); 725 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value); 726 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value); 727 728 /* Horizontal value (aka line size) */ 729 hozval_linesz = compute_hozval(sinfo, info->var.xres); 730 731 /* Display size */ 732 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET; 733 value |= info->var.yres - 1; 734 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value); 735 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value); 736 737 /* FIFO Threshold: Use formula from data sheet */ 738 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3); 739 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value); 740 741 /* Toggle LCD_MODE every frame */ 742 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0); 743 744 /* Disable all interrupts */ 745 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL); 746 /* Enable FIFO & DMA errors */ 747 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI); 748 749 /* ...wait for DMA engine to become idle... */ 750 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY) 751 msleep(10); 752 753 atmel_lcdfb_start(sinfo); 754 755 dev_dbg(info->device, " * DONE\n"); 756 757 return 0; 758 } 759 760 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf) 761 { 762 chan &= 0xffff; 763 chan >>= 16 - bf->length; 764 return chan << bf->offset; 765 } 766 767 /** 768 * atmel_lcdfb_setcolreg - Optional function. Sets a color register. 769 * @regno: Which register in the CLUT we are programming 770 * @red: The red value which can be up to 16 bits wide 771 * @green: The green value which can be up to 16 bits wide 772 * @blue: The blue value which can be up to 16 bits wide. 773 * @transp: If supported the alpha value which can be up to 16 bits wide. 774 * @info: frame buffer info structure 775 * 776 * Set a single color register. The values supplied have a 16 bit 777 * magnitude which needs to be scaled in this function for the hardware. 778 * Things to take into consideration are how many color registers, if 779 * any, are supported with the current color visual. With truecolor mode 780 * no color palettes are supported. Here a pseudo palette is created 781 * which we store the value in pseudo_palette in struct fb_info. For 782 * pseudocolor mode we have a limited color palette. To deal with this 783 * we can program what color is displayed for a particular pixel value. 784 * DirectColor is similar in that we can program each color field. If 785 * we have a static colormap we don't need to implement this function. 786 * 787 * Returns negative errno on error, or zero on success. In an 788 * ideal world, this would have been the case, but as it turns 789 * out, the other drivers return 1 on failure, so that's what 790 * we're going to do. 791 */ 792 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red, 793 unsigned int green, unsigned int blue, 794 unsigned int transp, struct fb_info *info) 795 { 796 struct atmel_lcdfb_info *sinfo = info->par; 797 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 798 unsigned int val; 799 u32 *pal; 800 int ret = 1; 801 802 if (info->var.grayscale) 803 red = green = blue = (19595 * red + 38470 * green 804 + 7471 * blue) >> 16; 805 806 switch (info->fix.visual) { 807 case FB_VISUAL_TRUECOLOR: 808 if (regno < 16) { 809 pal = info->pseudo_palette; 810 811 val = chan_to_field(red, &info->var.red); 812 val |= chan_to_field(green, &info->var.green); 813 val |= chan_to_field(blue, &info->var.blue); 814 815 pal[regno] = val; 816 ret = 0; 817 } 818 break; 819 820 case FB_VISUAL_PSEUDOCOLOR: 821 if (regno < 256) { 822 if (sinfo->config->have_intensity_bit) { 823 /* old style I+BGR:555 */ 824 val = ((red >> 11) & 0x001f); 825 val |= ((green >> 6) & 0x03e0); 826 val |= ((blue >> 1) & 0x7c00); 827 828 /* 829 * TODO: intensity bit. Maybe something like 830 * ~(red[10] ^ green[10] ^ blue[10]) & 1 831 */ 832 } else { 833 /* new style BGR:565 / RGB:565 */ 834 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) { 835 val = ((blue >> 11) & 0x001f); 836 val |= ((red >> 0) & 0xf800); 837 } else { 838 val = ((red >> 11) & 0x001f); 839 val |= ((blue >> 0) & 0xf800); 840 } 841 842 val |= ((green >> 5) & 0x07e0); 843 } 844 845 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val); 846 ret = 0; 847 } 848 break; 849 850 case FB_VISUAL_MONO01: 851 if (regno < 2) { 852 val = (regno == 0) ? 0x00 : 0x1F; 853 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val); 854 ret = 0; 855 } 856 break; 857 858 } 859 860 return ret; 861 } 862 863 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var, 864 struct fb_info *info) 865 { 866 dev_dbg(info->device, "%s\n", __func__); 867 868 atmel_lcdfb_update_dma(info, var); 869 870 return 0; 871 } 872 873 static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info) 874 { 875 struct atmel_lcdfb_info *sinfo = info->par; 876 877 switch (blank_mode) { 878 case FB_BLANK_UNBLANK: 879 case FB_BLANK_NORMAL: 880 atmel_lcdfb_start(sinfo); 881 break; 882 case FB_BLANK_VSYNC_SUSPEND: 883 case FB_BLANK_HSYNC_SUSPEND: 884 break; 885 case FB_BLANK_POWERDOWN: 886 atmel_lcdfb_stop(sinfo); 887 break; 888 default: 889 return -EINVAL; 890 } 891 892 /* let fbcon do a soft blank for us */ 893 return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0); 894 } 895 896 static struct fb_ops atmel_lcdfb_ops = { 897 .owner = THIS_MODULE, 898 .fb_check_var = atmel_lcdfb_check_var, 899 .fb_set_par = atmel_lcdfb_set_par, 900 .fb_setcolreg = atmel_lcdfb_setcolreg, 901 .fb_blank = atmel_lcdfb_blank, 902 .fb_pan_display = atmel_lcdfb_pan_display, 903 .fb_fillrect = cfb_fillrect, 904 .fb_copyarea = cfb_copyarea, 905 .fb_imageblit = cfb_imageblit, 906 }; 907 908 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id) 909 { 910 struct fb_info *info = dev_id; 911 struct atmel_lcdfb_info *sinfo = info->par; 912 u32 status; 913 914 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR); 915 if (status & ATMEL_LCDC_UFLWI) { 916 dev_warn(info->device, "FIFO underflow %#x\n", status); 917 /* reset DMA and FIFO to avoid screen shifting */ 918 schedule_work(&sinfo->task); 919 } 920 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status); 921 return IRQ_HANDLED; 922 } 923 924 /* 925 * LCD controller task (to reset the LCD) 926 */ 927 static void atmel_lcdfb_task(struct work_struct *work) 928 { 929 struct atmel_lcdfb_info *sinfo = 930 container_of(work, struct atmel_lcdfb_info, task); 931 932 atmel_lcdfb_reset(sinfo); 933 } 934 935 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo) 936 { 937 struct fb_info *info = sinfo->info; 938 int ret = 0; 939 940 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW; 941 942 dev_info(info->device, 943 "%luKiB frame buffer at %08lx (mapped at %p)\n", 944 (unsigned long)info->fix.smem_len / 1024, 945 (unsigned long)info->fix.smem_start, 946 info->screen_base); 947 948 /* Allocate colormap */ 949 ret = fb_alloc_cmap(&info->cmap, 256, 0); 950 if (ret < 0) 951 dev_err(info->device, "Alloc color map failed\n"); 952 953 return ret; 954 } 955 956 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo) 957 { 958 clk_prepare_enable(sinfo->bus_clk); 959 clk_prepare_enable(sinfo->lcdc_clk); 960 } 961 962 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo) 963 { 964 clk_disable_unprepare(sinfo->bus_clk); 965 clk_disable_unprepare(sinfo->lcdc_clk); 966 } 967 968 #ifdef CONFIG_OF 969 static const struct of_device_id atmel_lcdfb_dt_ids[] = { 970 { .compatible = "atmel,at91sam9261-lcdc" , .data = &at91sam9261_config, }, 971 { .compatible = "atmel,at91sam9263-lcdc" , .data = &at91sam9263_config, }, 972 { .compatible = "atmel,at91sam9g10-lcdc" , .data = &at91sam9g10_config, }, 973 { .compatible = "atmel,at91sam9g45-lcdc" , .data = &at91sam9g45_config, }, 974 { .compatible = "atmel,at91sam9g45es-lcdc" , .data = &at91sam9g45es_config, }, 975 { .compatible = "atmel,at91sam9rl-lcdc" , .data = &at91sam9rl_config, }, 976 { .compatible = "atmel,at32ap-lcdc" , .data = &at32ap_config, }, 977 { /* sentinel */ } 978 }; 979 980 MODULE_DEVICE_TABLE(of, atmel_lcdfb_dt_ids); 981 982 static const char *atmel_lcdfb_wiring_modes[] = { 983 [ATMEL_LCDC_WIRING_BGR] = "BRG", 984 [ATMEL_LCDC_WIRING_RGB] = "RGB", 985 }; 986 987 const int atmel_lcdfb_get_of_wiring_modes(struct device_node *np) 988 { 989 const char *mode; 990 int err, i; 991 992 err = of_property_read_string(np, "atmel,lcd-wiring-mode", &mode); 993 if (err < 0) 994 return ATMEL_LCDC_WIRING_BGR; 995 996 for (i = 0; i < ARRAY_SIZE(atmel_lcdfb_wiring_modes); i++) 997 if (!strcasecmp(mode, atmel_lcdfb_wiring_modes[i])) 998 return i; 999 1000 return -ENODEV; 1001 } 1002 1003 static void atmel_lcdfb_power_control_gpio(struct atmel_lcdfb_pdata *pdata, int on) 1004 { 1005 struct atmel_lcdfb_power_ctrl_gpio *og; 1006 1007 list_for_each_entry(og, &pdata->pwr_gpios, list) 1008 gpio_set_value(og->gpio, on); 1009 } 1010 1011 static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo) 1012 { 1013 struct fb_info *info = sinfo->info; 1014 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 1015 struct fb_var_screeninfo *var = &info->var; 1016 struct device *dev = &sinfo->pdev->dev; 1017 struct device_node *np =dev->of_node; 1018 struct device_node *display_np; 1019 struct device_node *timings_np; 1020 struct display_timings *timings; 1021 enum of_gpio_flags flags; 1022 struct atmel_lcdfb_power_ctrl_gpio *og; 1023 bool is_gpio_power = false; 1024 int ret = -ENOENT; 1025 int i, gpio; 1026 1027 sinfo->config = (struct atmel_lcdfb_config*) 1028 of_match_device(atmel_lcdfb_dt_ids, dev)->data; 1029 1030 display_np = of_parse_phandle(np, "display", 0); 1031 if (!display_np) { 1032 dev_err(dev, "failed to find display phandle\n"); 1033 return -ENOENT; 1034 } 1035 1036 ret = of_property_read_u32(display_np, "bits-per-pixel", &var->bits_per_pixel); 1037 if (ret < 0) { 1038 dev_err(dev, "failed to get property bits-per-pixel\n"); 1039 goto put_display_node; 1040 } 1041 1042 ret = of_property_read_u32(display_np, "atmel,guard-time", &pdata->guard_time); 1043 if (ret < 0) { 1044 dev_err(dev, "failed to get property atmel,guard-time\n"); 1045 goto put_display_node; 1046 } 1047 1048 ret = of_property_read_u32(display_np, "atmel,lcdcon2", &pdata->default_lcdcon2); 1049 if (ret < 0) { 1050 dev_err(dev, "failed to get property atmel,lcdcon2\n"); 1051 goto put_display_node; 1052 } 1053 1054 ret = of_property_read_u32(display_np, "atmel,dmacon", &pdata->default_dmacon); 1055 if (ret < 0) { 1056 dev_err(dev, "failed to get property bits-per-pixel\n"); 1057 goto put_display_node; 1058 } 1059 1060 INIT_LIST_HEAD(&pdata->pwr_gpios); 1061 ret = -ENOMEM; 1062 for (i = 0; i < of_gpio_named_count(display_np, "atmel,power-control-gpio"); i++) { 1063 gpio = of_get_named_gpio_flags(display_np, "atmel,power-control-gpio", 1064 i, &flags); 1065 if (gpio < 0) 1066 continue; 1067 1068 og = devm_kzalloc(dev, sizeof(*og), GFP_KERNEL); 1069 if (!og) 1070 goto put_display_node; 1071 1072 og->gpio = gpio; 1073 og->active_low = flags & OF_GPIO_ACTIVE_LOW; 1074 is_gpio_power = true; 1075 ret = devm_gpio_request(dev, gpio, "lcd-power-control-gpio"); 1076 if (ret) { 1077 dev_err(dev, "request gpio %d failed\n", gpio); 1078 goto put_display_node; 1079 } 1080 1081 ret = gpio_direction_output(gpio, og->active_low); 1082 if (ret) { 1083 dev_err(dev, "set direction output gpio %d failed\n", gpio); 1084 goto put_display_node; 1085 } 1086 list_add(&og->list, &pdata->pwr_gpios); 1087 } 1088 1089 if (is_gpio_power) 1090 pdata->atmel_lcdfb_power_control = atmel_lcdfb_power_control_gpio; 1091 1092 ret = atmel_lcdfb_get_of_wiring_modes(display_np); 1093 if (ret < 0) { 1094 dev_err(dev, "invalid atmel,lcd-wiring-mode\n"); 1095 goto put_display_node; 1096 } 1097 pdata->lcd_wiring_mode = ret; 1098 1099 pdata->lcdcon_is_backlight = of_property_read_bool(display_np, "atmel,lcdcon-backlight"); 1100 1101 timings = of_get_display_timings(display_np); 1102 if (!timings) { 1103 dev_err(dev, "failed to get display timings\n"); 1104 goto put_display_node; 1105 } 1106 1107 timings_np = of_find_node_by_name(display_np, "display-timings"); 1108 if (!timings_np) { 1109 dev_err(dev, "failed to find display-timings node\n"); 1110 goto put_display_node; 1111 } 1112 1113 for (i = 0; i < of_get_child_count(timings_np); i++) { 1114 struct videomode vm; 1115 struct fb_videomode fb_vm; 1116 1117 ret = videomode_from_timings(timings, &vm, i); 1118 if (ret < 0) 1119 goto put_timings_node; 1120 ret = fb_videomode_from_videomode(&vm, &fb_vm); 1121 if (ret < 0) 1122 goto put_timings_node; 1123 1124 fb_add_videomode(&fb_vm, &info->modelist); 1125 } 1126 1127 return 0; 1128 1129 put_timings_node: 1130 of_node_put(timings_np); 1131 put_display_node: 1132 of_node_put(display_np); 1133 return ret; 1134 } 1135 #else 1136 static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo) 1137 { 1138 return 0; 1139 } 1140 #endif 1141 1142 static int __init atmel_lcdfb_probe(struct platform_device *pdev) 1143 { 1144 struct device *dev = &pdev->dev; 1145 struct fb_info *info; 1146 struct atmel_lcdfb_info *sinfo; 1147 struct atmel_lcdfb_pdata *pdata = NULL; 1148 struct resource *regs = NULL; 1149 struct resource *map = NULL; 1150 struct fb_modelist *modelist; 1151 int ret; 1152 1153 dev_dbg(dev, "%s BEGIN\n", __func__); 1154 1155 ret = -ENOMEM; 1156 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev); 1157 if (!info) { 1158 dev_err(dev, "cannot allocate memory\n"); 1159 goto out; 1160 } 1161 1162 sinfo = info->par; 1163 sinfo->pdev = pdev; 1164 sinfo->info = info; 1165 1166 INIT_LIST_HEAD(&info->modelist); 1167 1168 if (pdev->dev.of_node) { 1169 ret = atmel_lcdfb_of_init(sinfo); 1170 if (ret) 1171 goto free_info; 1172 } else if (dev_get_platdata(dev)) { 1173 struct fb_monspecs *monspecs; 1174 int i; 1175 1176 pdata = dev_get_platdata(dev); 1177 monspecs = pdata->default_monspecs; 1178 sinfo->pdata = *pdata; 1179 1180 for (i = 0; i < monspecs->modedb_len; i++) 1181 fb_add_videomode(&monspecs->modedb[i], &info->modelist); 1182 1183 sinfo->config = atmel_lcdfb_get_config(pdev); 1184 1185 info->var.bits_per_pixel = pdata->default_bpp ? pdata->default_bpp : 16; 1186 memcpy(&info->monspecs, pdata->default_monspecs, sizeof(info->monspecs)); 1187 } else { 1188 dev_err(dev, "cannot get default configuration\n"); 1189 goto free_info; 1190 } 1191 1192 if (!sinfo->config) 1193 goto free_info; 1194 1195 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT; 1196 info->pseudo_palette = sinfo->pseudo_palette; 1197 info->fbops = &atmel_lcdfb_ops; 1198 1199 info->fix = atmel_lcdfb_fix; 1200 strcpy(info->fix.id, sinfo->pdev->name); 1201 1202 /* Enable LCDC Clocks */ 1203 sinfo->bus_clk = clk_get(dev, "hclk"); 1204 if (IS_ERR(sinfo->bus_clk)) { 1205 ret = PTR_ERR(sinfo->bus_clk); 1206 goto free_info; 1207 } 1208 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk"); 1209 if (IS_ERR(sinfo->lcdc_clk)) { 1210 ret = PTR_ERR(sinfo->lcdc_clk); 1211 goto put_bus_clk; 1212 } 1213 atmel_lcdfb_start_clock(sinfo); 1214 1215 modelist = list_first_entry(&info->modelist, 1216 struct fb_modelist, list); 1217 fb_videomode_to_var(&info->var, &modelist->mode); 1218 1219 atmel_lcdfb_check_var(&info->var, info); 1220 1221 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1222 if (!regs) { 1223 dev_err(dev, "resources unusable\n"); 1224 ret = -ENXIO; 1225 goto stop_clk; 1226 } 1227 1228 sinfo->irq_base = platform_get_irq(pdev, 0); 1229 if (sinfo->irq_base < 0) { 1230 dev_err(dev, "unable to get irq\n"); 1231 ret = sinfo->irq_base; 1232 goto stop_clk; 1233 } 1234 1235 /* Initialize video memory */ 1236 map = platform_get_resource(pdev, IORESOURCE_MEM, 1); 1237 if (map) { 1238 /* use a pre-allocated memory buffer */ 1239 info->fix.smem_start = map->start; 1240 info->fix.smem_len = resource_size(map); 1241 if (!request_mem_region(info->fix.smem_start, 1242 info->fix.smem_len, pdev->name)) { 1243 ret = -EBUSY; 1244 goto stop_clk; 1245 } 1246 1247 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len); 1248 if (!info->screen_base) { 1249 ret = -ENOMEM; 1250 goto release_intmem; 1251 } 1252 1253 /* 1254 * Don't clear the framebuffer -- someone may have set 1255 * up a splash image. 1256 */ 1257 } else { 1258 /* allocate memory buffer */ 1259 ret = atmel_lcdfb_alloc_video_memory(sinfo); 1260 if (ret < 0) { 1261 dev_err(dev, "cannot allocate framebuffer: %d\n", ret); 1262 goto stop_clk; 1263 } 1264 } 1265 1266 /* LCDC registers */ 1267 info->fix.mmio_start = regs->start; 1268 info->fix.mmio_len = resource_size(regs); 1269 1270 if (!request_mem_region(info->fix.mmio_start, 1271 info->fix.mmio_len, pdev->name)) { 1272 ret = -EBUSY; 1273 goto free_fb; 1274 } 1275 1276 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len); 1277 if (!sinfo->mmio) { 1278 dev_err(dev, "cannot map LCDC registers\n"); 1279 ret = -ENOMEM; 1280 goto release_mem; 1281 } 1282 1283 /* Initialize PWM for contrast or backlight ("off") */ 1284 init_contrast(sinfo); 1285 1286 /* interrupt */ 1287 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info); 1288 if (ret) { 1289 dev_err(dev, "request_irq failed: %d\n", ret); 1290 goto unmap_mmio; 1291 } 1292 1293 /* Some operations on the LCDC might sleep and 1294 * require a preemptible task context */ 1295 INIT_WORK(&sinfo->task, atmel_lcdfb_task); 1296 1297 ret = atmel_lcdfb_init_fbinfo(sinfo); 1298 if (ret < 0) { 1299 dev_err(dev, "init fbinfo failed: %d\n", ret); 1300 goto unregister_irqs; 1301 } 1302 1303 ret = atmel_lcdfb_set_par(info); 1304 if (ret < 0) { 1305 dev_err(dev, "set par failed: %d\n", ret); 1306 goto unregister_irqs; 1307 } 1308 1309 dev_set_drvdata(dev, info); 1310 1311 /* 1312 * Tell the world that we're ready to go 1313 */ 1314 ret = register_framebuffer(info); 1315 if (ret < 0) { 1316 dev_err(dev, "failed to register framebuffer device: %d\n", ret); 1317 goto reset_drvdata; 1318 } 1319 1320 /* Power up the LCDC screen */ 1321 atmel_lcdfb_power_control(sinfo, 1); 1322 1323 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n", 1324 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base); 1325 1326 return 0; 1327 1328 reset_drvdata: 1329 dev_set_drvdata(dev, NULL); 1330 fb_dealloc_cmap(&info->cmap); 1331 unregister_irqs: 1332 cancel_work_sync(&sinfo->task); 1333 free_irq(sinfo->irq_base, info); 1334 unmap_mmio: 1335 exit_backlight(sinfo); 1336 iounmap(sinfo->mmio); 1337 release_mem: 1338 release_mem_region(info->fix.mmio_start, info->fix.mmio_len); 1339 free_fb: 1340 if (map) 1341 iounmap(info->screen_base); 1342 else 1343 atmel_lcdfb_free_video_memory(sinfo); 1344 1345 release_intmem: 1346 if (map) 1347 release_mem_region(info->fix.smem_start, info->fix.smem_len); 1348 stop_clk: 1349 atmel_lcdfb_stop_clock(sinfo); 1350 clk_put(sinfo->lcdc_clk); 1351 put_bus_clk: 1352 clk_put(sinfo->bus_clk); 1353 free_info: 1354 framebuffer_release(info); 1355 out: 1356 dev_dbg(dev, "%s FAILED\n", __func__); 1357 return ret; 1358 } 1359 1360 static int __exit atmel_lcdfb_remove(struct platform_device *pdev) 1361 { 1362 struct device *dev = &pdev->dev; 1363 struct fb_info *info = dev_get_drvdata(dev); 1364 struct atmel_lcdfb_info *sinfo; 1365 struct atmel_lcdfb_pdata *pdata; 1366 1367 if (!info || !info->par) 1368 return 0; 1369 sinfo = info->par; 1370 pdata = &sinfo->pdata; 1371 1372 cancel_work_sync(&sinfo->task); 1373 exit_backlight(sinfo); 1374 atmel_lcdfb_power_control(sinfo, 0); 1375 unregister_framebuffer(info); 1376 atmel_lcdfb_stop_clock(sinfo); 1377 clk_put(sinfo->lcdc_clk); 1378 clk_put(sinfo->bus_clk); 1379 fb_dealloc_cmap(&info->cmap); 1380 free_irq(sinfo->irq_base, info); 1381 iounmap(sinfo->mmio); 1382 release_mem_region(info->fix.mmio_start, info->fix.mmio_len); 1383 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) { 1384 iounmap(info->screen_base); 1385 release_mem_region(info->fix.smem_start, info->fix.smem_len); 1386 } else { 1387 atmel_lcdfb_free_video_memory(sinfo); 1388 } 1389 1390 framebuffer_release(info); 1391 1392 return 0; 1393 } 1394 1395 #ifdef CONFIG_PM 1396 1397 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg) 1398 { 1399 struct fb_info *info = platform_get_drvdata(pdev); 1400 struct atmel_lcdfb_info *sinfo = info->par; 1401 1402 /* 1403 * We don't want to handle interrupts while the clock is 1404 * stopped. It may take forever. 1405 */ 1406 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL); 1407 1408 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR); 1409 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0); 1410 atmel_lcdfb_power_control(sinfo, 0); 1411 atmel_lcdfb_stop(sinfo); 1412 atmel_lcdfb_stop_clock(sinfo); 1413 1414 return 0; 1415 } 1416 1417 static int atmel_lcdfb_resume(struct platform_device *pdev) 1418 { 1419 struct fb_info *info = platform_get_drvdata(pdev); 1420 struct atmel_lcdfb_info *sinfo = info->par; 1421 1422 atmel_lcdfb_start_clock(sinfo); 1423 atmel_lcdfb_start(sinfo); 1424 atmel_lcdfb_power_control(sinfo, 1); 1425 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon); 1426 1427 /* Enable FIFO & DMA errors */ 1428 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI 1429 | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI); 1430 1431 return 0; 1432 } 1433 1434 #else 1435 #define atmel_lcdfb_suspend NULL 1436 #define atmel_lcdfb_resume NULL 1437 #endif 1438 1439 static struct platform_driver atmel_lcdfb_driver = { 1440 .remove = __exit_p(atmel_lcdfb_remove), 1441 .suspend = atmel_lcdfb_suspend, 1442 .resume = atmel_lcdfb_resume, 1443 .id_table = atmel_lcdfb_devtypes, 1444 .driver = { 1445 .name = "atmel_lcdfb", 1446 .owner = THIS_MODULE, 1447 .of_match_table = of_match_ptr(atmel_lcdfb_dt_ids), 1448 }, 1449 }; 1450 1451 module_platform_driver_probe(atmel_lcdfb_driver, atmel_lcdfb_probe); 1452 1453 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver"); 1454 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>"); 1455 MODULE_LICENSE("GPL"); 1456