xref: /openbmc/linux/drivers/video/fbdev/amba-clcd.c (revision 151f4e2b)
1 /*
2  *  linux/drivers/video/amba-clcd.c
3  *
4  * Copyright (C) 2001 ARM Limited, by David A Rusling
5  * Updated to 2.5, Deep Blue Solutions Ltd.
6  *
7  * This file is subject to the terms and conditions of the GNU General Public
8  * License.  See the file COPYING in the main directory of this archive
9  * for more details.
10  *
11  *  ARM PrimeCell PL110 Color LCD Controller
12  */
13 #include <linux/amba/bus.h>
14 #include <linux/amba/clcd.h>
15 #include <linux/backlight.h>
16 #include <linux/clk.h>
17 #include <linux/delay.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/fb.h>
20 #include <linux/init.h>
21 #include <linux/ioport.h>
22 #include <linux/list.h>
23 #include <linux/mm.h>
24 #include <linux/module.h>
25 #include <linux/of_address.h>
26 #include <linux/of_graph.h>
27 #include <linux/slab.h>
28 #include <linux/string.h>
29 #include <video/display_timing.h>
30 #include <video/of_display_timing.h>
31 #include <video/videomode.h>
32 
33 #define to_clcd(info)	container_of(info, struct clcd_fb, fb)
34 
35 /* This is limited to 16 characters when displayed by X startup */
36 static const char *clcd_name = "CLCD FB";
37 
38 /*
39  * Unfortunately, the enable/disable functions may be called either from
40  * process or IRQ context, and we _need_ to delay.  This is _not_ good.
41  */
42 static inline void clcdfb_sleep(unsigned int ms)
43 {
44 	if (in_atomic()) {
45 		mdelay(ms);
46 	} else {
47 		msleep(ms);
48 	}
49 }
50 
51 static inline void clcdfb_set_start(struct clcd_fb *fb)
52 {
53 	unsigned long ustart = fb->fb.fix.smem_start;
54 	unsigned long lstart;
55 
56 	ustart += fb->fb.var.yoffset * fb->fb.fix.line_length;
57 	lstart = ustart + fb->fb.var.yres * fb->fb.fix.line_length / 2;
58 
59 	writel(ustart, fb->regs + CLCD_UBAS);
60 	writel(lstart, fb->regs + CLCD_LBAS);
61 }
62 
63 static void clcdfb_disable(struct clcd_fb *fb)
64 {
65 	u32 val;
66 
67 	if (fb->board->disable)
68 		fb->board->disable(fb);
69 
70 	if (fb->panel->backlight) {
71 		fb->panel->backlight->props.power = FB_BLANK_POWERDOWN;
72 		backlight_update_status(fb->panel->backlight);
73 	}
74 
75 	val = readl(fb->regs + fb->off_cntl);
76 	if (val & CNTL_LCDPWR) {
77 		val &= ~CNTL_LCDPWR;
78 		writel(val, fb->regs + fb->off_cntl);
79 
80 		clcdfb_sleep(20);
81 	}
82 	if (val & CNTL_LCDEN) {
83 		val &= ~CNTL_LCDEN;
84 		writel(val, fb->regs + fb->off_cntl);
85 	}
86 
87 	/*
88 	 * Disable CLCD clock source.
89 	 */
90 	if (fb->clk_enabled) {
91 		fb->clk_enabled = false;
92 		clk_disable(fb->clk);
93 	}
94 }
95 
96 static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
97 {
98 	/*
99 	 * Enable the CLCD clock source.
100 	 */
101 	if (!fb->clk_enabled) {
102 		fb->clk_enabled = true;
103 		clk_enable(fb->clk);
104 	}
105 
106 	/*
107 	 * Bring up by first enabling..
108 	 */
109 	cntl |= CNTL_LCDEN;
110 	writel(cntl, fb->regs + fb->off_cntl);
111 
112 	clcdfb_sleep(20);
113 
114 	/*
115 	 * and now apply power.
116 	 */
117 	cntl |= CNTL_LCDPWR;
118 	writel(cntl, fb->regs + fb->off_cntl);
119 
120 	/*
121 	 * Turn on backlight
122 	 */
123 	if (fb->panel->backlight) {
124 		fb->panel->backlight->props.power = FB_BLANK_UNBLANK;
125 		backlight_update_status(fb->panel->backlight);
126 	}
127 
128 	/*
129 	 * finally, enable the interface.
130 	 */
131 	if (fb->board->enable)
132 		fb->board->enable(fb);
133 }
134 
135 static int
136 clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
137 {
138 	u32 caps;
139 	int ret = 0;
140 
141 	if (fb->panel->caps && fb->board->caps)
142 		caps = fb->panel->caps & fb->board->caps;
143 	else {
144 		/* Old way of specifying what can be used */
145 		caps = fb->panel->cntl & CNTL_BGR ?
146 			CLCD_CAP_BGR : CLCD_CAP_RGB;
147 		/* But mask out 444 modes as they weren't supported */
148 		caps &= ~CLCD_CAP_444;
149 	}
150 
151 	/* Only TFT panels can do RGB888/BGR888 */
152 	if (!(fb->panel->cntl & CNTL_LCDTFT))
153 		caps &= ~CLCD_CAP_888;
154 
155 	memset(&var->transp, 0, sizeof(var->transp));
156 
157 	var->red.msb_right = 0;
158 	var->green.msb_right = 0;
159 	var->blue.msb_right = 0;
160 
161 	switch (var->bits_per_pixel) {
162 	case 1:
163 	case 2:
164 	case 4:
165 	case 8:
166 		/* If we can't do 5551, reject */
167 		caps &= CLCD_CAP_5551;
168 		if (!caps) {
169 			ret = -EINVAL;
170 			break;
171 		}
172 
173 		var->red.length		= var->bits_per_pixel;
174 		var->red.offset		= 0;
175 		var->green.length	= var->bits_per_pixel;
176 		var->green.offset	= 0;
177 		var->blue.length	= var->bits_per_pixel;
178 		var->blue.offset	= 0;
179 		break;
180 
181 	case 16:
182 		/* If we can't do 444, 5551 or 565, reject */
183 		if (!(caps & (CLCD_CAP_444 | CLCD_CAP_5551 | CLCD_CAP_565))) {
184 			ret = -EINVAL;
185 			break;
186 		}
187 
188 		/*
189 		 * Green length can be 4, 5 or 6 depending whether
190 		 * we're operating in 444, 5551 or 565 mode.
191 		 */
192 		if (var->green.length == 4 && caps & CLCD_CAP_444)
193 			caps &= CLCD_CAP_444;
194 		if (var->green.length == 5 && caps & CLCD_CAP_5551)
195 			caps &= CLCD_CAP_5551;
196 		else if (var->green.length == 6 && caps & CLCD_CAP_565)
197 			caps &= CLCD_CAP_565;
198 		else {
199 			/*
200 			 * PL110 officially only supports RGB555,
201 			 * but may be wired up to allow RGB565.
202 			 */
203 			if (caps & CLCD_CAP_565) {
204 				var->green.length = 6;
205 				caps &= CLCD_CAP_565;
206 			} else if (caps & CLCD_CAP_5551) {
207 				var->green.length = 5;
208 				caps &= CLCD_CAP_5551;
209 			} else {
210 				var->green.length = 4;
211 				caps &= CLCD_CAP_444;
212 			}
213 		}
214 
215 		if (var->green.length >= 5) {
216 			var->red.length = 5;
217 			var->blue.length = 5;
218 		} else {
219 			var->red.length = 4;
220 			var->blue.length = 4;
221 		}
222 		break;
223 	case 32:
224 		/* If we can't do 888, reject */
225 		caps &= CLCD_CAP_888;
226 		if (!caps) {
227 			ret = -EINVAL;
228 			break;
229 		}
230 
231 		var->red.length = 8;
232 		var->green.length = 8;
233 		var->blue.length = 8;
234 		break;
235 	default:
236 		ret = -EINVAL;
237 		break;
238 	}
239 
240 	/*
241 	 * >= 16bpp displays have separate colour component bitfields
242 	 * encoded in the pixel data.  Calculate their position from
243 	 * the bitfield length defined above.
244 	 */
245 	if (ret == 0 && var->bits_per_pixel >= 16) {
246 		bool bgr, rgb;
247 
248 		bgr = caps & CLCD_CAP_BGR && var->blue.offset == 0;
249 		rgb = caps & CLCD_CAP_RGB && var->red.offset == 0;
250 
251 		if (!bgr && !rgb)
252 			/*
253 			 * The requested format was not possible, try just
254 			 * our capabilities.  One of BGR or RGB must be
255 			 * supported.
256 			 */
257 			bgr = caps & CLCD_CAP_BGR;
258 
259 		if (bgr) {
260 			var->blue.offset = 0;
261 			var->green.offset = var->blue.offset + var->blue.length;
262 			var->red.offset = var->green.offset + var->green.length;
263 		} else {
264 			var->red.offset = 0;
265 			var->green.offset = var->red.offset + var->red.length;
266 			var->blue.offset = var->green.offset + var->green.length;
267 		}
268 	}
269 
270 	return ret;
271 }
272 
273 static int clcdfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
274 {
275 	struct clcd_fb *fb = to_clcd(info);
276 	int ret = -EINVAL;
277 
278 	if (fb->board->check)
279 		ret = fb->board->check(fb, var);
280 
281 	if (ret == 0 &&
282 	    var->xres_virtual * var->bits_per_pixel / 8 *
283 	    var->yres_virtual > fb->fb.fix.smem_len)
284 		ret = -EINVAL;
285 
286 	if (ret == 0)
287 		ret = clcdfb_set_bitfields(fb, var);
288 
289 	return ret;
290 }
291 
292 static int clcdfb_set_par(struct fb_info *info)
293 {
294 	struct clcd_fb *fb = to_clcd(info);
295 	struct clcd_regs regs;
296 
297 	fb->fb.fix.line_length = fb->fb.var.xres_virtual *
298 				 fb->fb.var.bits_per_pixel / 8;
299 
300 	if (fb->fb.var.bits_per_pixel <= 8)
301 		fb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
302 	else
303 		fb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
304 
305 	fb->board->decode(fb, &regs);
306 
307 	clcdfb_disable(fb);
308 
309 	writel(regs.tim0, fb->regs + CLCD_TIM0);
310 	writel(regs.tim1, fb->regs + CLCD_TIM1);
311 	writel(regs.tim2, fb->regs + CLCD_TIM2);
312 	writel(regs.tim3, fb->regs + CLCD_TIM3);
313 
314 	clcdfb_set_start(fb);
315 
316 	clk_set_rate(fb->clk, (1000000000 / regs.pixclock) * 1000);
317 
318 	fb->clcd_cntl = regs.cntl;
319 
320 	clcdfb_enable(fb, regs.cntl);
321 
322 #ifdef DEBUG
323 	printk(KERN_INFO
324 	       "CLCD: Registers set to\n"
325 	       "  %08x %08x %08x %08x\n"
326 	       "  %08x %08x %08x %08x\n",
327 		readl(fb->regs + CLCD_TIM0), readl(fb->regs + CLCD_TIM1),
328 		readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3),
329 		readl(fb->regs + CLCD_UBAS), readl(fb->regs + CLCD_LBAS),
330 		readl(fb->regs + fb->off_ienb), readl(fb->regs + fb->off_cntl));
331 #endif
332 
333 	return 0;
334 }
335 
336 static inline u32 convert_bitfield(int val, struct fb_bitfield *bf)
337 {
338 	unsigned int mask = (1 << bf->length) - 1;
339 
340 	return (val >> (16 - bf->length) & mask) << bf->offset;
341 }
342 
343 /*
344  *  Set a single color register. The values supplied have a 16 bit
345  *  magnitude.  Return != 0 for invalid regno.
346  */
347 static int
348 clcdfb_setcolreg(unsigned int regno, unsigned int red, unsigned int green,
349 		 unsigned int blue, unsigned int transp, struct fb_info *info)
350 {
351 	struct clcd_fb *fb = to_clcd(info);
352 
353 	if (regno < 16)
354 		fb->cmap[regno] = convert_bitfield(transp, &fb->fb.var.transp) |
355 				  convert_bitfield(blue, &fb->fb.var.blue) |
356 				  convert_bitfield(green, &fb->fb.var.green) |
357 				  convert_bitfield(red, &fb->fb.var.red);
358 
359 	if (fb->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR && regno < 256) {
360 		int hw_reg = CLCD_PALETTE + ((regno * 2) & ~3);
361 		u32 val, mask, newval;
362 
363 		newval  = (red >> 11)  & 0x001f;
364 		newval |= (green >> 6) & 0x03e0;
365 		newval |= (blue >> 1)  & 0x7c00;
366 
367 		/*
368 		 * 3.2.11: if we're configured for big endian
369 		 * byte order, the palette entries are swapped.
370 		 */
371 		if (fb->clcd_cntl & CNTL_BEBO)
372 			regno ^= 1;
373 
374 		if (regno & 1) {
375 			newval <<= 16;
376 			mask = 0x0000ffff;
377 		} else {
378 			mask = 0xffff0000;
379 		}
380 
381 		val = readl(fb->regs + hw_reg) & mask;
382 		writel(val | newval, fb->regs + hw_reg);
383 	}
384 
385 	return regno > 255;
386 }
387 
388 /*
389  *  Blank the screen if blank_mode != 0, else unblank. If blank == NULL
390  *  then the caller blanks by setting the CLUT (Color Look Up Table) to all
391  *  black. Return 0 if blanking succeeded, != 0 if un-/blanking failed due
392  *  to e.g. a video mode which doesn't support it. Implements VESA suspend
393  *  and powerdown modes on hardware that supports disabling hsync/vsync:
394  *    blank_mode == 2: suspend vsync
395  *    blank_mode == 3: suspend hsync
396  *    blank_mode == 4: powerdown
397  */
398 static int clcdfb_blank(int blank_mode, struct fb_info *info)
399 {
400 	struct clcd_fb *fb = to_clcd(info);
401 
402 	if (blank_mode != 0) {
403 		clcdfb_disable(fb);
404 	} else {
405 		clcdfb_enable(fb, fb->clcd_cntl);
406 	}
407 	return 0;
408 }
409 
410 static int clcdfb_mmap(struct fb_info *info,
411 		       struct vm_area_struct *vma)
412 {
413 	struct clcd_fb *fb = to_clcd(info);
414 	unsigned long len, off = vma->vm_pgoff << PAGE_SHIFT;
415 	int ret = -EINVAL;
416 
417 	len = info->fix.smem_len;
418 
419 	if (off <= len && vma->vm_end - vma->vm_start <= len - off &&
420 	    fb->board->mmap)
421 		ret = fb->board->mmap(fb, vma);
422 
423 	return ret;
424 }
425 
426 static struct fb_ops clcdfb_ops = {
427 	.owner		= THIS_MODULE,
428 	.fb_check_var	= clcdfb_check_var,
429 	.fb_set_par	= clcdfb_set_par,
430 	.fb_setcolreg	= clcdfb_setcolreg,
431 	.fb_blank	= clcdfb_blank,
432 	.fb_fillrect	= cfb_fillrect,
433 	.fb_copyarea	= cfb_copyarea,
434 	.fb_imageblit	= cfb_imageblit,
435 	.fb_mmap	= clcdfb_mmap,
436 };
437 
438 static int clcdfb_register(struct clcd_fb *fb)
439 {
440 	int ret;
441 
442 	/*
443 	 * ARM PL111 always has IENB at 0x1c; it's only PL110
444 	 * which is reversed on some platforms.
445 	 */
446 	if (amba_manf(fb->dev) == 0x41 && amba_part(fb->dev) == 0x111) {
447 		fb->off_ienb = CLCD_PL111_IENB;
448 		fb->off_cntl = CLCD_PL111_CNTL;
449 	} else {
450 		fb->off_ienb = CLCD_PL110_IENB;
451 		fb->off_cntl = CLCD_PL110_CNTL;
452 	}
453 
454 	fb->clk = clk_get(&fb->dev->dev, NULL);
455 	if (IS_ERR(fb->clk)) {
456 		ret = PTR_ERR(fb->clk);
457 		goto out;
458 	}
459 
460 	ret = clk_prepare(fb->clk);
461 	if (ret)
462 		goto free_clk;
463 
464 	fb->fb.device		= &fb->dev->dev;
465 
466 	fb->fb.fix.mmio_start	= fb->dev->res.start;
467 	fb->fb.fix.mmio_len	= resource_size(&fb->dev->res);
468 
469 	fb->regs = ioremap(fb->fb.fix.mmio_start, fb->fb.fix.mmio_len);
470 	if (!fb->regs) {
471 		printk(KERN_ERR "CLCD: unable to remap registers\n");
472 		ret = -ENOMEM;
473 		goto clk_unprep;
474 	}
475 
476 	fb->fb.fbops		= &clcdfb_ops;
477 	fb->fb.flags		= FBINFO_FLAG_DEFAULT;
478 	fb->fb.pseudo_palette	= fb->cmap;
479 
480 	strncpy(fb->fb.fix.id, clcd_name, sizeof(fb->fb.fix.id));
481 	fb->fb.fix.type		= FB_TYPE_PACKED_PIXELS;
482 	fb->fb.fix.type_aux	= 0;
483 	fb->fb.fix.xpanstep	= 0;
484 	fb->fb.fix.ypanstep	= 0;
485 	fb->fb.fix.ywrapstep	= 0;
486 	fb->fb.fix.accel	= FB_ACCEL_NONE;
487 
488 	fb->fb.var.xres		= fb->panel->mode.xres;
489 	fb->fb.var.yres		= fb->panel->mode.yres;
490 	fb->fb.var.xres_virtual	= fb->panel->mode.xres;
491 	fb->fb.var.yres_virtual	= fb->panel->mode.yres;
492 	fb->fb.var.bits_per_pixel = fb->panel->bpp;
493 	fb->fb.var.grayscale	= fb->panel->grayscale;
494 	fb->fb.var.pixclock	= fb->panel->mode.pixclock;
495 	fb->fb.var.left_margin	= fb->panel->mode.left_margin;
496 	fb->fb.var.right_margin	= fb->panel->mode.right_margin;
497 	fb->fb.var.upper_margin	= fb->panel->mode.upper_margin;
498 	fb->fb.var.lower_margin	= fb->panel->mode.lower_margin;
499 	fb->fb.var.hsync_len	= fb->panel->mode.hsync_len;
500 	fb->fb.var.vsync_len	= fb->panel->mode.vsync_len;
501 	fb->fb.var.sync		= fb->panel->mode.sync;
502 	fb->fb.var.vmode	= fb->panel->mode.vmode;
503 	fb->fb.var.activate	= FB_ACTIVATE_NOW;
504 	fb->fb.var.nonstd	= 0;
505 	fb->fb.var.height	= fb->panel->height;
506 	fb->fb.var.width	= fb->panel->width;
507 	fb->fb.var.accel_flags	= 0;
508 
509 	fb->fb.monspecs.hfmin	= 0;
510 	fb->fb.monspecs.hfmax   = 100000;
511 	fb->fb.monspecs.vfmin	= 0;
512 	fb->fb.monspecs.vfmax	= 400;
513 	fb->fb.monspecs.dclkmin = 1000000;
514 	fb->fb.monspecs.dclkmax	= 100000000;
515 
516 	/*
517 	 * Make sure that the bitfields are set appropriately.
518 	 */
519 	clcdfb_set_bitfields(fb, &fb->fb.var);
520 
521 	/*
522 	 * Allocate colourmap.
523 	 */
524 	ret = fb_alloc_cmap(&fb->fb.cmap, 256, 0);
525 	if (ret)
526 		goto unmap;
527 
528 	/*
529 	 * Ensure interrupts are disabled.
530 	 */
531 	writel(0, fb->regs + fb->off_ienb);
532 
533 	fb_set_var(&fb->fb, &fb->fb.var);
534 
535 	dev_info(&fb->dev->dev, "%s hardware, %s display\n",
536 	         fb->board->name, fb->panel->mode.name);
537 
538 	ret = register_framebuffer(&fb->fb);
539 	if (ret == 0)
540 		goto out;
541 
542 	printk(KERN_ERR "CLCD: cannot register framebuffer (%d)\n", ret);
543 
544 	fb_dealloc_cmap(&fb->fb.cmap);
545  unmap:
546 	iounmap(fb->regs);
547  clk_unprep:
548 	clk_unprepare(fb->clk);
549  free_clk:
550 	clk_put(fb->clk);
551  out:
552 	return ret;
553 }
554 
555 #ifdef CONFIG_OF
556 static int clcdfb_of_get_dpi_panel_mode(struct device_node *node,
557 		struct clcd_panel *clcd_panel)
558 {
559 	int err;
560 	struct display_timing timing;
561 	struct videomode video;
562 
563 	err = of_get_display_timing(node, "panel-timing", &timing);
564 	if (err)
565 		return err;
566 
567 	videomode_from_timing(&timing, &video);
568 
569 	err = fb_videomode_from_videomode(&video, &clcd_panel->mode);
570 	if (err)
571 		return err;
572 
573 	/* Set up some inversion flags */
574 	if (timing.flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
575 		clcd_panel->tim2 |= TIM2_IPC;
576 	else if (!(timing.flags & DISPLAY_FLAGS_PIXDATA_POSEDGE))
577 		/*
578 		 * To preserve backwards compatibility, the IPC (inverted
579 		 * pixel clock) flag needs to be set on any display that
580 		 * doesn't explicitly specify that the pixel clock is
581 		 * active on the negative or positive edge.
582 		 */
583 		clcd_panel->tim2 |= TIM2_IPC;
584 
585 	if (timing.flags & DISPLAY_FLAGS_HSYNC_LOW)
586 		clcd_panel->tim2 |= TIM2_IHS;
587 
588 	if (timing.flags & DISPLAY_FLAGS_VSYNC_LOW)
589 		clcd_panel->tim2 |= TIM2_IVS;
590 
591 	if (timing.flags & DISPLAY_FLAGS_DE_LOW)
592 		clcd_panel->tim2 |= TIM2_IOE;
593 
594 	return 0;
595 }
596 
597 static int clcdfb_snprintf_mode(char *buf, int size, struct fb_videomode *mode)
598 {
599 	return snprintf(buf, size, "%ux%u@%u", mode->xres, mode->yres,
600 			mode->refresh);
601 }
602 
603 static int clcdfb_of_get_backlight(struct device_node *panel,
604 				   struct clcd_panel *clcd_panel)
605 {
606 	struct device_node *backlight;
607 
608 	/* Look up the optional backlight phandle */
609 	backlight = of_parse_phandle(panel, "backlight", 0);
610 	if (backlight) {
611 		clcd_panel->backlight = of_find_backlight_by_node(backlight);
612 		of_node_put(backlight);
613 
614 		if (!clcd_panel->backlight)
615 			return -EPROBE_DEFER;
616 	}
617 	return 0;
618 }
619 
620 static int clcdfb_of_get_mode(struct device *dev, struct device_node *panel,
621 			      struct clcd_panel *clcd_panel)
622 {
623 	int err;
624 	struct fb_videomode *mode;
625 	char *name;
626 	int len;
627 
628 	/* Only directly connected DPI panels supported for now */
629 	if (of_device_is_compatible(panel, "panel-dpi"))
630 		err = clcdfb_of_get_dpi_panel_mode(panel, clcd_panel);
631 	else
632 		err = -ENOENT;
633 	if (err)
634 		return err;
635 	mode = &clcd_panel->mode;
636 
637 	len = clcdfb_snprintf_mode(NULL, 0, mode);
638 	name = devm_kzalloc(dev, len + 1, GFP_KERNEL);
639 	if (!name)
640 		return -ENOMEM;
641 
642 	clcdfb_snprintf_mode(name, len + 1, mode);
643 	mode->name = name;
644 
645 	return 0;
646 }
647 
648 static int clcdfb_of_init_tft_panel(struct clcd_fb *fb, u32 r0, u32 g0, u32 b0)
649 {
650 	static struct {
651 		unsigned int part;
652 		u32 r0, g0, b0;
653 		u32 caps;
654 	} panels[] = {
655 		{ 0x110, 1,  7, 13, CLCD_CAP_5551 },
656 		{ 0x110, 0,  8, 16, CLCD_CAP_888 },
657 		{ 0x110, 16, 8, 0,  CLCD_CAP_888 },
658 		{ 0x111, 4, 14, 20, CLCD_CAP_444 },
659 		{ 0x111, 3, 11, 19, CLCD_CAP_444 | CLCD_CAP_5551 },
660 		{ 0x111, 3, 10, 19, CLCD_CAP_444 | CLCD_CAP_5551 |
661 				    CLCD_CAP_565 },
662 		{ 0x111, 0,  8, 16, CLCD_CAP_444 | CLCD_CAP_5551 |
663 				    CLCD_CAP_565 | CLCD_CAP_888 },
664 	};
665 	int i;
666 
667 	/* Bypass pixel clock divider */
668 	fb->panel->tim2 |= TIM2_BCD;
669 
670 	/* TFT display, vert. comp. interrupt at the start of the back porch */
671 	fb->panel->cntl |= CNTL_LCDTFT | CNTL_LCDVCOMP(1);
672 
673 	fb->panel->caps = 0;
674 
675 	/* Match the setup with known variants */
676 	for (i = 0; i < ARRAY_SIZE(panels) && !fb->panel->caps; i++) {
677 		if (amba_part(fb->dev) != panels[i].part)
678 			continue;
679 		if (g0 != panels[i].g0)
680 			continue;
681 		if (r0 == panels[i].r0 && b0 == panels[i].b0)
682 			fb->panel->caps = panels[i].caps;
683 	}
684 
685 	/*
686 	 * If we actually physically connected the R lines to B and
687 	 * vice versa
688 	 */
689 	if (r0 != 0 && b0 == 0)
690 		fb->panel->bgr_connection = true;
691 
692 	return fb->panel->caps ? 0 : -EINVAL;
693 }
694 
695 static int clcdfb_of_init_display(struct clcd_fb *fb)
696 {
697 	struct device_node *endpoint, *panel;
698 	int err;
699 	unsigned int bpp;
700 	u32 max_bandwidth;
701 	u32 tft_r0b0g0[3];
702 
703 	fb->panel = devm_kzalloc(&fb->dev->dev, sizeof(*fb->panel), GFP_KERNEL);
704 	if (!fb->panel)
705 		return -ENOMEM;
706 
707 	/*
708 	 * Fetch the panel endpoint.
709 	 */
710 	endpoint = of_graph_get_next_endpoint(fb->dev->dev.of_node, NULL);
711 	if (!endpoint)
712 		return -ENODEV;
713 
714 	panel = of_graph_get_remote_port_parent(endpoint);
715 	if (!panel)
716 		return -ENODEV;
717 
718 	err = clcdfb_of_get_backlight(panel, fb->panel);
719 	if (err)
720 		return err;
721 
722 	err = clcdfb_of_get_mode(&fb->dev->dev, panel, fb->panel);
723 	if (err)
724 		return err;
725 
726 	err = of_property_read_u32(fb->dev->dev.of_node, "max-memory-bandwidth",
727 			&max_bandwidth);
728 	if (!err) {
729 		/*
730 		 * max_bandwidth is in bytes per second and pixclock in
731 		 * pico-seconds, so the maximum allowed bits per pixel is
732 		 *   8 * max_bandwidth / (PICOS2KHZ(pixclock) * 1000)
733 		 * Rearrange this calculation to avoid overflow and then ensure
734 		 * result is a valid format.
735 		 */
736 		bpp = max_bandwidth / (1000 / 8)
737 			/ PICOS2KHZ(fb->panel->mode.pixclock);
738 		bpp = rounddown_pow_of_two(bpp);
739 		if (bpp > 32)
740 			bpp = 32;
741 	} else
742 		bpp = 32;
743 	fb->panel->bpp = bpp;
744 
745 #ifdef CONFIG_CPU_BIG_ENDIAN
746 	fb->panel->cntl |= CNTL_BEBO;
747 #endif
748 	fb->panel->width = -1;
749 	fb->panel->height = -1;
750 
751 	if (of_property_read_u32_array(endpoint,
752 			"arm,pl11x,tft-r0g0b0-pads",
753 			tft_r0b0g0, ARRAY_SIZE(tft_r0b0g0)) != 0)
754 		return -ENOENT;
755 
756 	return clcdfb_of_init_tft_panel(fb, tft_r0b0g0[0],
757 					tft_r0b0g0[1],  tft_r0b0g0[2]);
758 }
759 
760 static int clcdfb_of_vram_setup(struct clcd_fb *fb)
761 {
762 	int err;
763 	struct device_node *memory;
764 	u64 size;
765 
766 	err = clcdfb_of_init_display(fb);
767 	if (err)
768 		return err;
769 
770 	memory = of_parse_phandle(fb->dev->dev.of_node, "memory-region", 0);
771 	if (!memory)
772 		return -ENODEV;
773 
774 	fb->fb.screen_base = of_iomap(memory, 0);
775 	if (!fb->fb.screen_base)
776 		return -ENOMEM;
777 
778 	fb->fb.fix.smem_start = of_translate_address(memory,
779 			of_get_address(memory, 0, &size, NULL));
780 	fb->fb.fix.smem_len = size;
781 
782 	return 0;
783 }
784 
785 static int clcdfb_of_vram_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
786 {
787 	unsigned long off, user_size, kernel_size;
788 
789 
790 	off = vma->vm_pgoff << PAGE_SHIFT;
791 	user_size = vma->vm_end - vma->vm_start;
792 	kernel_size = fb->fb.fix.smem_len;
793 
794 	if (off >= kernel_size || user_size > (kernel_size - off))
795 		return -ENXIO;
796 
797 	return remap_pfn_range(vma, vma->vm_start,
798 			__phys_to_pfn(fb->fb.fix.smem_start) + vma->vm_pgoff,
799 			user_size,
800 			pgprot_writecombine(vma->vm_page_prot));
801 }
802 
803 static void clcdfb_of_vram_remove(struct clcd_fb *fb)
804 {
805 	iounmap(fb->fb.screen_base);
806 }
807 
808 static int clcdfb_of_dma_setup(struct clcd_fb *fb)
809 {
810 	unsigned long framesize;
811 	dma_addr_t dma;
812 	int err;
813 
814 	err = clcdfb_of_init_display(fb);
815 	if (err)
816 		return err;
817 
818 	framesize = PAGE_ALIGN(fb->panel->mode.xres * fb->panel->mode.yres *
819 			fb->panel->bpp / 8);
820 	fb->fb.screen_base = dma_alloc_coherent(&fb->dev->dev, framesize,
821 			&dma, GFP_KERNEL);
822 	if (!fb->fb.screen_base)
823 		return -ENOMEM;
824 
825 	fb->fb.fix.smem_start = dma;
826 	fb->fb.fix.smem_len = framesize;
827 
828 	return 0;
829 }
830 
831 static int clcdfb_of_dma_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
832 {
833 	return dma_mmap_wc(&fb->dev->dev, vma, fb->fb.screen_base,
834 			   fb->fb.fix.smem_start, fb->fb.fix.smem_len);
835 }
836 
837 static void clcdfb_of_dma_remove(struct clcd_fb *fb)
838 {
839 	dma_free_coherent(&fb->dev->dev, fb->fb.fix.smem_len,
840 			fb->fb.screen_base, fb->fb.fix.smem_start);
841 }
842 
843 static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev)
844 {
845 	struct clcd_board *board = devm_kzalloc(&dev->dev, sizeof(*board),
846 			GFP_KERNEL);
847 	struct device_node *node = dev->dev.of_node;
848 
849 	if (!board)
850 		return NULL;
851 
852 	board->name = of_node_full_name(node);
853 	board->caps = CLCD_CAP_ALL;
854 	board->check = clcdfb_check;
855 	board->decode = clcdfb_decode;
856 	if (of_find_property(node, "memory-region", NULL)) {
857 		board->setup = clcdfb_of_vram_setup;
858 		board->mmap = clcdfb_of_vram_mmap;
859 		board->remove = clcdfb_of_vram_remove;
860 	} else {
861 		board->setup = clcdfb_of_dma_setup;
862 		board->mmap = clcdfb_of_dma_mmap;
863 		board->remove = clcdfb_of_dma_remove;
864 	}
865 
866 	return board;
867 }
868 #else
869 static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev)
870 {
871 	return NULL;
872 }
873 #endif
874 
875 static int clcdfb_probe(struct amba_device *dev, const struct amba_id *id)
876 {
877 	struct clcd_board *board = dev_get_platdata(&dev->dev);
878 	struct clcd_fb *fb;
879 	int ret;
880 
881 	if (!board)
882 		board = clcdfb_of_get_board(dev);
883 
884 	if (!board)
885 		return -EINVAL;
886 
887 	ret = dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32));
888 	if (ret)
889 		goto out;
890 
891 	ret = amba_request_regions(dev, NULL);
892 	if (ret) {
893 		printk(KERN_ERR "CLCD: unable to reserve regs region\n");
894 		goto out;
895 	}
896 
897 	fb = kzalloc(sizeof(*fb), GFP_KERNEL);
898 	if (!fb) {
899 		ret = -ENOMEM;
900 		goto free_region;
901 	}
902 
903 	fb->dev = dev;
904 	fb->board = board;
905 
906 	dev_info(&fb->dev->dev, "PL%03x designer %02x rev%u at 0x%08llx\n",
907 		amba_part(dev), amba_manf(dev), amba_rev(dev),
908 		(unsigned long long)dev->res.start);
909 
910 	ret = fb->board->setup(fb);
911 	if (ret)
912 		goto free_fb;
913 
914 	ret = clcdfb_register(fb);
915 	if (ret == 0) {
916 		amba_set_drvdata(dev, fb);
917 		goto out;
918 	}
919 
920 	fb->board->remove(fb);
921  free_fb:
922 	kfree(fb);
923  free_region:
924 	amba_release_regions(dev);
925  out:
926 	return ret;
927 }
928 
929 static int clcdfb_remove(struct amba_device *dev)
930 {
931 	struct clcd_fb *fb = amba_get_drvdata(dev);
932 
933 	clcdfb_disable(fb);
934 	unregister_framebuffer(&fb->fb);
935 	if (fb->fb.cmap.len)
936 		fb_dealloc_cmap(&fb->fb.cmap);
937 	iounmap(fb->regs);
938 	clk_unprepare(fb->clk);
939 	clk_put(fb->clk);
940 
941 	fb->board->remove(fb);
942 
943 	kfree(fb);
944 
945 	amba_release_regions(dev);
946 
947 	return 0;
948 }
949 
950 static const struct amba_id clcdfb_id_table[] = {
951 	{
952 		.id	= 0x00041110,
953 		.mask	= 0x000ffffe,
954 	},
955 	{ 0, 0 },
956 };
957 
958 MODULE_DEVICE_TABLE(amba, clcdfb_id_table);
959 
960 static struct amba_driver clcd_driver = {
961 	.drv 		= {
962 		.name	= "clcd-pl11x",
963 	},
964 	.probe		= clcdfb_probe,
965 	.remove		= clcdfb_remove,
966 	.id_table	= clcdfb_id_table,
967 };
968 
969 static int __init amba_clcdfb_init(void)
970 {
971 	if (fb_get_options("ambafb", NULL))
972 		return -ENODEV;
973 
974 	return amba_driver_register(&clcd_driver);
975 }
976 
977 module_init(amba_clcdfb_init);
978 
979 static void __exit amba_clcdfb_exit(void)
980 {
981 	amba_driver_unregister(&clcd_driver);
982 }
983 
984 module_exit(amba_clcdfb_exit);
985 
986 MODULE_DESCRIPTION("ARM PrimeCell PL110 CLCD core driver");
987 MODULE_LICENSE("GPL");
988