1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 Red Hat, Inc. All rights reserved. 4 * Author: Alex Williamson <alex.williamson@redhat.com> 5 * 6 * Derived from original vfio: 7 * Copyright 2010 Cisco Systems, Inc. All rights reserved. 8 * Author: Tom Lyon, pugs@cisco.com 9 */ 10 11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 12 13 #include <linux/aperture.h> 14 #include <linux/device.h> 15 #include <linux/eventfd.h> 16 #include <linux/file.h> 17 #include <linux/interrupt.h> 18 #include <linux/iommu.h> 19 #include <linux/module.h> 20 #include <linux/mutex.h> 21 #include <linux/notifier.h> 22 #include <linux/pci.h> 23 #include <linux/pm_runtime.h> 24 #include <linux/slab.h> 25 #include <linux/types.h> 26 #include <linux/uaccess.h> 27 #include <linux/vgaarb.h> 28 #include <linux/nospec.h> 29 #include <linux/sched/mm.h> 30 31 #include "vfio_pci_priv.h" 32 33 #define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>" 34 #define DRIVER_DESC "core driver for VFIO based PCI devices" 35 36 static bool nointxmask; 37 static bool disable_vga; 38 static bool disable_idle_d3; 39 40 /* List of PF's that vfio_pci_core_sriov_configure() has been called on */ 41 static DEFINE_MUTEX(vfio_pci_sriov_pfs_mutex); 42 static LIST_HEAD(vfio_pci_sriov_pfs); 43 44 struct vfio_pci_dummy_resource { 45 struct resource resource; 46 int index; 47 struct list_head res_next; 48 }; 49 50 struct vfio_pci_vf_token { 51 struct mutex lock; 52 uuid_t uuid; 53 int users; 54 }; 55 56 struct vfio_pci_mmap_vma { 57 struct vm_area_struct *vma; 58 struct list_head vma_next; 59 }; 60 61 static inline bool vfio_vga_disabled(void) 62 { 63 #ifdef CONFIG_VFIO_PCI_VGA 64 return disable_vga; 65 #else 66 return true; 67 #endif 68 } 69 70 /* 71 * Our VGA arbiter participation is limited since we don't know anything 72 * about the device itself. However, if the device is the only VGA device 73 * downstream of a bridge and VFIO VGA support is disabled, then we can 74 * safely return legacy VGA IO and memory as not decoded since the user 75 * has no way to get to it and routing can be disabled externally at the 76 * bridge. 77 */ 78 static unsigned int vfio_pci_set_decode(struct pci_dev *pdev, bool single_vga) 79 { 80 struct pci_dev *tmp = NULL; 81 unsigned char max_busnr; 82 unsigned int decodes; 83 84 if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus)) 85 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM | 86 VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM; 87 88 max_busnr = pci_bus_max_busnr(pdev->bus); 89 decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; 90 91 while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) { 92 if (tmp == pdev || 93 pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) || 94 pci_is_root_bus(tmp->bus)) 95 continue; 96 97 if (tmp->bus->number >= pdev->bus->number && 98 tmp->bus->number <= max_busnr) { 99 pci_dev_put(tmp); 100 decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM; 101 break; 102 } 103 } 104 105 return decodes; 106 } 107 108 static void vfio_pci_probe_mmaps(struct vfio_pci_core_device *vdev) 109 { 110 struct resource *res; 111 int i; 112 struct vfio_pci_dummy_resource *dummy_res; 113 114 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 115 int bar = i + PCI_STD_RESOURCES; 116 117 res = &vdev->pdev->resource[bar]; 118 119 if (!IS_ENABLED(CONFIG_VFIO_PCI_MMAP)) 120 goto no_mmap; 121 122 if (!(res->flags & IORESOURCE_MEM)) 123 goto no_mmap; 124 125 /* 126 * The PCI core shouldn't set up a resource with a 127 * type but zero size. But there may be bugs that 128 * cause us to do that. 129 */ 130 if (!resource_size(res)) 131 goto no_mmap; 132 133 if (resource_size(res) >= PAGE_SIZE) { 134 vdev->bar_mmap_supported[bar] = true; 135 continue; 136 } 137 138 if (!(res->start & ~PAGE_MASK)) { 139 /* 140 * Add a dummy resource to reserve the remainder 141 * of the exclusive page in case that hot-add 142 * device's bar is assigned into it. 143 */ 144 dummy_res = kzalloc(sizeof(*dummy_res), GFP_KERNEL); 145 if (dummy_res == NULL) 146 goto no_mmap; 147 148 dummy_res->resource.name = "vfio sub-page reserved"; 149 dummy_res->resource.start = res->end + 1; 150 dummy_res->resource.end = res->start + PAGE_SIZE - 1; 151 dummy_res->resource.flags = res->flags; 152 if (request_resource(res->parent, 153 &dummy_res->resource)) { 154 kfree(dummy_res); 155 goto no_mmap; 156 } 157 dummy_res->index = bar; 158 list_add(&dummy_res->res_next, 159 &vdev->dummy_resources_list); 160 vdev->bar_mmap_supported[bar] = true; 161 continue; 162 } 163 /* 164 * Here we don't handle the case when the BAR is not page 165 * aligned because we can't expect the BAR will be 166 * assigned into the same location in a page in guest 167 * when we passthrough the BAR. And it's hard to access 168 * this BAR in userspace because we have no way to get 169 * the BAR's location in a page. 170 */ 171 no_mmap: 172 vdev->bar_mmap_supported[bar] = false; 173 } 174 } 175 176 struct vfio_pci_group_info; 177 static void vfio_pci_dev_set_try_reset(struct vfio_device_set *dev_set); 178 static int vfio_pci_dev_set_hot_reset(struct vfio_device_set *dev_set, 179 struct vfio_pci_group_info *groups); 180 181 /* 182 * INTx masking requires the ability to disable INTx signaling via PCI_COMMAND 183 * _and_ the ability detect when the device is asserting INTx via PCI_STATUS. 184 * If a device implements the former but not the latter we would typically 185 * expect broken_intx_masking be set and require an exclusive interrupt. 186 * However since we do have control of the device's ability to assert INTx, 187 * we can instead pretend that the device does not implement INTx, virtualizing 188 * the pin register to report zero and maintaining DisINTx set on the host. 189 */ 190 static bool vfio_pci_nointx(struct pci_dev *pdev) 191 { 192 switch (pdev->vendor) { 193 case PCI_VENDOR_ID_INTEL: 194 switch (pdev->device) { 195 /* All i40e (XL710/X710/XXV710) 10/20/25/40GbE NICs */ 196 case 0x1572: 197 case 0x1574: 198 case 0x1580 ... 0x1581: 199 case 0x1583 ... 0x158b: 200 case 0x37d0 ... 0x37d2: 201 /* X550 */ 202 case 0x1563: 203 return true; 204 default: 205 return false; 206 } 207 } 208 209 return false; 210 } 211 212 static void vfio_pci_probe_power_state(struct vfio_pci_core_device *vdev) 213 { 214 struct pci_dev *pdev = vdev->pdev; 215 u16 pmcsr; 216 217 if (!pdev->pm_cap) 218 return; 219 220 pci_read_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, &pmcsr); 221 222 vdev->needs_pm_restore = !(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET); 223 } 224 225 /* 226 * pci_set_power_state() wrapper handling devices which perform a soft reset on 227 * D3->D0 transition. Save state prior to D0/1/2->D3, stash it on the vdev, 228 * restore when returned to D0. Saved separately from pci_saved_state for use 229 * by PM capability emulation and separately from pci_dev internal saved state 230 * to avoid it being overwritten and consumed around other resets. 231 */ 232 int vfio_pci_set_power_state(struct vfio_pci_core_device *vdev, pci_power_t state) 233 { 234 struct pci_dev *pdev = vdev->pdev; 235 bool needs_restore = false, needs_save = false; 236 int ret; 237 238 /* Prevent changing power state for PFs with VFs enabled */ 239 if (pci_num_vf(pdev) && state > PCI_D0) 240 return -EBUSY; 241 242 if (vdev->needs_pm_restore) { 243 if (pdev->current_state < PCI_D3hot && state >= PCI_D3hot) { 244 pci_save_state(pdev); 245 needs_save = true; 246 } 247 248 if (pdev->current_state >= PCI_D3hot && state <= PCI_D0) 249 needs_restore = true; 250 } 251 252 ret = pci_set_power_state(pdev, state); 253 254 if (!ret) { 255 /* D3 might be unsupported via quirk, skip unless in D3 */ 256 if (needs_save && pdev->current_state >= PCI_D3hot) { 257 /* 258 * The current PCI state will be saved locally in 259 * 'pm_save' during the D3hot transition. When the 260 * device state is changed to D0 again with the current 261 * function, then pci_store_saved_state() will restore 262 * the state and will free the memory pointed by 263 * 'pm_save'. There are few cases where the PCI power 264 * state can be changed to D0 without the involvement 265 * of the driver. For these cases, free the earlier 266 * allocated memory first before overwriting 'pm_save' 267 * to prevent the memory leak. 268 */ 269 kfree(vdev->pm_save); 270 vdev->pm_save = pci_store_saved_state(pdev); 271 } else if (needs_restore) { 272 pci_load_and_free_saved_state(pdev, &vdev->pm_save); 273 pci_restore_state(pdev); 274 } 275 } 276 277 return ret; 278 } 279 280 static int vfio_pci_runtime_pm_entry(struct vfio_pci_core_device *vdev, 281 struct eventfd_ctx *efdctx) 282 { 283 /* 284 * The vdev power related flags are protected with 'memory_lock' 285 * semaphore. 286 */ 287 vfio_pci_zap_and_down_write_memory_lock(vdev); 288 if (vdev->pm_runtime_engaged) { 289 up_write(&vdev->memory_lock); 290 return -EINVAL; 291 } 292 293 vdev->pm_runtime_engaged = true; 294 vdev->pm_wake_eventfd_ctx = efdctx; 295 pm_runtime_put_noidle(&vdev->pdev->dev); 296 up_write(&vdev->memory_lock); 297 298 return 0; 299 } 300 301 static int vfio_pci_core_pm_entry(struct vfio_device *device, u32 flags, 302 void __user *arg, size_t argsz) 303 { 304 struct vfio_pci_core_device *vdev = 305 container_of(device, struct vfio_pci_core_device, vdev); 306 int ret; 307 308 ret = vfio_check_feature(flags, argsz, VFIO_DEVICE_FEATURE_SET, 0); 309 if (ret != 1) 310 return ret; 311 312 /* 313 * Inside vfio_pci_runtime_pm_entry(), only the runtime PM usage count 314 * will be decremented. The pm_runtime_put() will be invoked again 315 * while returning from the ioctl and then the device can go into 316 * runtime suspended state. 317 */ 318 return vfio_pci_runtime_pm_entry(vdev, NULL); 319 } 320 321 static int vfio_pci_core_pm_entry_with_wakeup( 322 struct vfio_device *device, u32 flags, 323 struct vfio_device_low_power_entry_with_wakeup __user *arg, 324 size_t argsz) 325 { 326 struct vfio_pci_core_device *vdev = 327 container_of(device, struct vfio_pci_core_device, vdev); 328 struct vfio_device_low_power_entry_with_wakeup entry; 329 struct eventfd_ctx *efdctx; 330 int ret; 331 332 ret = vfio_check_feature(flags, argsz, VFIO_DEVICE_FEATURE_SET, 333 sizeof(entry)); 334 if (ret != 1) 335 return ret; 336 337 if (copy_from_user(&entry, arg, sizeof(entry))) 338 return -EFAULT; 339 340 if (entry.wakeup_eventfd < 0) 341 return -EINVAL; 342 343 efdctx = eventfd_ctx_fdget(entry.wakeup_eventfd); 344 if (IS_ERR(efdctx)) 345 return PTR_ERR(efdctx); 346 347 ret = vfio_pci_runtime_pm_entry(vdev, efdctx); 348 if (ret) 349 eventfd_ctx_put(efdctx); 350 351 return ret; 352 } 353 354 static void __vfio_pci_runtime_pm_exit(struct vfio_pci_core_device *vdev) 355 { 356 if (vdev->pm_runtime_engaged) { 357 vdev->pm_runtime_engaged = false; 358 pm_runtime_get_noresume(&vdev->pdev->dev); 359 360 if (vdev->pm_wake_eventfd_ctx) { 361 eventfd_ctx_put(vdev->pm_wake_eventfd_ctx); 362 vdev->pm_wake_eventfd_ctx = NULL; 363 } 364 } 365 } 366 367 static void vfio_pci_runtime_pm_exit(struct vfio_pci_core_device *vdev) 368 { 369 /* 370 * The vdev power related flags are protected with 'memory_lock' 371 * semaphore. 372 */ 373 down_write(&vdev->memory_lock); 374 __vfio_pci_runtime_pm_exit(vdev); 375 up_write(&vdev->memory_lock); 376 } 377 378 static int vfio_pci_core_pm_exit(struct vfio_device *device, u32 flags, 379 void __user *arg, size_t argsz) 380 { 381 struct vfio_pci_core_device *vdev = 382 container_of(device, struct vfio_pci_core_device, vdev); 383 int ret; 384 385 ret = vfio_check_feature(flags, argsz, VFIO_DEVICE_FEATURE_SET, 0); 386 if (ret != 1) 387 return ret; 388 389 /* 390 * The device is always in the active state here due to pm wrappers 391 * around ioctls. If the device had entered a low power state and 392 * pm_wake_eventfd_ctx is valid, vfio_pci_core_runtime_resume() has 393 * already signaled the eventfd and exited low power mode itself. 394 * pm_runtime_engaged protects the redundant call here. 395 */ 396 vfio_pci_runtime_pm_exit(vdev); 397 return 0; 398 } 399 400 #ifdef CONFIG_PM 401 static int vfio_pci_core_runtime_suspend(struct device *dev) 402 { 403 struct vfio_pci_core_device *vdev = dev_get_drvdata(dev); 404 405 down_write(&vdev->memory_lock); 406 /* 407 * The user can move the device into D3hot state before invoking 408 * power management IOCTL. Move the device into D0 state here and then 409 * the pci-driver core runtime PM suspend function will move the device 410 * into the low power state. Also, for the devices which have 411 * NoSoftRst-, it will help in restoring the original state 412 * (saved locally in 'vdev->pm_save'). 413 */ 414 vfio_pci_set_power_state(vdev, PCI_D0); 415 up_write(&vdev->memory_lock); 416 417 /* 418 * If INTx is enabled, then mask INTx before going into the runtime 419 * suspended state and unmask the same in the runtime resume. 420 * If INTx has already been masked by the user, then 421 * vfio_pci_intx_mask() will return false and in that case, INTx 422 * should not be unmasked in the runtime resume. 423 */ 424 vdev->pm_intx_masked = ((vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX) && 425 vfio_pci_intx_mask(vdev)); 426 427 return 0; 428 } 429 430 static int vfio_pci_core_runtime_resume(struct device *dev) 431 { 432 struct vfio_pci_core_device *vdev = dev_get_drvdata(dev); 433 434 /* 435 * Resume with a pm_wake_eventfd_ctx signals the eventfd and exit 436 * low power mode. 437 */ 438 down_write(&vdev->memory_lock); 439 if (vdev->pm_wake_eventfd_ctx) { 440 eventfd_signal(vdev->pm_wake_eventfd_ctx, 1); 441 __vfio_pci_runtime_pm_exit(vdev); 442 } 443 up_write(&vdev->memory_lock); 444 445 if (vdev->pm_intx_masked) 446 vfio_pci_intx_unmask(vdev); 447 448 return 0; 449 } 450 #endif /* CONFIG_PM */ 451 452 /* 453 * The pci-driver core runtime PM routines always save the device state 454 * before going into suspended state. If the device is going into low power 455 * state with only with runtime PM ops, then no explicit handling is needed 456 * for the devices which have NoSoftRst-. 457 */ 458 static const struct dev_pm_ops vfio_pci_core_pm_ops = { 459 SET_RUNTIME_PM_OPS(vfio_pci_core_runtime_suspend, 460 vfio_pci_core_runtime_resume, 461 NULL) 462 }; 463 464 int vfio_pci_core_enable(struct vfio_pci_core_device *vdev) 465 { 466 struct pci_dev *pdev = vdev->pdev; 467 int ret; 468 u16 cmd; 469 u8 msix_pos; 470 471 if (!disable_idle_d3) { 472 ret = pm_runtime_resume_and_get(&pdev->dev); 473 if (ret < 0) 474 return ret; 475 } 476 477 /* Don't allow our initial saved state to include busmaster */ 478 pci_clear_master(pdev); 479 480 ret = pci_enable_device(pdev); 481 if (ret) 482 goto out_power; 483 484 /* If reset fails because of the device lock, fail this path entirely */ 485 ret = pci_try_reset_function(pdev); 486 if (ret == -EAGAIN) 487 goto out_disable_device; 488 489 vdev->reset_works = !ret; 490 pci_save_state(pdev); 491 vdev->pci_saved_state = pci_store_saved_state(pdev); 492 if (!vdev->pci_saved_state) 493 pci_dbg(pdev, "%s: Couldn't store saved state\n", __func__); 494 495 if (likely(!nointxmask)) { 496 if (vfio_pci_nointx(pdev)) { 497 pci_info(pdev, "Masking broken INTx support\n"); 498 vdev->nointx = true; 499 pci_intx(pdev, 0); 500 } else 501 vdev->pci_2_3 = pci_intx_mask_supported(pdev); 502 } 503 504 pci_read_config_word(pdev, PCI_COMMAND, &cmd); 505 if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) { 506 cmd &= ~PCI_COMMAND_INTX_DISABLE; 507 pci_write_config_word(pdev, PCI_COMMAND, cmd); 508 } 509 510 ret = vfio_pci_zdev_open_device(vdev); 511 if (ret) 512 goto out_free_state; 513 514 ret = vfio_config_init(vdev); 515 if (ret) 516 goto out_free_zdev; 517 518 msix_pos = pdev->msix_cap; 519 if (msix_pos) { 520 u16 flags; 521 u32 table; 522 523 pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags); 524 pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table); 525 526 vdev->msix_bar = table & PCI_MSIX_TABLE_BIR; 527 vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET; 528 vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16; 529 } else 530 vdev->msix_bar = 0xFF; 531 532 if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev)) 533 vdev->has_vga = true; 534 535 536 return 0; 537 538 out_free_zdev: 539 vfio_pci_zdev_close_device(vdev); 540 out_free_state: 541 kfree(vdev->pci_saved_state); 542 vdev->pci_saved_state = NULL; 543 out_disable_device: 544 pci_disable_device(pdev); 545 out_power: 546 if (!disable_idle_d3) 547 pm_runtime_put(&pdev->dev); 548 return ret; 549 } 550 EXPORT_SYMBOL_GPL(vfio_pci_core_enable); 551 552 void vfio_pci_core_disable(struct vfio_pci_core_device *vdev) 553 { 554 struct pci_dev *pdev = vdev->pdev; 555 struct vfio_pci_dummy_resource *dummy_res, *tmp; 556 struct vfio_pci_ioeventfd *ioeventfd, *ioeventfd_tmp; 557 int i, bar; 558 559 /* For needs_reset */ 560 lockdep_assert_held(&vdev->vdev.dev_set->lock); 561 562 /* 563 * This function can be invoked while the power state is non-D0. 564 * This non-D0 power state can be with or without runtime PM. 565 * vfio_pci_runtime_pm_exit() will internally increment the usage 566 * count corresponding to pm_runtime_put() called during low power 567 * feature entry and then pm_runtime_resume() will wake up the device, 568 * if the device has already gone into the suspended state. Otherwise, 569 * the vfio_pci_set_power_state() will change the device power state 570 * to D0. 571 */ 572 vfio_pci_runtime_pm_exit(vdev); 573 pm_runtime_resume(&pdev->dev); 574 575 /* 576 * This function calls __pci_reset_function_locked() which internally 577 * can use pci_pm_reset() for the function reset. pci_pm_reset() will 578 * fail if the power state is non-D0. Also, for the devices which 579 * have NoSoftRst-, the reset function can cause the PCI config space 580 * reset without restoring the original state (saved locally in 581 * 'vdev->pm_save'). 582 */ 583 vfio_pci_set_power_state(vdev, PCI_D0); 584 585 /* Stop the device from further DMA */ 586 pci_clear_master(pdev); 587 588 vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE | 589 VFIO_IRQ_SET_ACTION_TRIGGER, 590 vdev->irq_type, 0, 0, NULL); 591 592 /* Device closed, don't need mutex here */ 593 list_for_each_entry_safe(ioeventfd, ioeventfd_tmp, 594 &vdev->ioeventfds_list, next) { 595 vfio_virqfd_disable(&ioeventfd->virqfd); 596 list_del(&ioeventfd->next); 597 kfree(ioeventfd); 598 } 599 vdev->ioeventfds_nr = 0; 600 601 vdev->virq_disabled = false; 602 603 for (i = 0; i < vdev->num_regions; i++) 604 vdev->region[i].ops->release(vdev, &vdev->region[i]); 605 606 vdev->num_regions = 0; 607 kfree(vdev->region); 608 vdev->region = NULL; /* don't krealloc a freed pointer */ 609 610 vfio_config_free(vdev); 611 612 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 613 bar = i + PCI_STD_RESOURCES; 614 if (!vdev->barmap[bar]) 615 continue; 616 pci_iounmap(pdev, vdev->barmap[bar]); 617 pci_release_selected_regions(pdev, 1 << bar); 618 vdev->barmap[bar] = NULL; 619 } 620 621 list_for_each_entry_safe(dummy_res, tmp, 622 &vdev->dummy_resources_list, res_next) { 623 list_del(&dummy_res->res_next); 624 release_resource(&dummy_res->resource); 625 kfree(dummy_res); 626 } 627 628 vdev->needs_reset = true; 629 630 vfio_pci_zdev_close_device(vdev); 631 632 /* 633 * If we have saved state, restore it. If we can reset the device, 634 * even better. Resetting with current state seems better than 635 * nothing, but saving and restoring current state without reset 636 * is just busy work. 637 */ 638 if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) { 639 pci_info(pdev, "%s: Couldn't reload saved state\n", __func__); 640 641 if (!vdev->reset_works) 642 goto out; 643 644 pci_save_state(pdev); 645 } 646 647 /* 648 * Disable INTx and MSI, presumably to avoid spurious interrupts 649 * during reset. Stolen from pci_reset_function() 650 */ 651 pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE); 652 653 /* 654 * Try to get the locks ourselves to prevent a deadlock. The 655 * success of this is dependent on being able to lock the device, 656 * which is not always possible. 657 * We can not use the "try" reset interface here, which will 658 * overwrite the previously restored configuration information. 659 */ 660 if (vdev->reset_works && pci_dev_trylock(pdev)) { 661 if (!__pci_reset_function_locked(pdev)) 662 vdev->needs_reset = false; 663 pci_dev_unlock(pdev); 664 } 665 666 pci_restore_state(pdev); 667 out: 668 pci_disable_device(pdev); 669 670 vfio_pci_dev_set_try_reset(vdev->vdev.dev_set); 671 672 /* Put the pm-runtime usage counter acquired during enable */ 673 if (!disable_idle_d3) 674 pm_runtime_put(&pdev->dev); 675 } 676 EXPORT_SYMBOL_GPL(vfio_pci_core_disable); 677 678 void vfio_pci_core_close_device(struct vfio_device *core_vdev) 679 { 680 struct vfio_pci_core_device *vdev = 681 container_of(core_vdev, struct vfio_pci_core_device, vdev); 682 683 if (vdev->sriov_pf_core_dev) { 684 mutex_lock(&vdev->sriov_pf_core_dev->vf_token->lock); 685 WARN_ON(!vdev->sriov_pf_core_dev->vf_token->users); 686 vdev->sriov_pf_core_dev->vf_token->users--; 687 mutex_unlock(&vdev->sriov_pf_core_dev->vf_token->lock); 688 } 689 vfio_spapr_pci_eeh_release(vdev->pdev); 690 vfio_pci_core_disable(vdev); 691 692 mutex_lock(&vdev->igate); 693 if (vdev->err_trigger) { 694 eventfd_ctx_put(vdev->err_trigger); 695 vdev->err_trigger = NULL; 696 } 697 if (vdev->req_trigger) { 698 eventfd_ctx_put(vdev->req_trigger); 699 vdev->req_trigger = NULL; 700 } 701 mutex_unlock(&vdev->igate); 702 } 703 EXPORT_SYMBOL_GPL(vfio_pci_core_close_device); 704 705 void vfio_pci_core_finish_enable(struct vfio_pci_core_device *vdev) 706 { 707 vfio_pci_probe_mmaps(vdev); 708 vfio_spapr_pci_eeh_open(vdev->pdev); 709 710 if (vdev->sriov_pf_core_dev) { 711 mutex_lock(&vdev->sriov_pf_core_dev->vf_token->lock); 712 vdev->sriov_pf_core_dev->vf_token->users++; 713 mutex_unlock(&vdev->sriov_pf_core_dev->vf_token->lock); 714 } 715 } 716 EXPORT_SYMBOL_GPL(vfio_pci_core_finish_enable); 717 718 static int vfio_pci_get_irq_count(struct vfio_pci_core_device *vdev, int irq_type) 719 { 720 if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) { 721 u8 pin; 722 723 if (!IS_ENABLED(CONFIG_VFIO_PCI_INTX) || 724 vdev->nointx || vdev->pdev->is_virtfn) 725 return 0; 726 727 pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin); 728 729 return pin ? 1 : 0; 730 } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) { 731 u8 pos; 732 u16 flags; 733 734 pos = vdev->pdev->msi_cap; 735 if (pos) { 736 pci_read_config_word(vdev->pdev, 737 pos + PCI_MSI_FLAGS, &flags); 738 return 1 << ((flags & PCI_MSI_FLAGS_QMASK) >> 1); 739 } 740 } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) { 741 u8 pos; 742 u16 flags; 743 744 pos = vdev->pdev->msix_cap; 745 if (pos) { 746 pci_read_config_word(vdev->pdev, 747 pos + PCI_MSIX_FLAGS, &flags); 748 749 return (flags & PCI_MSIX_FLAGS_QSIZE) + 1; 750 } 751 } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) { 752 if (pci_is_pcie(vdev->pdev)) 753 return 1; 754 } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) { 755 return 1; 756 } 757 758 return 0; 759 } 760 761 static int vfio_pci_count_devs(struct pci_dev *pdev, void *data) 762 { 763 (*(int *)data)++; 764 return 0; 765 } 766 767 struct vfio_pci_fill_info { 768 int max; 769 int cur; 770 struct vfio_pci_dependent_device *devices; 771 }; 772 773 static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data) 774 { 775 struct vfio_pci_fill_info *fill = data; 776 struct iommu_group *iommu_group; 777 778 if (fill->cur == fill->max) 779 return -EAGAIN; /* Something changed, try again */ 780 781 iommu_group = iommu_group_get(&pdev->dev); 782 if (!iommu_group) 783 return -EPERM; /* Cannot reset non-isolated devices */ 784 785 fill->devices[fill->cur].group_id = iommu_group_id(iommu_group); 786 fill->devices[fill->cur].segment = pci_domain_nr(pdev->bus); 787 fill->devices[fill->cur].bus = pdev->bus->number; 788 fill->devices[fill->cur].devfn = pdev->devfn; 789 fill->cur++; 790 iommu_group_put(iommu_group); 791 return 0; 792 } 793 794 struct vfio_pci_group_info { 795 int count; 796 struct file **files; 797 }; 798 799 static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot *slot) 800 { 801 for (; pdev; pdev = pdev->bus->self) 802 if (pdev->bus == slot->bus) 803 return (pdev->slot == slot); 804 return false; 805 } 806 807 struct vfio_pci_walk_info { 808 int (*fn)(struct pci_dev *pdev, void *data); 809 void *data; 810 struct pci_dev *pdev; 811 bool slot; 812 int ret; 813 }; 814 815 static int vfio_pci_walk_wrapper(struct pci_dev *pdev, void *data) 816 { 817 struct vfio_pci_walk_info *walk = data; 818 819 if (!walk->slot || vfio_pci_dev_below_slot(pdev, walk->pdev->slot)) 820 walk->ret = walk->fn(pdev, walk->data); 821 822 return walk->ret; 823 } 824 825 static int vfio_pci_for_each_slot_or_bus(struct pci_dev *pdev, 826 int (*fn)(struct pci_dev *, 827 void *data), void *data, 828 bool slot) 829 { 830 struct vfio_pci_walk_info walk = { 831 .fn = fn, .data = data, .pdev = pdev, .slot = slot, .ret = 0, 832 }; 833 834 pci_walk_bus(pdev->bus, vfio_pci_walk_wrapper, &walk); 835 836 return walk.ret; 837 } 838 839 static int msix_mmappable_cap(struct vfio_pci_core_device *vdev, 840 struct vfio_info_cap *caps) 841 { 842 struct vfio_info_cap_header header = { 843 .id = VFIO_REGION_INFO_CAP_MSIX_MAPPABLE, 844 .version = 1 845 }; 846 847 return vfio_info_add_capability(caps, &header, sizeof(header)); 848 } 849 850 int vfio_pci_core_register_dev_region(struct vfio_pci_core_device *vdev, 851 unsigned int type, unsigned int subtype, 852 const struct vfio_pci_regops *ops, 853 size_t size, u32 flags, void *data) 854 { 855 struct vfio_pci_region *region; 856 857 region = krealloc(vdev->region, 858 (vdev->num_regions + 1) * sizeof(*region), 859 GFP_KERNEL); 860 if (!region) 861 return -ENOMEM; 862 863 vdev->region = region; 864 vdev->region[vdev->num_regions].type = type; 865 vdev->region[vdev->num_regions].subtype = subtype; 866 vdev->region[vdev->num_regions].ops = ops; 867 vdev->region[vdev->num_regions].size = size; 868 vdev->region[vdev->num_regions].flags = flags; 869 vdev->region[vdev->num_regions].data = data; 870 871 vdev->num_regions++; 872 873 return 0; 874 } 875 EXPORT_SYMBOL_GPL(vfio_pci_core_register_dev_region); 876 877 static int vfio_pci_ioctl_get_info(struct vfio_pci_core_device *vdev, 878 struct vfio_device_info __user *arg) 879 { 880 unsigned long minsz = offsetofend(struct vfio_device_info, num_irqs); 881 struct vfio_device_info info; 882 struct vfio_info_cap caps = { .buf = NULL, .size = 0 }; 883 unsigned long capsz; 884 int ret; 885 886 /* For backward compatibility, cannot require this */ 887 capsz = offsetofend(struct vfio_iommu_type1_info, cap_offset); 888 889 if (copy_from_user(&info, arg, minsz)) 890 return -EFAULT; 891 892 if (info.argsz < minsz) 893 return -EINVAL; 894 895 if (info.argsz >= capsz) { 896 minsz = capsz; 897 info.cap_offset = 0; 898 } 899 900 info.flags = VFIO_DEVICE_FLAGS_PCI; 901 902 if (vdev->reset_works) 903 info.flags |= VFIO_DEVICE_FLAGS_RESET; 904 905 info.num_regions = VFIO_PCI_NUM_REGIONS + vdev->num_regions; 906 info.num_irqs = VFIO_PCI_NUM_IRQS; 907 908 ret = vfio_pci_info_zdev_add_caps(vdev, &caps); 909 if (ret && ret != -ENODEV) { 910 pci_warn(vdev->pdev, 911 "Failed to setup zPCI info capabilities\n"); 912 return ret; 913 } 914 915 if (caps.size) { 916 info.flags |= VFIO_DEVICE_FLAGS_CAPS; 917 if (info.argsz < sizeof(info) + caps.size) { 918 info.argsz = sizeof(info) + caps.size; 919 } else { 920 vfio_info_cap_shift(&caps, sizeof(info)); 921 if (copy_to_user(arg + 1, caps.buf, caps.size)) { 922 kfree(caps.buf); 923 return -EFAULT; 924 } 925 info.cap_offset = sizeof(*arg); 926 } 927 928 kfree(caps.buf); 929 } 930 931 return copy_to_user(arg, &info, minsz) ? -EFAULT : 0; 932 } 933 934 static int vfio_pci_ioctl_get_region_info(struct vfio_pci_core_device *vdev, 935 struct vfio_region_info __user *arg) 936 { 937 unsigned long minsz = offsetofend(struct vfio_region_info, offset); 938 struct pci_dev *pdev = vdev->pdev; 939 struct vfio_region_info info; 940 struct vfio_info_cap caps = { .buf = NULL, .size = 0 }; 941 int i, ret; 942 943 if (copy_from_user(&info, arg, minsz)) 944 return -EFAULT; 945 946 if (info.argsz < minsz) 947 return -EINVAL; 948 949 switch (info.index) { 950 case VFIO_PCI_CONFIG_REGION_INDEX: 951 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index); 952 info.size = pdev->cfg_size; 953 info.flags = VFIO_REGION_INFO_FLAG_READ | 954 VFIO_REGION_INFO_FLAG_WRITE; 955 break; 956 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX: 957 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index); 958 info.size = pci_resource_len(pdev, info.index); 959 if (!info.size) { 960 info.flags = 0; 961 break; 962 } 963 964 info.flags = VFIO_REGION_INFO_FLAG_READ | 965 VFIO_REGION_INFO_FLAG_WRITE; 966 if (vdev->bar_mmap_supported[info.index]) { 967 info.flags |= VFIO_REGION_INFO_FLAG_MMAP; 968 if (info.index == vdev->msix_bar) { 969 ret = msix_mmappable_cap(vdev, &caps); 970 if (ret) 971 return ret; 972 } 973 } 974 975 break; 976 case VFIO_PCI_ROM_REGION_INDEX: { 977 void __iomem *io; 978 size_t size; 979 u16 cmd; 980 981 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index); 982 info.flags = 0; 983 984 /* Report the BAR size, not the ROM size */ 985 info.size = pci_resource_len(pdev, info.index); 986 if (!info.size) { 987 /* Shadow ROMs appear as PCI option ROMs */ 988 if (pdev->resource[PCI_ROM_RESOURCE].flags & 989 IORESOURCE_ROM_SHADOW) 990 info.size = 0x20000; 991 else 992 break; 993 } 994 995 /* 996 * Is it really there? Enable memory decode for implicit access 997 * in pci_map_rom(). 998 */ 999 cmd = vfio_pci_memory_lock_and_enable(vdev); 1000 io = pci_map_rom(pdev, &size); 1001 if (io) { 1002 info.flags = VFIO_REGION_INFO_FLAG_READ; 1003 pci_unmap_rom(pdev, io); 1004 } else { 1005 info.size = 0; 1006 } 1007 vfio_pci_memory_unlock_and_restore(vdev, cmd); 1008 1009 break; 1010 } 1011 case VFIO_PCI_VGA_REGION_INDEX: 1012 if (!vdev->has_vga) 1013 return -EINVAL; 1014 1015 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index); 1016 info.size = 0xc0000; 1017 info.flags = VFIO_REGION_INFO_FLAG_READ | 1018 VFIO_REGION_INFO_FLAG_WRITE; 1019 1020 break; 1021 default: { 1022 struct vfio_region_info_cap_type cap_type = { 1023 .header.id = VFIO_REGION_INFO_CAP_TYPE, 1024 .header.version = 1 1025 }; 1026 1027 if (info.index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions) 1028 return -EINVAL; 1029 info.index = array_index_nospec( 1030 info.index, VFIO_PCI_NUM_REGIONS + vdev->num_regions); 1031 1032 i = info.index - VFIO_PCI_NUM_REGIONS; 1033 1034 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index); 1035 info.size = vdev->region[i].size; 1036 info.flags = vdev->region[i].flags; 1037 1038 cap_type.type = vdev->region[i].type; 1039 cap_type.subtype = vdev->region[i].subtype; 1040 1041 ret = vfio_info_add_capability(&caps, &cap_type.header, 1042 sizeof(cap_type)); 1043 if (ret) 1044 return ret; 1045 1046 if (vdev->region[i].ops->add_capability) { 1047 ret = vdev->region[i].ops->add_capability( 1048 vdev, &vdev->region[i], &caps); 1049 if (ret) 1050 return ret; 1051 } 1052 } 1053 } 1054 1055 if (caps.size) { 1056 info.flags |= VFIO_REGION_INFO_FLAG_CAPS; 1057 if (info.argsz < sizeof(info) + caps.size) { 1058 info.argsz = sizeof(info) + caps.size; 1059 info.cap_offset = 0; 1060 } else { 1061 vfio_info_cap_shift(&caps, sizeof(info)); 1062 if (copy_to_user(arg + 1, caps.buf, caps.size)) { 1063 kfree(caps.buf); 1064 return -EFAULT; 1065 } 1066 info.cap_offset = sizeof(*arg); 1067 } 1068 1069 kfree(caps.buf); 1070 } 1071 1072 return copy_to_user(arg, &info, minsz) ? -EFAULT : 0; 1073 } 1074 1075 static int vfio_pci_ioctl_get_irq_info(struct vfio_pci_core_device *vdev, 1076 struct vfio_irq_info __user *arg) 1077 { 1078 unsigned long minsz = offsetofend(struct vfio_irq_info, count); 1079 struct vfio_irq_info info; 1080 1081 if (copy_from_user(&info, arg, minsz)) 1082 return -EFAULT; 1083 1084 if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS) 1085 return -EINVAL; 1086 1087 switch (info.index) { 1088 case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX: 1089 case VFIO_PCI_REQ_IRQ_INDEX: 1090 break; 1091 case VFIO_PCI_ERR_IRQ_INDEX: 1092 if (pci_is_pcie(vdev->pdev)) 1093 break; 1094 fallthrough; 1095 default: 1096 return -EINVAL; 1097 } 1098 1099 info.flags = VFIO_IRQ_INFO_EVENTFD; 1100 1101 info.count = vfio_pci_get_irq_count(vdev, info.index); 1102 1103 if (info.index == VFIO_PCI_INTX_IRQ_INDEX) 1104 info.flags |= 1105 (VFIO_IRQ_INFO_MASKABLE | VFIO_IRQ_INFO_AUTOMASKED); 1106 else 1107 info.flags |= VFIO_IRQ_INFO_NORESIZE; 1108 1109 return copy_to_user(arg, &info, minsz) ? -EFAULT : 0; 1110 } 1111 1112 static int vfio_pci_ioctl_set_irqs(struct vfio_pci_core_device *vdev, 1113 struct vfio_irq_set __user *arg) 1114 { 1115 unsigned long minsz = offsetofend(struct vfio_irq_set, count); 1116 struct vfio_irq_set hdr; 1117 u8 *data = NULL; 1118 int max, ret = 0; 1119 size_t data_size = 0; 1120 1121 if (copy_from_user(&hdr, arg, minsz)) 1122 return -EFAULT; 1123 1124 max = vfio_pci_get_irq_count(vdev, hdr.index); 1125 1126 ret = vfio_set_irqs_validate_and_prepare(&hdr, max, VFIO_PCI_NUM_IRQS, 1127 &data_size); 1128 if (ret) 1129 return ret; 1130 1131 if (data_size) { 1132 data = memdup_user(&arg->data, data_size); 1133 if (IS_ERR(data)) 1134 return PTR_ERR(data); 1135 } 1136 1137 mutex_lock(&vdev->igate); 1138 1139 ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index, hdr.start, 1140 hdr.count, data); 1141 1142 mutex_unlock(&vdev->igate); 1143 kfree(data); 1144 1145 return ret; 1146 } 1147 1148 static int vfio_pci_ioctl_reset(struct vfio_pci_core_device *vdev, 1149 void __user *arg) 1150 { 1151 int ret; 1152 1153 if (!vdev->reset_works) 1154 return -EINVAL; 1155 1156 vfio_pci_zap_and_down_write_memory_lock(vdev); 1157 1158 /* 1159 * This function can be invoked while the power state is non-D0. If 1160 * pci_try_reset_function() has been called while the power state is 1161 * non-D0, then pci_try_reset_function() will internally set the power 1162 * state to D0 without vfio driver involvement. For the devices which 1163 * have NoSoftRst-, the reset function can cause the PCI config space 1164 * reset without restoring the original state (saved locally in 1165 * 'vdev->pm_save'). 1166 */ 1167 vfio_pci_set_power_state(vdev, PCI_D0); 1168 1169 ret = pci_try_reset_function(vdev->pdev); 1170 up_write(&vdev->memory_lock); 1171 1172 return ret; 1173 } 1174 1175 static int vfio_pci_ioctl_get_pci_hot_reset_info( 1176 struct vfio_pci_core_device *vdev, 1177 struct vfio_pci_hot_reset_info __user *arg) 1178 { 1179 unsigned long minsz = 1180 offsetofend(struct vfio_pci_hot_reset_info, count); 1181 struct vfio_pci_hot_reset_info hdr; 1182 struct vfio_pci_fill_info fill = { 0 }; 1183 struct vfio_pci_dependent_device *devices = NULL; 1184 bool slot = false; 1185 int ret = 0; 1186 1187 if (copy_from_user(&hdr, arg, minsz)) 1188 return -EFAULT; 1189 1190 if (hdr.argsz < minsz) 1191 return -EINVAL; 1192 1193 hdr.flags = 0; 1194 1195 /* Can we do a slot or bus reset or neither? */ 1196 if (!pci_probe_reset_slot(vdev->pdev->slot)) 1197 slot = true; 1198 else if (pci_probe_reset_bus(vdev->pdev->bus)) 1199 return -ENODEV; 1200 1201 /* How many devices are affected? */ 1202 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs, 1203 &fill.max, slot); 1204 if (ret) 1205 return ret; 1206 1207 WARN_ON(!fill.max); /* Should always be at least one */ 1208 1209 /* 1210 * If there's enough space, fill it now, otherwise return -ENOSPC and 1211 * the number of devices affected. 1212 */ 1213 if (hdr.argsz < sizeof(hdr) + (fill.max * sizeof(*devices))) { 1214 ret = -ENOSPC; 1215 hdr.count = fill.max; 1216 goto reset_info_exit; 1217 } 1218 1219 devices = kcalloc(fill.max, sizeof(*devices), GFP_KERNEL); 1220 if (!devices) 1221 return -ENOMEM; 1222 1223 fill.devices = devices; 1224 1225 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_fill_devs, 1226 &fill, slot); 1227 1228 /* 1229 * If a device was removed between counting and filling, we may come up 1230 * short of fill.max. If a device was added, we'll have a return of 1231 * -EAGAIN above. 1232 */ 1233 if (!ret) 1234 hdr.count = fill.cur; 1235 1236 reset_info_exit: 1237 if (copy_to_user(arg, &hdr, minsz)) 1238 ret = -EFAULT; 1239 1240 if (!ret) { 1241 if (copy_to_user(&arg->devices, devices, 1242 hdr.count * sizeof(*devices))) 1243 ret = -EFAULT; 1244 } 1245 1246 kfree(devices); 1247 return ret; 1248 } 1249 1250 static int vfio_pci_ioctl_pci_hot_reset(struct vfio_pci_core_device *vdev, 1251 struct vfio_pci_hot_reset __user *arg) 1252 { 1253 unsigned long minsz = offsetofend(struct vfio_pci_hot_reset, count); 1254 struct vfio_pci_hot_reset hdr; 1255 int32_t *group_fds; 1256 struct file **files; 1257 struct vfio_pci_group_info info; 1258 bool slot = false; 1259 int file_idx, count = 0, ret = 0; 1260 1261 if (copy_from_user(&hdr, arg, minsz)) 1262 return -EFAULT; 1263 1264 if (hdr.argsz < minsz || hdr.flags) 1265 return -EINVAL; 1266 1267 /* Can we do a slot or bus reset or neither? */ 1268 if (!pci_probe_reset_slot(vdev->pdev->slot)) 1269 slot = true; 1270 else if (pci_probe_reset_bus(vdev->pdev->bus)) 1271 return -ENODEV; 1272 1273 /* 1274 * We can't let userspace give us an arbitrarily large buffer to copy, 1275 * so verify how many we think there could be. Note groups can have 1276 * multiple devices so one group per device is the max. 1277 */ 1278 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs, 1279 &count, slot); 1280 if (ret) 1281 return ret; 1282 1283 /* Somewhere between 1 and count is OK */ 1284 if (!hdr.count || hdr.count > count) 1285 return -EINVAL; 1286 1287 group_fds = kcalloc(hdr.count, sizeof(*group_fds), GFP_KERNEL); 1288 files = kcalloc(hdr.count, sizeof(*files), GFP_KERNEL); 1289 if (!group_fds || !files) { 1290 kfree(group_fds); 1291 kfree(files); 1292 return -ENOMEM; 1293 } 1294 1295 if (copy_from_user(group_fds, arg->group_fds, 1296 hdr.count * sizeof(*group_fds))) { 1297 kfree(group_fds); 1298 kfree(files); 1299 return -EFAULT; 1300 } 1301 1302 /* 1303 * For each group_fd, get the group through the vfio external user 1304 * interface and store the group and iommu ID. This ensures the group 1305 * is held across the reset. 1306 */ 1307 for (file_idx = 0; file_idx < hdr.count; file_idx++) { 1308 struct file *file = fget(group_fds[file_idx]); 1309 1310 if (!file) { 1311 ret = -EBADF; 1312 break; 1313 } 1314 1315 /* Ensure the FD is a vfio group FD.*/ 1316 if (!vfio_file_is_group(file)) { 1317 fput(file); 1318 ret = -EINVAL; 1319 break; 1320 } 1321 1322 files[file_idx] = file; 1323 } 1324 1325 kfree(group_fds); 1326 1327 /* release reference to groups on error */ 1328 if (ret) 1329 goto hot_reset_release; 1330 1331 info.count = hdr.count; 1332 info.files = files; 1333 1334 ret = vfio_pci_dev_set_hot_reset(vdev->vdev.dev_set, &info); 1335 1336 hot_reset_release: 1337 for (file_idx--; file_idx >= 0; file_idx--) 1338 fput(files[file_idx]); 1339 1340 kfree(files); 1341 return ret; 1342 } 1343 1344 static int vfio_pci_ioctl_ioeventfd(struct vfio_pci_core_device *vdev, 1345 struct vfio_device_ioeventfd __user *arg) 1346 { 1347 unsigned long minsz = offsetofend(struct vfio_device_ioeventfd, fd); 1348 struct vfio_device_ioeventfd ioeventfd; 1349 int count; 1350 1351 if (copy_from_user(&ioeventfd, arg, minsz)) 1352 return -EFAULT; 1353 1354 if (ioeventfd.argsz < minsz) 1355 return -EINVAL; 1356 1357 if (ioeventfd.flags & ~VFIO_DEVICE_IOEVENTFD_SIZE_MASK) 1358 return -EINVAL; 1359 1360 count = ioeventfd.flags & VFIO_DEVICE_IOEVENTFD_SIZE_MASK; 1361 1362 if (hweight8(count) != 1 || ioeventfd.fd < -1) 1363 return -EINVAL; 1364 1365 return vfio_pci_ioeventfd(vdev, ioeventfd.offset, ioeventfd.data, count, 1366 ioeventfd.fd); 1367 } 1368 1369 long vfio_pci_core_ioctl(struct vfio_device *core_vdev, unsigned int cmd, 1370 unsigned long arg) 1371 { 1372 struct vfio_pci_core_device *vdev = 1373 container_of(core_vdev, struct vfio_pci_core_device, vdev); 1374 void __user *uarg = (void __user *)arg; 1375 1376 switch (cmd) { 1377 case VFIO_DEVICE_GET_INFO: 1378 return vfio_pci_ioctl_get_info(vdev, uarg); 1379 case VFIO_DEVICE_GET_IRQ_INFO: 1380 return vfio_pci_ioctl_get_irq_info(vdev, uarg); 1381 case VFIO_DEVICE_GET_PCI_HOT_RESET_INFO: 1382 return vfio_pci_ioctl_get_pci_hot_reset_info(vdev, uarg); 1383 case VFIO_DEVICE_GET_REGION_INFO: 1384 return vfio_pci_ioctl_get_region_info(vdev, uarg); 1385 case VFIO_DEVICE_IOEVENTFD: 1386 return vfio_pci_ioctl_ioeventfd(vdev, uarg); 1387 case VFIO_DEVICE_PCI_HOT_RESET: 1388 return vfio_pci_ioctl_pci_hot_reset(vdev, uarg); 1389 case VFIO_DEVICE_RESET: 1390 return vfio_pci_ioctl_reset(vdev, uarg); 1391 case VFIO_DEVICE_SET_IRQS: 1392 return vfio_pci_ioctl_set_irqs(vdev, uarg); 1393 default: 1394 return -ENOTTY; 1395 } 1396 } 1397 EXPORT_SYMBOL_GPL(vfio_pci_core_ioctl); 1398 1399 static int vfio_pci_core_feature_token(struct vfio_device *device, u32 flags, 1400 uuid_t __user *arg, size_t argsz) 1401 { 1402 struct vfio_pci_core_device *vdev = 1403 container_of(device, struct vfio_pci_core_device, vdev); 1404 uuid_t uuid; 1405 int ret; 1406 1407 if (!vdev->vf_token) 1408 return -ENOTTY; 1409 /* 1410 * We do not support GET of the VF Token UUID as this could 1411 * expose the token of the previous device user. 1412 */ 1413 ret = vfio_check_feature(flags, argsz, VFIO_DEVICE_FEATURE_SET, 1414 sizeof(uuid)); 1415 if (ret != 1) 1416 return ret; 1417 1418 if (copy_from_user(&uuid, arg, sizeof(uuid))) 1419 return -EFAULT; 1420 1421 mutex_lock(&vdev->vf_token->lock); 1422 uuid_copy(&vdev->vf_token->uuid, &uuid); 1423 mutex_unlock(&vdev->vf_token->lock); 1424 return 0; 1425 } 1426 1427 int vfio_pci_core_ioctl_feature(struct vfio_device *device, u32 flags, 1428 void __user *arg, size_t argsz) 1429 { 1430 switch (flags & VFIO_DEVICE_FEATURE_MASK) { 1431 case VFIO_DEVICE_FEATURE_LOW_POWER_ENTRY: 1432 return vfio_pci_core_pm_entry(device, flags, arg, argsz); 1433 case VFIO_DEVICE_FEATURE_LOW_POWER_ENTRY_WITH_WAKEUP: 1434 return vfio_pci_core_pm_entry_with_wakeup(device, flags, 1435 arg, argsz); 1436 case VFIO_DEVICE_FEATURE_LOW_POWER_EXIT: 1437 return vfio_pci_core_pm_exit(device, flags, arg, argsz); 1438 case VFIO_DEVICE_FEATURE_PCI_VF_TOKEN: 1439 return vfio_pci_core_feature_token(device, flags, arg, argsz); 1440 default: 1441 return -ENOTTY; 1442 } 1443 } 1444 EXPORT_SYMBOL_GPL(vfio_pci_core_ioctl_feature); 1445 1446 static ssize_t vfio_pci_rw(struct vfio_pci_core_device *vdev, char __user *buf, 1447 size_t count, loff_t *ppos, bool iswrite) 1448 { 1449 unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos); 1450 int ret; 1451 1452 if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions) 1453 return -EINVAL; 1454 1455 ret = pm_runtime_resume_and_get(&vdev->pdev->dev); 1456 if (ret) { 1457 pci_info_ratelimited(vdev->pdev, "runtime resume failed %d\n", 1458 ret); 1459 return -EIO; 1460 } 1461 1462 switch (index) { 1463 case VFIO_PCI_CONFIG_REGION_INDEX: 1464 ret = vfio_pci_config_rw(vdev, buf, count, ppos, iswrite); 1465 break; 1466 1467 case VFIO_PCI_ROM_REGION_INDEX: 1468 if (iswrite) 1469 ret = -EINVAL; 1470 else 1471 ret = vfio_pci_bar_rw(vdev, buf, count, ppos, false); 1472 break; 1473 1474 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX: 1475 ret = vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite); 1476 break; 1477 1478 case VFIO_PCI_VGA_REGION_INDEX: 1479 ret = vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite); 1480 break; 1481 1482 default: 1483 index -= VFIO_PCI_NUM_REGIONS; 1484 ret = vdev->region[index].ops->rw(vdev, buf, 1485 count, ppos, iswrite); 1486 break; 1487 } 1488 1489 pm_runtime_put(&vdev->pdev->dev); 1490 return ret; 1491 } 1492 1493 ssize_t vfio_pci_core_read(struct vfio_device *core_vdev, char __user *buf, 1494 size_t count, loff_t *ppos) 1495 { 1496 struct vfio_pci_core_device *vdev = 1497 container_of(core_vdev, struct vfio_pci_core_device, vdev); 1498 1499 if (!count) 1500 return 0; 1501 1502 return vfio_pci_rw(vdev, buf, count, ppos, false); 1503 } 1504 EXPORT_SYMBOL_GPL(vfio_pci_core_read); 1505 1506 ssize_t vfio_pci_core_write(struct vfio_device *core_vdev, const char __user *buf, 1507 size_t count, loff_t *ppos) 1508 { 1509 struct vfio_pci_core_device *vdev = 1510 container_of(core_vdev, struct vfio_pci_core_device, vdev); 1511 1512 if (!count) 1513 return 0; 1514 1515 return vfio_pci_rw(vdev, (char __user *)buf, count, ppos, true); 1516 } 1517 EXPORT_SYMBOL_GPL(vfio_pci_core_write); 1518 1519 /* Return 1 on zap and vma_lock acquired, 0 on contention (only with @try) */ 1520 static int vfio_pci_zap_and_vma_lock(struct vfio_pci_core_device *vdev, bool try) 1521 { 1522 struct vfio_pci_mmap_vma *mmap_vma, *tmp; 1523 1524 /* 1525 * Lock ordering: 1526 * vma_lock is nested under mmap_lock for vm_ops callback paths. 1527 * The memory_lock semaphore is used by both code paths calling 1528 * into this function to zap vmas and the vm_ops.fault callback 1529 * to protect the memory enable state of the device. 1530 * 1531 * When zapping vmas we need to maintain the mmap_lock => vma_lock 1532 * ordering, which requires using vma_lock to walk vma_list to 1533 * acquire an mm, then dropping vma_lock to get the mmap_lock and 1534 * reacquiring vma_lock. This logic is derived from similar 1535 * requirements in uverbs_user_mmap_disassociate(). 1536 * 1537 * mmap_lock must always be the top-level lock when it is taken. 1538 * Therefore we can only hold the memory_lock write lock when 1539 * vma_list is empty, as we'd need to take mmap_lock to clear 1540 * entries. vma_list can only be guaranteed empty when holding 1541 * vma_lock, thus memory_lock is nested under vma_lock. 1542 * 1543 * This enables the vm_ops.fault callback to acquire vma_lock, 1544 * followed by memory_lock read lock, while already holding 1545 * mmap_lock without risk of deadlock. 1546 */ 1547 while (1) { 1548 struct mm_struct *mm = NULL; 1549 1550 if (try) { 1551 if (!mutex_trylock(&vdev->vma_lock)) 1552 return 0; 1553 } else { 1554 mutex_lock(&vdev->vma_lock); 1555 } 1556 while (!list_empty(&vdev->vma_list)) { 1557 mmap_vma = list_first_entry(&vdev->vma_list, 1558 struct vfio_pci_mmap_vma, 1559 vma_next); 1560 mm = mmap_vma->vma->vm_mm; 1561 if (mmget_not_zero(mm)) 1562 break; 1563 1564 list_del(&mmap_vma->vma_next); 1565 kfree(mmap_vma); 1566 mm = NULL; 1567 } 1568 if (!mm) 1569 return 1; 1570 mutex_unlock(&vdev->vma_lock); 1571 1572 if (try) { 1573 if (!mmap_read_trylock(mm)) { 1574 mmput(mm); 1575 return 0; 1576 } 1577 } else { 1578 mmap_read_lock(mm); 1579 } 1580 if (try) { 1581 if (!mutex_trylock(&vdev->vma_lock)) { 1582 mmap_read_unlock(mm); 1583 mmput(mm); 1584 return 0; 1585 } 1586 } else { 1587 mutex_lock(&vdev->vma_lock); 1588 } 1589 list_for_each_entry_safe(mmap_vma, tmp, 1590 &vdev->vma_list, vma_next) { 1591 struct vm_area_struct *vma = mmap_vma->vma; 1592 1593 if (vma->vm_mm != mm) 1594 continue; 1595 1596 list_del(&mmap_vma->vma_next); 1597 kfree(mmap_vma); 1598 1599 zap_vma_ptes(vma, vma->vm_start, 1600 vma->vm_end - vma->vm_start); 1601 } 1602 mutex_unlock(&vdev->vma_lock); 1603 mmap_read_unlock(mm); 1604 mmput(mm); 1605 } 1606 } 1607 1608 void vfio_pci_zap_and_down_write_memory_lock(struct vfio_pci_core_device *vdev) 1609 { 1610 vfio_pci_zap_and_vma_lock(vdev, false); 1611 down_write(&vdev->memory_lock); 1612 mutex_unlock(&vdev->vma_lock); 1613 } 1614 1615 u16 vfio_pci_memory_lock_and_enable(struct vfio_pci_core_device *vdev) 1616 { 1617 u16 cmd; 1618 1619 down_write(&vdev->memory_lock); 1620 pci_read_config_word(vdev->pdev, PCI_COMMAND, &cmd); 1621 if (!(cmd & PCI_COMMAND_MEMORY)) 1622 pci_write_config_word(vdev->pdev, PCI_COMMAND, 1623 cmd | PCI_COMMAND_MEMORY); 1624 1625 return cmd; 1626 } 1627 1628 void vfio_pci_memory_unlock_and_restore(struct vfio_pci_core_device *vdev, u16 cmd) 1629 { 1630 pci_write_config_word(vdev->pdev, PCI_COMMAND, cmd); 1631 up_write(&vdev->memory_lock); 1632 } 1633 1634 /* Caller holds vma_lock */ 1635 static int __vfio_pci_add_vma(struct vfio_pci_core_device *vdev, 1636 struct vm_area_struct *vma) 1637 { 1638 struct vfio_pci_mmap_vma *mmap_vma; 1639 1640 mmap_vma = kmalloc(sizeof(*mmap_vma), GFP_KERNEL); 1641 if (!mmap_vma) 1642 return -ENOMEM; 1643 1644 mmap_vma->vma = vma; 1645 list_add(&mmap_vma->vma_next, &vdev->vma_list); 1646 1647 return 0; 1648 } 1649 1650 /* 1651 * Zap mmaps on open so that we can fault them in on access and therefore 1652 * our vma_list only tracks mappings accessed since last zap. 1653 */ 1654 static void vfio_pci_mmap_open(struct vm_area_struct *vma) 1655 { 1656 zap_vma_ptes(vma, vma->vm_start, vma->vm_end - vma->vm_start); 1657 } 1658 1659 static void vfio_pci_mmap_close(struct vm_area_struct *vma) 1660 { 1661 struct vfio_pci_core_device *vdev = vma->vm_private_data; 1662 struct vfio_pci_mmap_vma *mmap_vma; 1663 1664 mutex_lock(&vdev->vma_lock); 1665 list_for_each_entry(mmap_vma, &vdev->vma_list, vma_next) { 1666 if (mmap_vma->vma == vma) { 1667 list_del(&mmap_vma->vma_next); 1668 kfree(mmap_vma); 1669 break; 1670 } 1671 } 1672 mutex_unlock(&vdev->vma_lock); 1673 } 1674 1675 static vm_fault_t vfio_pci_mmap_fault(struct vm_fault *vmf) 1676 { 1677 struct vm_area_struct *vma = vmf->vma; 1678 struct vfio_pci_core_device *vdev = vma->vm_private_data; 1679 struct vfio_pci_mmap_vma *mmap_vma; 1680 vm_fault_t ret = VM_FAULT_NOPAGE; 1681 1682 mutex_lock(&vdev->vma_lock); 1683 down_read(&vdev->memory_lock); 1684 1685 /* 1686 * Memory region cannot be accessed if the low power feature is engaged 1687 * or memory access is disabled. 1688 */ 1689 if (vdev->pm_runtime_engaged || !__vfio_pci_memory_enabled(vdev)) { 1690 ret = VM_FAULT_SIGBUS; 1691 goto up_out; 1692 } 1693 1694 /* 1695 * We populate the whole vma on fault, so we need to test whether 1696 * the vma has already been mapped, such as for concurrent faults 1697 * to the same vma. io_remap_pfn_range() will trigger a BUG_ON if 1698 * we ask it to fill the same range again. 1699 */ 1700 list_for_each_entry(mmap_vma, &vdev->vma_list, vma_next) { 1701 if (mmap_vma->vma == vma) 1702 goto up_out; 1703 } 1704 1705 if (io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, 1706 vma->vm_end - vma->vm_start, 1707 vma->vm_page_prot)) { 1708 ret = VM_FAULT_SIGBUS; 1709 zap_vma_ptes(vma, vma->vm_start, vma->vm_end - vma->vm_start); 1710 goto up_out; 1711 } 1712 1713 if (__vfio_pci_add_vma(vdev, vma)) { 1714 ret = VM_FAULT_OOM; 1715 zap_vma_ptes(vma, vma->vm_start, vma->vm_end - vma->vm_start); 1716 } 1717 1718 up_out: 1719 up_read(&vdev->memory_lock); 1720 mutex_unlock(&vdev->vma_lock); 1721 return ret; 1722 } 1723 1724 static const struct vm_operations_struct vfio_pci_mmap_ops = { 1725 .open = vfio_pci_mmap_open, 1726 .close = vfio_pci_mmap_close, 1727 .fault = vfio_pci_mmap_fault, 1728 }; 1729 1730 int vfio_pci_core_mmap(struct vfio_device *core_vdev, struct vm_area_struct *vma) 1731 { 1732 struct vfio_pci_core_device *vdev = 1733 container_of(core_vdev, struct vfio_pci_core_device, vdev); 1734 struct pci_dev *pdev = vdev->pdev; 1735 unsigned int index; 1736 u64 phys_len, req_len, pgoff, req_start; 1737 int ret; 1738 1739 index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT); 1740 1741 if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions) 1742 return -EINVAL; 1743 if (vma->vm_end < vma->vm_start) 1744 return -EINVAL; 1745 if ((vma->vm_flags & VM_SHARED) == 0) 1746 return -EINVAL; 1747 if (index >= VFIO_PCI_NUM_REGIONS) { 1748 int regnum = index - VFIO_PCI_NUM_REGIONS; 1749 struct vfio_pci_region *region = vdev->region + regnum; 1750 1751 if (region->ops && region->ops->mmap && 1752 (region->flags & VFIO_REGION_INFO_FLAG_MMAP)) 1753 return region->ops->mmap(vdev, region, vma); 1754 return -EINVAL; 1755 } 1756 if (index >= VFIO_PCI_ROM_REGION_INDEX) 1757 return -EINVAL; 1758 if (!vdev->bar_mmap_supported[index]) 1759 return -EINVAL; 1760 1761 phys_len = PAGE_ALIGN(pci_resource_len(pdev, index)); 1762 req_len = vma->vm_end - vma->vm_start; 1763 pgoff = vma->vm_pgoff & 1764 ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1); 1765 req_start = pgoff << PAGE_SHIFT; 1766 1767 if (req_start + req_len > phys_len) 1768 return -EINVAL; 1769 1770 /* 1771 * Even though we don't make use of the barmap for the mmap, 1772 * we need to request the region and the barmap tracks that. 1773 */ 1774 if (!vdev->barmap[index]) { 1775 ret = pci_request_selected_regions(pdev, 1776 1 << index, "vfio-pci"); 1777 if (ret) 1778 return ret; 1779 1780 vdev->barmap[index] = pci_iomap(pdev, index, 0); 1781 if (!vdev->barmap[index]) { 1782 pci_release_selected_regions(pdev, 1 << index); 1783 return -ENOMEM; 1784 } 1785 } 1786 1787 vma->vm_private_data = vdev; 1788 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 1789 vma->vm_pgoff = (pci_resource_start(pdev, index) >> PAGE_SHIFT) + pgoff; 1790 1791 /* 1792 * See remap_pfn_range(), called from vfio_pci_fault() but we can't 1793 * change vm_flags within the fault handler. Set them now. 1794 */ 1795 vma->vm_flags |= VM_IO | VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP; 1796 vma->vm_ops = &vfio_pci_mmap_ops; 1797 1798 return 0; 1799 } 1800 EXPORT_SYMBOL_GPL(vfio_pci_core_mmap); 1801 1802 void vfio_pci_core_request(struct vfio_device *core_vdev, unsigned int count) 1803 { 1804 struct vfio_pci_core_device *vdev = 1805 container_of(core_vdev, struct vfio_pci_core_device, vdev); 1806 struct pci_dev *pdev = vdev->pdev; 1807 1808 mutex_lock(&vdev->igate); 1809 1810 if (vdev->req_trigger) { 1811 if (!(count % 10)) 1812 pci_notice_ratelimited(pdev, 1813 "Relaying device request to user (#%u)\n", 1814 count); 1815 eventfd_signal(vdev->req_trigger, 1); 1816 } else if (count == 0) { 1817 pci_warn(pdev, 1818 "No device request channel registered, blocked until released by user\n"); 1819 } 1820 1821 mutex_unlock(&vdev->igate); 1822 } 1823 EXPORT_SYMBOL_GPL(vfio_pci_core_request); 1824 1825 static int vfio_pci_validate_vf_token(struct vfio_pci_core_device *vdev, 1826 bool vf_token, uuid_t *uuid) 1827 { 1828 /* 1829 * There's always some degree of trust or collaboration between SR-IOV 1830 * PF and VFs, even if just that the PF hosts the SR-IOV capability and 1831 * can disrupt VFs with a reset, but often the PF has more explicit 1832 * access to deny service to the VF or access data passed through the 1833 * VF. We therefore require an opt-in via a shared VF token (UUID) to 1834 * represent this trust. This both prevents that a VF driver might 1835 * assume the PF driver is a trusted, in-kernel driver, and also that 1836 * a PF driver might be replaced with a rogue driver, unknown to in-use 1837 * VF drivers. 1838 * 1839 * Therefore when presented with a VF, if the PF is a vfio device and 1840 * it is bound to the vfio-pci driver, the user needs to provide a VF 1841 * token to access the device, in the form of appending a vf_token to 1842 * the device name, for example: 1843 * 1844 * "0000:04:10.0 vf_token=bd8d9d2b-5a5f-4f5a-a211-f591514ba1f3" 1845 * 1846 * When presented with a PF which has VFs in use, the user must also 1847 * provide the current VF token to prove collaboration with existing 1848 * VF users. If VFs are not in use, the VF token provided for the PF 1849 * device will act to set the VF token. 1850 * 1851 * If the VF token is provided but unused, an error is generated. 1852 */ 1853 if (vdev->pdev->is_virtfn) { 1854 struct vfio_pci_core_device *pf_vdev = vdev->sriov_pf_core_dev; 1855 bool match; 1856 1857 if (!pf_vdev) { 1858 if (!vf_token) 1859 return 0; /* PF is not vfio-pci, no VF token */ 1860 1861 pci_info_ratelimited(vdev->pdev, 1862 "VF token incorrectly provided, PF not bound to vfio-pci\n"); 1863 return -EINVAL; 1864 } 1865 1866 if (!vf_token) { 1867 pci_info_ratelimited(vdev->pdev, 1868 "VF token required to access device\n"); 1869 return -EACCES; 1870 } 1871 1872 mutex_lock(&pf_vdev->vf_token->lock); 1873 match = uuid_equal(uuid, &pf_vdev->vf_token->uuid); 1874 mutex_unlock(&pf_vdev->vf_token->lock); 1875 1876 if (!match) { 1877 pci_info_ratelimited(vdev->pdev, 1878 "Incorrect VF token provided for device\n"); 1879 return -EACCES; 1880 } 1881 } else if (vdev->vf_token) { 1882 mutex_lock(&vdev->vf_token->lock); 1883 if (vdev->vf_token->users) { 1884 if (!vf_token) { 1885 mutex_unlock(&vdev->vf_token->lock); 1886 pci_info_ratelimited(vdev->pdev, 1887 "VF token required to access device\n"); 1888 return -EACCES; 1889 } 1890 1891 if (!uuid_equal(uuid, &vdev->vf_token->uuid)) { 1892 mutex_unlock(&vdev->vf_token->lock); 1893 pci_info_ratelimited(vdev->pdev, 1894 "Incorrect VF token provided for device\n"); 1895 return -EACCES; 1896 } 1897 } else if (vf_token) { 1898 uuid_copy(&vdev->vf_token->uuid, uuid); 1899 } 1900 1901 mutex_unlock(&vdev->vf_token->lock); 1902 } else if (vf_token) { 1903 pci_info_ratelimited(vdev->pdev, 1904 "VF token incorrectly provided, not a PF or VF\n"); 1905 return -EINVAL; 1906 } 1907 1908 return 0; 1909 } 1910 1911 #define VF_TOKEN_ARG "vf_token=" 1912 1913 int vfio_pci_core_match(struct vfio_device *core_vdev, char *buf) 1914 { 1915 struct vfio_pci_core_device *vdev = 1916 container_of(core_vdev, struct vfio_pci_core_device, vdev); 1917 bool vf_token = false; 1918 uuid_t uuid; 1919 int ret; 1920 1921 if (strncmp(pci_name(vdev->pdev), buf, strlen(pci_name(vdev->pdev)))) 1922 return 0; /* No match */ 1923 1924 if (strlen(buf) > strlen(pci_name(vdev->pdev))) { 1925 buf += strlen(pci_name(vdev->pdev)); 1926 1927 if (*buf != ' ') 1928 return 0; /* No match: non-whitespace after name */ 1929 1930 while (*buf) { 1931 if (*buf == ' ') { 1932 buf++; 1933 continue; 1934 } 1935 1936 if (!vf_token && !strncmp(buf, VF_TOKEN_ARG, 1937 strlen(VF_TOKEN_ARG))) { 1938 buf += strlen(VF_TOKEN_ARG); 1939 1940 if (strlen(buf) < UUID_STRING_LEN) 1941 return -EINVAL; 1942 1943 ret = uuid_parse(buf, &uuid); 1944 if (ret) 1945 return ret; 1946 1947 vf_token = true; 1948 buf += UUID_STRING_LEN; 1949 } else { 1950 /* Unknown/duplicate option */ 1951 return -EINVAL; 1952 } 1953 } 1954 } 1955 1956 ret = vfio_pci_validate_vf_token(vdev, vf_token, &uuid); 1957 if (ret) 1958 return ret; 1959 1960 return 1; /* Match */ 1961 } 1962 EXPORT_SYMBOL_GPL(vfio_pci_core_match); 1963 1964 static int vfio_pci_bus_notifier(struct notifier_block *nb, 1965 unsigned long action, void *data) 1966 { 1967 struct vfio_pci_core_device *vdev = container_of(nb, 1968 struct vfio_pci_core_device, nb); 1969 struct device *dev = data; 1970 struct pci_dev *pdev = to_pci_dev(dev); 1971 struct pci_dev *physfn = pci_physfn(pdev); 1972 1973 if (action == BUS_NOTIFY_ADD_DEVICE && 1974 pdev->is_virtfn && physfn == vdev->pdev) { 1975 pci_info(vdev->pdev, "Captured SR-IOV VF %s driver_override\n", 1976 pci_name(pdev)); 1977 pdev->driver_override = kasprintf(GFP_KERNEL, "%s", 1978 vdev->vdev.ops->name); 1979 } else if (action == BUS_NOTIFY_BOUND_DRIVER && 1980 pdev->is_virtfn && physfn == vdev->pdev) { 1981 struct pci_driver *drv = pci_dev_driver(pdev); 1982 1983 if (drv && drv != pci_dev_driver(vdev->pdev)) 1984 pci_warn(vdev->pdev, 1985 "VF %s bound to driver %s while PF bound to driver %s\n", 1986 pci_name(pdev), drv->name, 1987 pci_dev_driver(vdev->pdev)->name); 1988 } 1989 1990 return 0; 1991 } 1992 1993 static int vfio_pci_vf_init(struct vfio_pci_core_device *vdev) 1994 { 1995 struct pci_dev *pdev = vdev->pdev; 1996 struct vfio_pci_core_device *cur; 1997 struct pci_dev *physfn; 1998 int ret; 1999 2000 if (pdev->is_virtfn) { 2001 /* 2002 * If this VF was created by our vfio_pci_core_sriov_configure() 2003 * then we can find the PF vfio_pci_core_device now, and due to 2004 * the locking in pci_disable_sriov() it cannot change until 2005 * this VF device driver is removed. 2006 */ 2007 physfn = pci_physfn(vdev->pdev); 2008 mutex_lock(&vfio_pci_sriov_pfs_mutex); 2009 list_for_each_entry(cur, &vfio_pci_sriov_pfs, sriov_pfs_item) { 2010 if (cur->pdev == physfn) { 2011 vdev->sriov_pf_core_dev = cur; 2012 break; 2013 } 2014 } 2015 mutex_unlock(&vfio_pci_sriov_pfs_mutex); 2016 return 0; 2017 } 2018 2019 /* Not a SRIOV PF */ 2020 if (!pdev->is_physfn) 2021 return 0; 2022 2023 vdev->vf_token = kzalloc(sizeof(*vdev->vf_token), GFP_KERNEL); 2024 if (!vdev->vf_token) 2025 return -ENOMEM; 2026 2027 mutex_init(&vdev->vf_token->lock); 2028 uuid_gen(&vdev->vf_token->uuid); 2029 2030 vdev->nb.notifier_call = vfio_pci_bus_notifier; 2031 ret = bus_register_notifier(&pci_bus_type, &vdev->nb); 2032 if (ret) { 2033 kfree(vdev->vf_token); 2034 return ret; 2035 } 2036 return 0; 2037 } 2038 2039 static void vfio_pci_vf_uninit(struct vfio_pci_core_device *vdev) 2040 { 2041 if (!vdev->vf_token) 2042 return; 2043 2044 bus_unregister_notifier(&pci_bus_type, &vdev->nb); 2045 WARN_ON(vdev->vf_token->users); 2046 mutex_destroy(&vdev->vf_token->lock); 2047 kfree(vdev->vf_token); 2048 } 2049 2050 static int vfio_pci_vga_init(struct vfio_pci_core_device *vdev) 2051 { 2052 struct pci_dev *pdev = vdev->pdev; 2053 int ret; 2054 2055 if (!vfio_pci_is_vga(pdev)) 2056 return 0; 2057 2058 ret = aperture_remove_conflicting_pci_devices(pdev, vdev->vdev.ops->name); 2059 if (ret) 2060 return ret; 2061 2062 ret = vga_client_register(pdev, vfio_pci_set_decode); 2063 if (ret) 2064 return ret; 2065 vga_set_legacy_decoding(pdev, vfio_pci_set_decode(pdev, false)); 2066 return 0; 2067 } 2068 2069 static void vfio_pci_vga_uninit(struct vfio_pci_core_device *vdev) 2070 { 2071 struct pci_dev *pdev = vdev->pdev; 2072 2073 if (!vfio_pci_is_vga(pdev)) 2074 return; 2075 vga_client_unregister(pdev); 2076 vga_set_legacy_decoding(pdev, VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM | 2077 VGA_RSRC_LEGACY_IO | 2078 VGA_RSRC_LEGACY_MEM); 2079 } 2080 2081 int vfio_pci_core_init_dev(struct vfio_device *core_vdev) 2082 { 2083 struct vfio_pci_core_device *vdev = 2084 container_of(core_vdev, struct vfio_pci_core_device, vdev); 2085 2086 vdev->pdev = to_pci_dev(core_vdev->dev); 2087 vdev->irq_type = VFIO_PCI_NUM_IRQS; 2088 mutex_init(&vdev->igate); 2089 spin_lock_init(&vdev->irqlock); 2090 mutex_init(&vdev->ioeventfds_lock); 2091 INIT_LIST_HEAD(&vdev->dummy_resources_list); 2092 INIT_LIST_HEAD(&vdev->ioeventfds_list); 2093 mutex_init(&vdev->vma_lock); 2094 INIT_LIST_HEAD(&vdev->vma_list); 2095 INIT_LIST_HEAD(&vdev->sriov_pfs_item); 2096 init_rwsem(&vdev->memory_lock); 2097 2098 return 0; 2099 } 2100 EXPORT_SYMBOL_GPL(vfio_pci_core_init_dev); 2101 2102 void vfio_pci_core_release_dev(struct vfio_device *core_vdev) 2103 { 2104 struct vfio_pci_core_device *vdev = 2105 container_of(core_vdev, struct vfio_pci_core_device, vdev); 2106 2107 mutex_destroy(&vdev->igate); 2108 mutex_destroy(&vdev->ioeventfds_lock); 2109 mutex_destroy(&vdev->vma_lock); 2110 kfree(vdev->region); 2111 kfree(vdev->pm_save); 2112 vfio_free_device(core_vdev); 2113 } 2114 EXPORT_SYMBOL_GPL(vfio_pci_core_release_dev); 2115 2116 int vfio_pci_core_register_device(struct vfio_pci_core_device *vdev) 2117 { 2118 struct pci_dev *pdev = vdev->pdev; 2119 struct device *dev = &pdev->dev; 2120 int ret; 2121 2122 /* Drivers must set the vfio_pci_core_device to their drvdata */ 2123 if (WARN_ON(vdev != dev_get_drvdata(dev))) 2124 return -EINVAL; 2125 2126 if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL) 2127 return -EINVAL; 2128 2129 if (vdev->vdev.mig_ops) { 2130 if (!(vdev->vdev.mig_ops->migration_get_state && 2131 vdev->vdev.mig_ops->migration_set_state) || 2132 !(vdev->vdev.migration_flags & VFIO_MIGRATION_STOP_COPY)) 2133 return -EINVAL; 2134 } 2135 2136 if (vdev->vdev.log_ops && !(vdev->vdev.log_ops->log_start && 2137 vdev->vdev.log_ops->log_stop && 2138 vdev->vdev.log_ops->log_read_and_clear)) 2139 return -EINVAL; 2140 2141 /* 2142 * Prevent binding to PFs with VFs enabled, the VFs might be in use 2143 * by the host or other users. We cannot capture the VFs if they 2144 * already exist, nor can we track VF users. Disabling SR-IOV here 2145 * would initiate removing the VFs, which would unbind the driver, 2146 * which is prone to blocking if that VF is also in use by vfio-pci. 2147 * Just reject these PFs and let the user sort it out. 2148 */ 2149 if (pci_num_vf(pdev)) { 2150 pci_warn(pdev, "Cannot bind to PF with SR-IOV enabled\n"); 2151 return -EBUSY; 2152 } 2153 2154 if (pci_is_root_bus(pdev->bus)) { 2155 ret = vfio_assign_device_set(&vdev->vdev, vdev); 2156 } else if (!pci_probe_reset_slot(pdev->slot)) { 2157 ret = vfio_assign_device_set(&vdev->vdev, pdev->slot); 2158 } else { 2159 /* 2160 * If there is no slot reset support for this device, the whole 2161 * bus needs to be grouped together to support bus-wide resets. 2162 */ 2163 ret = vfio_assign_device_set(&vdev->vdev, pdev->bus); 2164 } 2165 2166 if (ret) 2167 return ret; 2168 ret = vfio_pci_vf_init(vdev); 2169 if (ret) 2170 return ret; 2171 ret = vfio_pci_vga_init(vdev); 2172 if (ret) 2173 goto out_vf; 2174 2175 vfio_pci_probe_power_state(vdev); 2176 2177 /* 2178 * pci-core sets the device power state to an unknown value at 2179 * bootup and after being removed from a driver. The only 2180 * transition it allows from this unknown state is to D0, which 2181 * typically happens when a driver calls pci_enable_device(). 2182 * We're not ready to enable the device yet, but we do want to 2183 * be able to get to D3. Therefore first do a D0 transition 2184 * before enabling runtime PM. 2185 */ 2186 vfio_pci_set_power_state(vdev, PCI_D0); 2187 2188 dev->driver->pm = &vfio_pci_core_pm_ops; 2189 pm_runtime_allow(dev); 2190 if (!disable_idle_d3) 2191 pm_runtime_put(dev); 2192 2193 ret = vfio_register_group_dev(&vdev->vdev); 2194 if (ret) 2195 goto out_power; 2196 return 0; 2197 2198 out_power: 2199 if (!disable_idle_d3) 2200 pm_runtime_get_noresume(dev); 2201 2202 pm_runtime_forbid(dev); 2203 out_vf: 2204 vfio_pci_vf_uninit(vdev); 2205 return ret; 2206 } 2207 EXPORT_SYMBOL_GPL(vfio_pci_core_register_device); 2208 2209 void vfio_pci_core_unregister_device(struct vfio_pci_core_device *vdev) 2210 { 2211 vfio_pci_core_sriov_configure(vdev, 0); 2212 2213 vfio_unregister_group_dev(&vdev->vdev); 2214 2215 vfio_pci_vf_uninit(vdev); 2216 vfio_pci_vga_uninit(vdev); 2217 2218 if (!disable_idle_d3) 2219 pm_runtime_get_noresume(&vdev->pdev->dev); 2220 2221 pm_runtime_forbid(&vdev->pdev->dev); 2222 } 2223 EXPORT_SYMBOL_GPL(vfio_pci_core_unregister_device); 2224 2225 pci_ers_result_t vfio_pci_core_aer_err_detected(struct pci_dev *pdev, 2226 pci_channel_state_t state) 2227 { 2228 struct vfio_pci_core_device *vdev = dev_get_drvdata(&pdev->dev); 2229 2230 mutex_lock(&vdev->igate); 2231 2232 if (vdev->err_trigger) 2233 eventfd_signal(vdev->err_trigger, 1); 2234 2235 mutex_unlock(&vdev->igate); 2236 2237 return PCI_ERS_RESULT_CAN_RECOVER; 2238 } 2239 EXPORT_SYMBOL_GPL(vfio_pci_core_aer_err_detected); 2240 2241 int vfio_pci_core_sriov_configure(struct vfio_pci_core_device *vdev, 2242 int nr_virtfn) 2243 { 2244 struct pci_dev *pdev = vdev->pdev; 2245 int ret = 0; 2246 2247 device_lock_assert(&pdev->dev); 2248 2249 if (nr_virtfn) { 2250 mutex_lock(&vfio_pci_sriov_pfs_mutex); 2251 /* 2252 * The thread that adds the vdev to the list is the only thread 2253 * that gets to call pci_enable_sriov() and we will only allow 2254 * it to be called once without going through 2255 * pci_disable_sriov() 2256 */ 2257 if (!list_empty(&vdev->sriov_pfs_item)) { 2258 ret = -EINVAL; 2259 goto out_unlock; 2260 } 2261 list_add_tail(&vdev->sriov_pfs_item, &vfio_pci_sriov_pfs); 2262 mutex_unlock(&vfio_pci_sriov_pfs_mutex); 2263 2264 /* 2265 * The PF power state should always be higher than the VF power 2266 * state. The PF can be in low power state either with runtime 2267 * power management (when there is no user) or PCI_PM_CTRL 2268 * register write by the user. If PF is in the low power state, 2269 * then change the power state to D0 first before enabling 2270 * SR-IOV. Also, this function can be called at any time, and 2271 * userspace PCI_PM_CTRL write can race against this code path, 2272 * so protect the same with 'memory_lock'. 2273 */ 2274 ret = pm_runtime_resume_and_get(&pdev->dev); 2275 if (ret) 2276 goto out_del; 2277 2278 down_write(&vdev->memory_lock); 2279 vfio_pci_set_power_state(vdev, PCI_D0); 2280 ret = pci_enable_sriov(pdev, nr_virtfn); 2281 up_write(&vdev->memory_lock); 2282 if (ret) { 2283 pm_runtime_put(&pdev->dev); 2284 goto out_del; 2285 } 2286 return nr_virtfn; 2287 } 2288 2289 if (pci_num_vf(pdev)) { 2290 pci_disable_sriov(pdev); 2291 pm_runtime_put(&pdev->dev); 2292 } 2293 2294 out_del: 2295 mutex_lock(&vfio_pci_sriov_pfs_mutex); 2296 list_del_init(&vdev->sriov_pfs_item); 2297 out_unlock: 2298 mutex_unlock(&vfio_pci_sriov_pfs_mutex); 2299 return ret; 2300 } 2301 EXPORT_SYMBOL_GPL(vfio_pci_core_sriov_configure); 2302 2303 const struct pci_error_handlers vfio_pci_core_err_handlers = { 2304 .error_detected = vfio_pci_core_aer_err_detected, 2305 }; 2306 EXPORT_SYMBOL_GPL(vfio_pci_core_err_handlers); 2307 2308 static bool vfio_dev_in_groups(struct vfio_pci_core_device *vdev, 2309 struct vfio_pci_group_info *groups) 2310 { 2311 unsigned int i; 2312 2313 for (i = 0; i < groups->count; i++) 2314 if (vfio_file_has_dev(groups->files[i], &vdev->vdev)) 2315 return true; 2316 return false; 2317 } 2318 2319 static int vfio_pci_is_device_in_set(struct pci_dev *pdev, void *data) 2320 { 2321 struct vfio_device_set *dev_set = data; 2322 struct vfio_device *cur; 2323 2324 list_for_each_entry(cur, &dev_set->device_list, dev_set_list) 2325 if (cur->dev == &pdev->dev) 2326 return 0; 2327 return -EBUSY; 2328 } 2329 2330 /* 2331 * vfio-core considers a group to be viable and will create a vfio_device even 2332 * if some devices are bound to drivers like pci-stub or pcieport. Here we 2333 * require all PCI devices to be inside our dev_set since that ensures they stay 2334 * put and that every driver controlling the device can co-ordinate with the 2335 * device reset. 2336 * 2337 * Returns the pci_dev to pass to pci_reset_bus() if every PCI device to be 2338 * reset is inside the dev_set, and pci_reset_bus() can succeed. NULL otherwise. 2339 */ 2340 static struct pci_dev * 2341 vfio_pci_dev_set_resettable(struct vfio_device_set *dev_set) 2342 { 2343 struct pci_dev *pdev; 2344 2345 lockdep_assert_held(&dev_set->lock); 2346 2347 /* 2348 * By definition all PCI devices in the dev_set share the same PCI 2349 * reset, so any pci_dev will have the same outcomes for 2350 * pci_probe_reset_*() and pci_reset_bus(). 2351 */ 2352 pdev = list_first_entry(&dev_set->device_list, 2353 struct vfio_pci_core_device, 2354 vdev.dev_set_list)->pdev; 2355 2356 /* pci_reset_bus() is supported */ 2357 if (pci_probe_reset_slot(pdev->slot) && pci_probe_reset_bus(pdev->bus)) 2358 return NULL; 2359 2360 if (vfio_pci_for_each_slot_or_bus(pdev, vfio_pci_is_device_in_set, 2361 dev_set, 2362 !pci_probe_reset_slot(pdev->slot))) 2363 return NULL; 2364 return pdev; 2365 } 2366 2367 static int vfio_pci_dev_set_pm_runtime_get(struct vfio_device_set *dev_set) 2368 { 2369 struct vfio_pci_core_device *cur; 2370 int ret; 2371 2372 list_for_each_entry(cur, &dev_set->device_list, vdev.dev_set_list) { 2373 ret = pm_runtime_resume_and_get(&cur->pdev->dev); 2374 if (ret) 2375 goto unwind; 2376 } 2377 2378 return 0; 2379 2380 unwind: 2381 list_for_each_entry_continue_reverse(cur, &dev_set->device_list, 2382 vdev.dev_set_list) 2383 pm_runtime_put(&cur->pdev->dev); 2384 2385 return ret; 2386 } 2387 2388 /* 2389 * We need to get memory_lock for each device, but devices can share mmap_lock, 2390 * therefore we need to zap and hold the vma_lock for each device, and only then 2391 * get each memory_lock. 2392 */ 2393 static int vfio_pci_dev_set_hot_reset(struct vfio_device_set *dev_set, 2394 struct vfio_pci_group_info *groups) 2395 { 2396 struct vfio_pci_core_device *cur_mem; 2397 struct vfio_pci_core_device *cur_vma; 2398 struct vfio_pci_core_device *cur; 2399 struct pci_dev *pdev; 2400 bool is_mem = true; 2401 int ret; 2402 2403 mutex_lock(&dev_set->lock); 2404 cur_mem = list_first_entry(&dev_set->device_list, 2405 struct vfio_pci_core_device, 2406 vdev.dev_set_list); 2407 2408 pdev = vfio_pci_dev_set_resettable(dev_set); 2409 if (!pdev) { 2410 ret = -EINVAL; 2411 goto err_unlock; 2412 } 2413 2414 /* 2415 * Some of the devices in the dev_set can be in the runtime suspended 2416 * state. Increment the usage count for all the devices in the dev_set 2417 * before reset and decrement the same after reset. 2418 */ 2419 ret = vfio_pci_dev_set_pm_runtime_get(dev_set); 2420 if (ret) 2421 goto err_unlock; 2422 2423 list_for_each_entry(cur_vma, &dev_set->device_list, vdev.dev_set_list) { 2424 /* 2425 * Test whether all the affected devices are contained by the 2426 * set of groups provided by the user. 2427 */ 2428 if (!vfio_dev_in_groups(cur_vma, groups)) { 2429 ret = -EINVAL; 2430 goto err_undo; 2431 } 2432 2433 /* 2434 * Locking multiple devices is prone to deadlock, runaway and 2435 * unwind if we hit contention. 2436 */ 2437 if (!vfio_pci_zap_and_vma_lock(cur_vma, true)) { 2438 ret = -EBUSY; 2439 goto err_undo; 2440 } 2441 } 2442 cur_vma = NULL; 2443 2444 list_for_each_entry(cur_mem, &dev_set->device_list, vdev.dev_set_list) { 2445 if (!down_write_trylock(&cur_mem->memory_lock)) { 2446 ret = -EBUSY; 2447 goto err_undo; 2448 } 2449 mutex_unlock(&cur_mem->vma_lock); 2450 } 2451 cur_mem = NULL; 2452 2453 /* 2454 * The pci_reset_bus() will reset all the devices in the bus. 2455 * The power state can be non-D0 for some of the devices in the bus. 2456 * For these devices, the pci_reset_bus() will internally set 2457 * the power state to D0 without vfio driver involvement. 2458 * For the devices which have NoSoftRst-, the reset function can 2459 * cause the PCI config space reset without restoring the original 2460 * state (saved locally in 'vdev->pm_save'). 2461 */ 2462 list_for_each_entry(cur, &dev_set->device_list, vdev.dev_set_list) 2463 vfio_pci_set_power_state(cur, PCI_D0); 2464 2465 ret = pci_reset_bus(pdev); 2466 2467 err_undo: 2468 list_for_each_entry(cur, &dev_set->device_list, vdev.dev_set_list) { 2469 if (cur == cur_mem) 2470 is_mem = false; 2471 if (cur == cur_vma) 2472 break; 2473 if (is_mem) 2474 up_write(&cur->memory_lock); 2475 else 2476 mutex_unlock(&cur->vma_lock); 2477 } 2478 2479 list_for_each_entry(cur, &dev_set->device_list, vdev.dev_set_list) 2480 pm_runtime_put(&cur->pdev->dev); 2481 err_unlock: 2482 mutex_unlock(&dev_set->lock); 2483 return ret; 2484 } 2485 2486 static bool vfio_pci_dev_set_needs_reset(struct vfio_device_set *dev_set) 2487 { 2488 struct vfio_pci_core_device *cur; 2489 bool needs_reset = false; 2490 2491 /* No other VFIO device in the set can be open. */ 2492 if (vfio_device_set_open_count(dev_set) > 1) 2493 return false; 2494 2495 list_for_each_entry(cur, &dev_set->device_list, vdev.dev_set_list) 2496 needs_reset |= cur->needs_reset; 2497 return needs_reset; 2498 } 2499 2500 /* 2501 * If a bus or slot reset is available for the provided dev_set and: 2502 * - All of the devices affected by that bus or slot reset are unused 2503 * - At least one of the affected devices is marked dirty via 2504 * needs_reset (such as by lack of FLR support) 2505 * Then attempt to perform that bus or slot reset. 2506 */ 2507 static void vfio_pci_dev_set_try_reset(struct vfio_device_set *dev_set) 2508 { 2509 struct vfio_pci_core_device *cur; 2510 struct pci_dev *pdev; 2511 bool reset_done = false; 2512 2513 if (!vfio_pci_dev_set_needs_reset(dev_set)) 2514 return; 2515 2516 pdev = vfio_pci_dev_set_resettable(dev_set); 2517 if (!pdev) 2518 return; 2519 2520 /* 2521 * Some of the devices in the bus can be in the runtime suspended 2522 * state. Increment the usage count for all the devices in the dev_set 2523 * before reset and decrement the same after reset. 2524 */ 2525 if (!disable_idle_d3 && vfio_pci_dev_set_pm_runtime_get(dev_set)) 2526 return; 2527 2528 if (!pci_reset_bus(pdev)) 2529 reset_done = true; 2530 2531 list_for_each_entry(cur, &dev_set->device_list, vdev.dev_set_list) { 2532 if (reset_done) 2533 cur->needs_reset = false; 2534 2535 if (!disable_idle_d3) 2536 pm_runtime_put(&cur->pdev->dev); 2537 } 2538 } 2539 2540 void vfio_pci_core_set_params(bool is_nointxmask, bool is_disable_vga, 2541 bool is_disable_idle_d3) 2542 { 2543 nointxmask = is_nointxmask; 2544 disable_vga = is_disable_vga; 2545 disable_idle_d3 = is_disable_idle_d3; 2546 } 2547 EXPORT_SYMBOL_GPL(vfio_pci_core_set_params); 2548 2549 static void vfio_pci_core_cleanup(void) 2550 { 2551 vfio_pci_uninit_perm_bits(); 2552 } 2553 2554 static int __init vfio_pci_core_init(void) 2555 { 2556 /* Allocate shared config space permission data used by all devices */ 2557 return vfio_pci_init_perm_bits(); 2558 } 2559 2560 module_init(vfio_pci_core_init); 2561 module_exit(vfio_pci_core_cleanup); 2562 2563 MODULE_LICENSE("GPL v2"); 2564 MODULE_AUTHOR(DRIVER_AUTHOR); 2565 MODULE_DESCRIPTION(DRIVER_DESC); 2566