xref: /openbmc/linux/drivers/vdpa/ifcvf/ifcvf_base.c (revision cc19db8b)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Intel IFC VF NIC driver for virtio dataplane offloading
4  *
5  * Copyright (C) 2020 Intel Corporation.
6  *
7  * Author: Zhu Lingshan <lingshan.zhu@intel.com>
8  *
9  */
10 
11 #include "ifcvf_base.h"
12 
13 static inline u8 ifc_ioread8(u8 __iomem *addr)
14 {
15 	return ioread8(addr);
16 }
17 static inline u16 ifc_ioread16 (__le16 __iomem *addr)
18 {
19 	return ioread16(addr);
20 }
21 
22 static inline u32 ifc_ioread32(__le32 __iomem *addr)
23 {
24 	return ioread32(addr);
25 }
26 
27 static inline void ifc_iowrite8(u8 value, u8 __iomem *addr)
28 {
29 	iowrite8(value, addr);
30 }
31 
32 static inline void ifc_iowrite16(u16 value, __le16 __iomem *addr)
33 {
34 	iowrite16(value, addr);
35 }
36 
37 static inline void ifc_iowrite32(u32 value, __le32 __iomem *addr)
38 {
39 	iowrite32(value, addr);
40 }
41 
42 static void ifc_iowrite64_twopart(u64 val,
43 				  __le32 __iomem *lo, __le32 __iomem *hi)
44 {
45 	ifc_iowrite32((u32)val, lo);
46 	ifc_iowrite32(val >> 32, hi);
47 }
48 
49 struct ifcvf_adapter *vf_to_adapter(struct ifcvf_hw *hw)
50 {
51 	return container_of(hw, struct ifcvf_adapter, vf);
52 }
53 
54 static void __iomem *get_cap_addr(struct ifcvf_hw *hw,
55 				  struct virtio_pci_cap *cap)
56 {
57 	struct ifcvf_adapter *ifcvf;
58 	struct pci_dev *pdev;
59 	u32 length, offset;
60 	u8 bar;
61 
62 	length = le32_to_cpu(cap->length);
63 	offset = le32_to_cpu(cap->offset);
64 	bar = cap->bar;
65 
66 	ifcvf= vf_to_adapter(hw);
67 	pdev = ifcvf->pdev;
68 
69 	if (bar >= IFCVF_PCI_MAX_RESOURCE) {
70 		IFCVF_DBG(pdev,
71 			  "Invalid bar number %u to get capabilities\n", bar);
72 		return NULL;
73 	}
74 
75 	if (offset + length > pci_resource_len(pdev, bar)) {
76 		IFCVF_DBG(pdev,
77 			  "offset(%u) + len(%u) overflows bar%u's capability\n",
78 			  offset, length, bar);
79 		return NULL;
80 	}
81 
82 	return hw->base[bar] + offset;
83 }
84 
85 static int ifcvf_read_config_range(struct pci_dev *dev,
86 				   uint32_t *val, int size, int where)
87 {
88 	int ret, i;
89 
90 	for (i = 0; i < size; i += 4) {
91 		ret = pci_read_config_dword(dev, where + i, val + i / 4);
92 		if (ret < 0)
93 			return ret;
94 	}
95 
96 	return 0;
97 }
98 
99 int ifcvf_init_hw(struct ifcvf_hw *hw, struct pci_dev *pdev)
100 {
101 	struct virtio_pci_cap cap;
102 	u16 notify_off;
103 	int ret;
104 	u8 pos;
105 	u32 i;
106 
107 	ret = pci_read_config_byte(pdev, PCI_CAPABILITY_LIST, &pos);
108 	if (ret < 0) {
109 		IFCVF_ERR(pdev, "Failed to read PCI capability list\n");
110 		return -EIO;
111 	}
112 
113 	while (pos) {
114 		ret = ifcvf_read_config_range(pdev, (u32 *)&cap,
115 					      sizeof(cap), pos);
116 		if (ret < 0) {
117 			IFCVF_ERR(pdev,
118 				  "Failed to get PCI capability at %x\n", pos);
119 			break;
120 		}
121 
122 		if (cap.cap_vndr != PCI_CAP_ID_VNDR)
123 			goto next;
124 
125 		switch (cap.cfg_type) {
126 		case VIRTIO_PCI_CAP_COMMON_CFG:
127 			hw->common_cfg = get_cap_addr(hw, &cap);
128 			IFCVF_DBG(pdev, "hw->common_cfg = %p\n",
129 				  hw->common_cfg);
130 			break;
131 		case VIRTIO_PCI_CAP_NOTIFY_CFG:
132 			pci_read_config_dword(pdev, pos + sizeof(cap),
133 					      &hw->notify_off_multiplier);
134 			hw->notify_bar = cap.bar;
135 			hw->notify_base = get_cap_addr(hw, &cap);
136 			hw->notify_base_pa = pci_resource_start(pdev, cap.bar) +
137 					le32_to_cpu(cap.offset);
138 			IFCVF_DBG(pdev, "hw->notify_base = %p\n",
139 				  hw->notify_base);
140 			break;
141 		case VIRTIO_PCI_CAP_ISR_CFG:
142 			hw->isr = get_cap_addr(hw, &cap);
143 			IFCVF_DBG(pdev, "hw->isr = %p\n", hw->isr);
144 			break;
145 		case VIRTIO_PCI_CAP_DEVICE_CFG:
146 			hw->dev_cfg = get_cap_addr(hw, &cap);
147 			IFCVF_DBG(pdev, "hw->dev_cfg = %p\n", hw->dev_cfg);
148 			break;
149 		}
150 
151 next:
152 		pos = cap.cap_next;
153 	}
154 
155 	if (hw->common_cfg == NULL || hw->notify_base == NULL ||
156 	    hw->isr == NULL || hw->dev_cfg == NULL) {
157 		IFCVF_ERR(pdev, "Incomplete PCI capabilities\n");
158 		return -EIO;
159 	}
160 
161 	hw->nr_vring = ifc_ioread16(&hw->common_cfg->num_queues);
162 
163 	for (i = 0; i < hw->nr_vring; i++) {
164 		ifc_iowrite16(i, &hw->common_cfg->queue_select);
165 		notify_off = ifc_ioread16(&hw->common_cfg->queue_notify_off);
166 		hw->vring[i].notify_addr = hw->notify_base +
167 			notify_off * hw->notify_off_multiplier;
168 		hw->vring[i].notify_pa = hw->notify_base_pa +
169 			notify_off * hw->notify_off_multiplier;
170 	}
171 
172 	hw->lm_cfg = hw->base[IFCVF_LM_BAR];
173 
174 	IFCVF_DBG(pdev,
175 		  "PCI capability mapping: common cfg: %p, notify base: %p\n, isr cfg: %p, device cfg: %p, multiplier: %u\n",
176 		  hw->common_cfg, hw->notify_base, hw->isr,
177 		  hw->dev_cfg, hw->notify_off_multiplier);
178 
179 	return 0;
180 }
181 
182 u8 ifcvf_get_status(struct ifcvf_hw *hw)
183 {
184 	return ifc_ioread8(&hw->common_cfg->device_status);
185 }
186 
187 void ifcvf_set_status(struct ifcvf_hw *hw, u8 status)
188 {
189 	ifc_iowrite8(status, &hw->common_cfg->device_status);
190 }
191 
192 void ifcvf_reset(struct ifcvf_hw *hw)
193 {
194 	hw->config_cb.callback = NULL;
195 	hw->config_cb.private = NULL;
196 
197 	ifcvf_set_status(hw, 0);
198 	/* flush set_status, make sure VF is stopped, reset */
199 	ifcvf_get_status(hw);
200 }
201 
202 static void ifcvf_add_status(struct ifcvf_hw *hw, u8 status)
203 {
204 	if (status != 0)
205 		status |= ifcvf_get_status(hw);
206 
207 	ifcvf_set_status(hw, status);
208 	ifcvf_get_status(hw);
209 }
210 
211 u64 ifcvf_get_hw_features(struct ifcvf_hw *hw)
212 {
213 	struct virtio_pci_common_cfg __iomem *cfg = hw->common_cfg;
214 	u32 features_lo, features_hi;
215 	u64 features;
216 
217 	ifc_iowrite32(0, &cfg->device_feature_select);
218 	features_lo = ifc_ioread32(&cfg->device_feature);
219 
220 	ifc_iowrite32(1, &cfg->device_feature_select);
221 	features_hi = ifc_ioread32(&cfg->device_feature);
222 
223 	features = ((u64)features_hi << 32) | features_lo;
224 
225 	return features;
226 }
227 
228 u64 ifcvf_get_features(struct ifcvf_hw *hw)
229 {
230 	return hw->hw_features;
231 }
232 
233 int ifcvf_verify_min_features(struct ifcvf_hw *hw, u64 features)
234 {
235 	struct ifcvf_adapter *ifcvf = vf_to_adapter(hw);
236 
237 	if (!(features & BIT_ULL(VIRTIO_F_ACCESS_PLATFORM)) && features) {
238 		IFCVF_ERR(ifcvf->pdev, "VIRTIO_F_ACCESS_PLATFORM is not negotiated\n");
239 		return -EINVAL;
240 	}
241 
242 	return 0;
243 }
244 
245 u32 ifcvf_get_config_size(struct ifcvf_hw *hw)
246 {
247 	struct ifcvf_adapter *adapter;
248 	u32 config_size;
249 
250 	adapter = vf_to_adapter(hw);
251 	switch (hw->dev_type) {
252 	case VIRTIO_ID_NET:
253 		config_size = sizeof(struct virtio_net_config);
254 		break;
255 	case VIRTIO_ID_BLOCK:
256 		config_size = sizeof(struct virtio_blk_config);
257 		break;
258 	default:
259 		config_size = 0;
260 		IFCVF_ERR(adapter->pdev, "VIRTIO ID %u not supported\n", hw->dev_type);
261 	}
262 
263 	return config_size;
264 }
265 
266 void ifcvf_read_dev_config(struct ifcvf_hw *hw, u64 offset,
267 			   void *dst, int length)
268 {
269 	u8 old_gen, new_gen, *p;
270 	int i;
271 
272 	WARN_ON(offset + length > hw->config_size);
273 	do {
274 		old_gen = ifc_ioread8(&hw->common_cfg->config_generation);
275 		p = dst;
276 		for (i = 0; i < length; i++)
277 			*p++ = ifc_ioread8(hw->dev_cfg + offset + i);
278 
279 		new_gen = ifc_ioread8(&hw->common_cfg->config_generation);
280 	} while (old_gen != new_gen);
281 }
282 
283 void ifcvf_write_dev_config(struct ifcvf_hw *hw, u64 offset,
284 			    const void *src, int length)
285 {
286 	const u8 *p;
287 	int i;
288 
289 	p = src;
290 	WARN_ON(offset + length > hw->config_size);
291 	for (i = 0; i < length; i++)
292 		ifc_iowrite8(*p++, hw->dev_cfg + offset + i);
293 }
294 
295 static void ifcvf_set_features(struct ifcvf_hw *hw, u64 features)
296 {
297 	struct virtio_pci_common_cfg __iomem *cfg = hw->common_cfg;
298 
299 	ifc_iowrite32(0, &cfg->guest_feature_select);
300 	ifc_iowrite32((u32)features, &cfg->guest_feature);
301 
302 	ifc_iowrite32(1, &cfg->guest_feature_select);
303 	ifc_iowrite32(features >> 32, &cfg->guest_feature);
304 }
305 
306 static int ifcvf_config_features(struct ifcvf_hw *hw)
307 {
308 	struct ifcvf_adapter *ifcvf;
309 
310 	ifcvf = vf_to_adapter(hw);
311 	ifcvf_set_features(hw, hw->req_features);
312 	ifcvf_add_status(hw, VIRTIO_CONFIG_S_FEATURES_OK);
313 
314 	if (!(ifcvf_get_status(hw) & VIRTIO_CONFIG_S_FEATURES_OK)) {
315 		IFCVF_ERR(ifcvf->pdev, "Failed to set FEATURES_OK status\n");
316 		return -EIO;
317 	}
318 
319 	return 0;
320 }
321 
322 u16 ifcvf_get_vq_state(struct ifcvf_hw *hw, u16 qid)
323 {
324 	struct ifcvf_lm_cfg __iomem *ifcvf_lm;
325 	void __iomem *avail_idx_addr;
326 	u16 last_avail_idx;
327 	u32 q_pair_id;
328 
329 	ifcvf_lm = (struct ifcvf_lm_cfg __iomem *)hw->lm_cfg;
330 	q_pair_id = qid / hw->nr_vring;
331 	avail_idx_addr = &ifcvf_lm->vring_lm_cfg[q_pair_id].idx_addr[qid % 2];
332 	last_avail_idx = ifc_ioread16(avail_idx_addr);
333 
334 	return last_avail_idx;
335 }
336 
337 int ifcvf_set_vq_state(struct ifcvf_hw *hw, u16 qid, u16 num)
338 {
339 	struct ifcvf_lm_cfg __iomem *ifcvf_lm;
340 	void __iomem *avail_idx_addr;
341 	u32 q_pair_id;
342 
343 	ifcvf_lm = (struct ifcvf_lm_cfg __iomem *)hw->lm_cfg;
344 	q_pair_id = qid / hw->nr_vring;
345 	avail_idx_addr = &ifcvf_lm->vring_lm_cfg[q_pair_id].idx_addr[qid % 2];
346 	hw->vring[qid].last_avail_idx = num;
347 	ifc_iowrite16(num, avail_idx_addr);
348 
349 	return 0;
350 }
351 
352 static int ifcvf_hw_enable(struct ifcvf_hw *hw)
353 {
354 	struct virtio_pci_common_cfg __iomem *cfg;
355 	struct ifcvf_adapter *ifcvf;
356 	u32 i;
357 
358 	ifcvf = vf_to_adapter(hw);
359 	cfg = hw->common_cfg;
360 	ifc_iowrite16(IFCVF_MSI_CONFIG_OFF, &cfg->msix_config);
361 
362 	if (ifc_ioread16(&cfg->msix_config) == VIRTIO_MSI_NO_VECTOR) {
363 		IFCVF_ERR(ifcvf->pdev, "No msix vector for device config\n");
364 		return -EINVAL;
365 	}
366 
367 	for (i = 0; i < hw->nr_vring; i++) {
368 		if (!hw->vring[i].ready)
369 			break;
370 
371 		ifc_iowrite16(i, &cfg->queue_select);
372 		ifc_iowrite64_twopart(hw->vring[i].desc, &cfg->queue_desc_lo,
373 				     &cfg->queue_desc_hi);
374 		ifc_iowrite64_twopart(hw->vring[i].avail, &cfg->queue_avail_lo,
375 				      &cfg->queue_avail_hi);
376 		ifc_iowrite64_twopart(hw->vring[i].used, &cfg->queue_used_lo,
377 				     &cfg->queue_used_hi);
378 		ifc_iowrite16(hw->vring[i].size, &cfg->queue_size);
379 		ifc_iowrite16(i + IFCVF_MSI_QUEUE_OFF, &cfg->queue_msix_vector);
380 
381 		if (ifc_ioread16(&cfg->queue_msix_vector) ==
382 		    VIRTIO_MSI_NO_VECTOR) {
383 			IFCVF_ERR(ifcvf->pdev,
384 				  "No msix vector for queue %u\n", i);
385 			return -EINVAL;
386 		}
387 
388 		ifcvf_set_vq_state(hw, i, hw->vring[i].last_avail_idx);
389 		ifc_iowrite16(1, &cfg->queue_enable);
390 	}
391 
392 	return 0;
393 }
394 
395 static void ifcvf_hw_disable(struct ifcvf_hw *hw)
396 {
397 	struct virtio_pci_common_cfg __iomem *cfg;
398 	u32 i;
399 
400 	cfg = hw->common_cfg;
401 	ifc_iowrite16(VIRTIO_MSI_NO_VECTOR, &cfg->msix_config);
402 
403 	for (i = 0; i < hw->nr_vring; i++) {
404 		ifc_iowrite16(i, &cfg->queue_select);
405 		ifc_iowrite16(VIRTIO_MSI_NO_VECTOR, &cfg->queue_msix_vector);
406 	}
407 
408 	ifc_ioread16(&cfg->queue_msix_vector);
409 }
410 
411 int ifcvf_start_hw(struct ifcvf_hw *hw)
412 {
413 	ifcvf_reset(hw);
414 	ifcvf_add_status(hw, VIRTIO_CONFIG_S_ACKNOWLEDGE);
415 	ifcvf_add_status(hw, VIRTIO_CONFIG_S_DRIVER);
416 
417 	if (ifcvf_config_features(hw) < 0)
418 		return -EINVAL;
419 
420 	if (ifcvf_hw_enable(hw) < 0)
421 		return -EINVAL;
422 
423 	ifcvf_add_status(hw, VIRTIO_CONFIG_S_DRIVER_OK);
424 
425 	return 0;
426 }
427 
428 void ifcvf_stop_hw(struct ifcvf_hw *hw)
429 {
430 	ifcvf_hw_disable(hw);
431 	ifcvf_reset(hw);
432 }
433 
434 void ifcvf_notify_queue(struct ifcvf_hw *hw, u16 qid)
435 {
436 	ifc_iowrite16(qid, hw->vring[qid].notify_addr);
437 }
438