1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Intel IFC VF NIC driver for virtio dataplane offloading 4 * 5 * Copyright (C) 2020 Intel Corporation. 6 * 7 * Author: Zhu Lingshan <lingshan.zhu@intel.com> 8 * 9 */ 10 11 #include "ifcvf_base.h" 12 13 static inline u8 ifc_ioread8(u8 __iomem *addr) 14 { 15 return ioread8(addr); 16 } 17 static inline u16 ifc_ioread16 (__le16 __iomem *addr) 18 { 19 return ioread16(addr); 20 } 21 22 static inline u32 ifc_ioread32(__le32 __iomem *addr) 23 { 24 return ioread32(addr); 25 } 26 27 static inline void ifc_iowrite8(u8 value, u8 __iomem *addr) 28 { 29 iowrite8(value, addr); 30 } 31 32 static inline void ifc_iowrite16(u16 value, __le16 __iomem *addr) 33 { 34 iowrite16(value, addr); 35 } 36 37 static inline void ifc_iowrite32(u32 value, __le32 __iomem *addr) 38 { 39 iowrite32(value, addr); 40 } 41 42 static void ifc_iowrite64_twopart(u64 val, 43 __le32 __iomem *lo, __le32 __iomem *hi) 44 { 45 ifc_iowrite32((u32)val, lo); 46 ifc_iowrite32(val >> 32, hi); 47 } 48 49 struct ifcvf_adapter *vf_to_adapter(struct ifcvf_hw *hw) 50 { 51 return container_of(hw, struct ifcvf_adapter, vf); 52 } 53 54 static void __iomem *get_cap_addr(struct ifcvf_hw *hw, 55 struct virtio_pci_cap *cap) 56 { 57 struct ifcvf_adapter *ifcvf; 58 struct pci_dev *pdev; 59 u32 length, offset; 60 u8 bar; 61 62 length = le32_to_cpu(cap->length); 63 offset = le32_to_cpu(cap->offset); 64 bar = cap->bar; 65 66 ifcvf= vf_to_adapter(hw); 67 pdev = ifcvf->pdev; 68 69 if (bar >= IFCVF_PCI_MAX_RESOURCE) { 70 IFCVF_DBG(pdev, 71 "Invalid bar number %u to get capabilities\n", bar); 72 return NULL; 73 } 74 75 if (offset + length > pci_resource_len(pdev, bar)) { 76 IFCVF_DBG(pdev, 77 "offset(%u) + len(%u) overflows bar%u's capability\n", 78 offset, length, bar); 79 return NULL; 80 } 81 82 return hw->base[bar] + offset; 83 } 84 85 static int ifcvf_read_config_range(struct pci_dev *dev, 86 uint32_t *val, int size, int where) 87 { 88 int ret, i; 89 90 for (i = 0; i < size; i += 4) { 91 ret = pci_read_config_dword(dev, where + i, val + i / 4); 92 if (ret < 0) 93 return ret; 94 } 95 96 return 0; 97 } 98 99 int ifcvf_init_hw(struct ifcvf_hw *hw, struct pci_dev *pdev) 100 { 101 struct virtio_pci_cap cap; 102 u16 notify_off; 103 int ret; 104 u8 pos; 105 u32 i; 106 107 ret = pci_read_config_byte(pdev, PCI_CAPABILITY_LIST, &pos); 108 if (ret < 0) { 109 IFCVF_ERR(pdev, "Failed to read PCI capability list\n"); 110 return -EIO; 111 } 112 113 while (pos) { 114 ret = ifcvf_read_config_range(pdev, (u32 *)&cap, 115 sizeof(cap), pos); 116 if (ret < 0) { 117 IFCVF_ERR(pdev, 118 "Failed to get PCI capability at %x\n", pos); 119 break; 120 } 121 122 if (cap.cap_vndr != PCI_CAP_ID_VNDR) 123 goto next; 124 125 switch (cap.cfg_type) { 126 case VIRTIO_PCI_CAP_COMMON_CFG: 127 hw->common_cfg = get_cap_addr(hw, &cap); 128 IFCVF_DBG(pdev, "hw->common_cfg = %p\n", 129 hw->common_cfg); 130 break; 131 case VIRTIO_PCI_CAP_NOTIFY_CFG: 132 pci_read_config_dword(pdev, pos + sizeof(cap), 133 &hw->notify_off_multiplier); 134 hw->notify_bar = cap.bar; 135 hw->notify_base = get_cap_addr(hw, &cap); 136 IFCVF_DBG(pdev, "hw->notify_base = %p\n", 137 hw->notify_base); 138 break; 139 case VIRTIO_PCI_CAP_ISR_CFG: 140 hw->isr = get_cap_addr(hw, &cap); 141 IFCVF_DBG(pdev, "hw->isr = %p\n", hw->isr); 142 break; 143 case VIRTIO_PCI_CAP_DEVICE_CFG: 144 hw->net_cfg = get_cap_addr(hw, &cap); 145 IFCVF_DBG(pdev, "hw->net_cfg = %p\n", hw->net_cfg); 146 break; 147 } 148 149 next: 150 pos = cap.cap_next; 151 } 152 153 if (hw->common_cfg == NULL || hw->notify_base == NULL || 154 hw->isr == NULL || hw->net_cfg == NULL) { 155 IFCVF_ERR(pdev, "Incomplete PCI capabilities\n"); 156 return -EIO; 157 } 158 159 for (i = 0; i < IFCVF_MAX_QUEUE_PAIRS * 2; i++) { 160 ifc_iowrite16(i, &hw->common_cfg->queue_select); 161 notify_off = ifc_ioread16(&hw->common_cfg->queue_notify_off); 162 hw->vring[i].notify_addr = hw->notify_base + 163 notify_off * hw->notify_off_multiplier; 164 } 165 166 hw->lm_cfg = hw->base[IFCVF_LM_BAR]; 167 168 IFCVF_DBG(pdev, 169 "PCI capability mapping: common cfg: %p, notify base: %p\n, isr cfg: %p, device cfg: %p, multiplier: %u\n", 170 hw->common_cfg, hw->notify_base, hw->isr, 171 hw->net_cfg, hw->notify_off_multiplier); 172 173 return 0; 174 } 175 176 u8 ifcvf_get_status(struct ifcvf_hw *hw) 177 { 178 return ifc_ioread8(&hw->common_cfg->device_status); 179 } 180 181 void ifcvf_set_status(struct ifcvf_hw *hw, u8 status) 182 { 183 ifc_iowrite8(status, &hw->common_cfg->device_status); 184 } 185 186 void ifcvf_reset(struct ifcvf_hw *hw) 187 { 188 ifcvf_set_status(hw, 0); 189 /* flush set_status, make sure VF is stopped, reset */ 190 ifcvf_get_status(hw); 191 } 192 193 static void ifcvf_add_status(struct ifcvf_hw *hw, u8 status) 194 { 195 if (status != 0) 196 status |= ifcvf_get_status(hw); 197 198 ifcvf_set_status(hw, status); 199 ifcvf_get_status(hw); 200 } 201 202 u64 ifcvf_get_features(struct ifcvf_hw *hw) 203 { 204 struct virtio_pci_common_cfg __iomem *cfg = hw->common_cfg; 205 u32 features_lo, features_hi; 206 207 ifc_iowrite32(0, &cfg->device_feature_select); 208 features_lo = ifc_ioread32(&cfg->device_feature); 209 210 ifc_iowrite32(1, &cfg->device_feature_select); 211 features_hi = ifc_ioread32(&cfg->device_feature); 212 213 return ((u64)features_hi << 32) | features_lo; 214 } 215 216 void ifcvf_read_net_config(struct ifcvf_hw *hw, u64 offset, 217 void *dst, int length) 218 { 219 u8 old_gen, new_gen, *p; 220 int i; 221 222 WARN_ON(offset + length > sizeof(struct virtio_net_config)); 223 do { 224 old_gen = ifc_ioread8(&hw->common_cfg->config_generation); 225 p = dst; 226 for (i = 0; i < length; i++) 227 *p++ = ifc_ioread8(hw->net_cfg + offset + i); 228 229 new_gen = ifc_ioread8(&hw->common_cfg->config_generation); 230 } while (old_gen != new_gen); 231 } 232 233 void ifcvf_write_net_config(struct ifcvf_hw *hw, u64 offset, 234 const void *src, int length) 235 { 236 const u8 *p; 237 int i; 238 239 p = src; 240 WARN_ON(offset + length > sizeof(struct virtio_net_config)); 241 for (i = 0; i < length; i++) 242 ifc_iowrite8(*p++, hw->net_cfg + offset + i); 243 } 244 245 static void ifcvf_set_features(struct ifcvf_hw *hw, u64 features) 246 { 247 struct virtio_pci_common_cfg __iomem *cfg = hw->common_cfg; 248 249 ifc_iowrite32(0, &cfg->guest_feature_select); 250 ifc_iowrite32((u32)features, &cfg->guest_feature); 251 252 ifc_iowrite32(1, &cfg->guest_feature_select); 253 ifc_iowrite32(features >> 32, &cfg->guest_feature); 254 } 255 256 static int ifcvf_config_features(struct ifcvf_hw *hw) 257 { 258 struct ifcvf_adapter *ifcvf; 259 260 ifcvf = vf_to_adapter(hw); 261 ifcvf_set_features(hw, hw->req_features); 262 ifcvf_add_status(hw, VIRTIO_CONFIG_S_FEATURES_OK); 263 264 if (!(ifcvf_get_status(hw) & VIRTIO_CONFIG_S_FEATURES_OK)) { 265 IFCVF_ERR(ifcvf->pdev, "Failed to set FEATURES_OK status\n"); 266 return -EIO; 267 } 268 269 return 0; 270 } 271 272 u64 ifcvf_get_vq_state(struct ifcvf_hw *hw, u16 qid) 273 { 274 struct ifcvf_lm_cfg __iomem *ifcvf_lm; 275 void __iomem *avail_idx_addr; 276 u16 last_avail_idx; 277 u32 q_pair_id; 278 279 ifcvf_lm = (struct ifcvf_lm_cfg __iomem *)hw->lm_cfg; 280 q_pair_id = qid / (IFCVF_MAX_QUEUE_PAIRS * 2); 281 avail_idx_addr = &ifcvf_lm->vring_lm_cfg[q_pair_id].idx_addr[qid % 2]; 282 last_avail_idx = ifc_ioread16(avail_idx_addr); 283 284 return last_avail_idx; 285 } 286 287 int ifcvf_set_vq_state(struct ifcvf_hw *hw, u16 qid, u64 num) 288 { 289 struct ifcvf_lm_cfg __iomem *ifcvf_lm; 290 void __iomem *avail_idx_addr; 291 u32 q_pair_id; 292 293 ifcvf_lm = (struct ifcvf_lm_cfg __iomem *)hw->lm_cfg; 294 q_pair_id = qid / (IFCVF_MAX_QUEUE_PAIRS * 2); 295 avail_idx_addr = &ifcvf_lm->vring_lm_cfg[q_pair_id].idx_addr[qid % 2]; 296 hw->vring[qid].last_avail_idx = num; 297 ifc_iowrite16(num, avail_idx_addr); 298 299 return 0; 300 } 301 302 static int ifcvf_hw_enable(struct ifcvf_hw *hw) 303 { 304 struct ifcvf_lm_cfg __iomem *ifcvf_lm; 305 struct virtio_pci_common_cfg __iomem *cfg; 306 struct ifcvf_adapter *ifcvf; 307 u32 i; 308 309 ifcvf_lm = (struct ifcvf_lm_cfg __iomem *)hw->lm_cfg; 310 ifcvf = vf_to_adapter(hw); 311 cfg = hw->common_cfg; 312 ifc_iowrite16(IFCVF_MSI_CONFIG_OFF, &cfg->msix_config); 313 314 if (ifc_ioread16(&cfg->msix_config) == VIRTIO_MSI_NO_VECTOR) { 315 IFCVF_ERR(ifcvf->pdev, "No msix vector for device config\n"); 316 return -EINVAL; 317 } 318 319 for (i = 0; i < hw->nr_vring; i++) { 320 if (!hw->vring[i].ready) 321 break; 322 323 ifc_iowrite16(i, &cfg->queue_select); 324 ifc_iowrite64_twopart(hw->vring[i].desc, &cfg->queue_desc_lo, 325 &cfg->queue_desc_hi); 326 ifc_iowrite64_twopart(hw->vring[i].avail, &cfg->queue_avail_lo, 327 &cfg->queue_avail_hi); 328 ifc_iowrite64_twopart(hw->vring[i].used, &cfg->queue_used_lo, 329 &cfg->queue_used_hi); 330 ifc_iowrite16(hw->vring[i].size, &cfg->queue_size); 331 ifc_iowrite16(i + IFCVF_MSI_QUEUE_OFF, &cfg->queue_msix_vector); 332 333 if (ifc_ioread16(&cfg->queue_msix_vector) == 334 VIRTIO_MSI_NO_VECTOR) { 335 IFCVF_ERR(ifcvf->pdev, 336 "No msix vector for queue %u\n", i); 337 return -EINVAL; 338 } 339 340 ifcvf_set_vq_state(hw, i, hw->vring[i].last_avail_idx); 341 ifc_iowrite16(1, &cfg->queue_enable); 342 } 343 344 return 0; 345 } 346 347 static void ifcvf_hw_disable(struct ifcvf_hw *hw) 348 { 349 struct virtio_pci_common_cfg __iomem *cfg; 350 u32 i; 351 352 cfg = hw->common_cfg; 353 ifc_iowrite16(VIRTIO_MSI_NO_VECTOR, &cfg->msix_config); 354 355 for (i = 0; i < hw->nr_vring; i++) { 356 ifc_iowrite16(i, &cfg->queue_select); 357 ifc_iowrite16(VIRTIO_MSI_NO_VECTOR, &cfg->queue_msix_vector); 358 } 359 360 ifc_ioread16(&cfg->queue_msix_vector); 361 } 362 363 int ifcvf_start_hw(struct ifcvf_hw *hw) 364 { 365 ifcvf_reset(hw); 366 ifcvf_add_status(hw, VIRTIO_CONFIG_S_ACKNOWLEDGE); 367 ifcvf_add_status(hw, VIRTIO_CONFIG_S_DRIVER); 368 369 if (ifcvf_config_features(hw) < 0) 370 return -EINVAL; 371 372 if (ifcvf_hw_enable(hw) < 0) 373 return -EINVAL; 374 375 ifcvf_add_status(hw, VIRTIO_CONFIG_S_DRIVER_OK); 376 377 return 0; 378 } 379 380 void ifcvf_stop_hw(struct ifcvf_hw *hw) 381 { 382 ifcvf_hw_disable(hw); 383 ifcvf_reset(hw); 384 } 385 386 void ifcvf_notify_queue(struct ifcvf_hw *hw, u16 qid) 387 { 388 ifc_iowrite16(qid, hw->vring[qid].notify_addr); 389 } 390