1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2018, Richtek Technology Corporation 4 * 5 * Richtek RT1711H Type-C Chip Driver 6 */ 7 8 #include <linux/bits.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/i2c.h> 12 #include <linux/interrupt.h> 13 #include <linux/gpio/consumer.h> 14 #include <linux/usb/tcpci.h> 15 #include <linux/usb/tcpm.h> 16 #include <linux/regmap.h> 17 #include <linux/regulator/consumer.h> 18 19 #define RT1711H_VID 0x29CF 20 #define RT1711H_PID 0x1711 21 #define RT1711H_DID 0x2171 22 #define RT1715_DID 0x2173 23 24 #define RT1711H_PHYCTRL1 0x80 25 #define RT1711H_PHYCTRL2 0x81 26 27 #define RT1711H_RTCTRL4 0x93 28 /* rx threshold of rd/rp: 1b0 for level 0.4V/0.7V, 1b1 for 0.35V/0.75V */ 29 #define RT1711H_BMCIO_RXDZSEL BIT(0) 30 31 #define RT1711H_RTCTRL8 0x9B 32 /* Autoidle timeout = (tout * 2 + 1) * 6.4ms */ 33 #define RT1711H_RTCTRL8_SET(ck300, ship_off, auto_idle, tout) \ 34 (((ck300) << 7) | ((ship_off) << 5) | \ 35 ((auto_idle) << 3) | ((tout) & 0x07)) 36 #define RT1711H_AUTOIDLEEN BIT(3) 37 #define RT1711H_ENEXTMSG BIT(4) 38 39 #define RT1711H_RTCTRL11 0x9E 40 41 /* I2C timeout = (tout + 1) * 12.5ms */ 42 #define RT1711H_RTCTRL11_SET(en, tout) \ 43 (((en) << 7) | ((tout) & 0x0F)) 44 45 #define RT1711H_RTCTRL13 0xA0 46 #define RT1711H_RTCTRL14 0xA1 47 #define RT1711H_RTCTRL15 0xA2 48 #define RT1711H_RTCTRL16 0xA3 49 50 #define RT1711H_RTCTRL18 0xAF 51 /* 1b0 as fixed rx threshold of rd/rp 0.55V, 1b1 depends on RTCRTL4[0] */ 52 #define BMCIO_RXDZEN BIT(0) 53 54 struct rt1711h_chip { 55 struct tcpci_data data; 56 struct tcpci *tcpci; 57 struct device *dev; 58 struct regulator *vbus; 59 bool src_en; 60 u16 did; 61 }; 62 63 static int rt1711h_read16(struct rt1711h_chip *chip, unsigned int reg, u16 *val) 64 { 65 return regmap_raw_read(chip->data.regmap, reg, val, sizeof(u16)); 66 } 67 68 static int rt1711h_write16(struct rt1711h_chip *chip, unsigned int reg, u16 val) 69 { 70 return regmap_raw_write(chip->data.regmap, reg, &val, sizeof(u16)); 71 } 72 73 static int rt1711h_read8(struct rt1711h_chip *chip, unsigned int reg, u8 *val) 74 { 75 return regmap_raw_read(chip->data.regmap, reg, val, sizeof(u8)); 76 } 77 78 static int rt1711h_write8(struct rt1711h_chip *chip, unsigned int reg, u8 val) 79 { 80 return regmap_raw_write(chip->data.regmap, reg, &val, sizeof(u8)); 81 } 82 83 static const struct regmap_config rt1711h_regmap_config = { 84 .reg_bits = 8, 85 .val_bits = 8, 86 87 .max_register = 0xFF, /* 0x80 .. 0xFF are vendor defined */ 88 }; 89 90 static struct rt1711h_chip *tdata_to_rt1711h(struct tcpci_data *tdata) 91 { 92 return container_of(tdata, struct rt1711h_chip, data); 93 } 94 95 static int rt1711h_init(struct tcpci *tcpci, struct tcpci_data *tdata) 96 { 97 struct rt1711h_chip *chip = tdata_to_rt1711h(tdata); 98 struct regmap *regmap = chip->data.regmap; 99 int ret; 100 101 /* CK 300K from 320K, shipping off, auto_idle enable, tout = 32ms */ 102 ret = rt1711h_write8(chip, RT1711H_RTCTRL8, 103 RT1711H_RTCTRL8_SET(0, 1, 1, 2)); 104 if (ret < 0) 105 return ret; 106 107 /* Enable PD30 extended message for RT1715 */ 108 if (chip->did == RT1715_DID) { 109 ret = regmap_update_bits(regmap, RT1711H_RTCTRL8, 110 RT1711H_ENEXTMSG, RT1711H_ENEXTMSG); 111 if (ret < 0) 112 return ret; 113 } 114 115 /* I2C reset : (val + 1) * 12.5ms */ 116 ret = rt1711h_write8(chip, RT1711H_RTCTRL11, 117 RT1711H_RTCTRL11_SET(1, 0x0F)); 118 if (ret < 0) 119 return ret; 120 121 /* tTCPCfilter : (26.7 * val) us */ 122 ret = rt1711h_write8(chip, RT1711H_RTCTRL14, 0x0F); 123 if (ret < 0) 124 return ret; 125 126 /* tDRP : (51.2 + 6.4 * val) ms */ 127 ret = rt1711h_write8(chip, RT1711H_RTCTRL15, 0x04); 128 if (ret < 0) 129 return ret; 130 131 /* dcSRC.DRP : 33% */ 132 ret = rt1711h_write16(chip, RT1711H_RTCTRL16, 330); 133 if (ret < 0) 134 return ret; 135 136 /* Enable phy discard retry, retry count 7, rx filter deglitch 100 us */ 137 ret = rt1711h_write8(chip, RT1711H_PHYCTRL1, 0xF1); 138 if (ret < 0) 139 return ret; 140 141 /* Decrease wait time of BMC-encoded 1 bit from 2.67us to 2.55us */ 142 /* wait time : (val * .4167) us */ 143 return rt1711h_write8(chip, RT1711H_PHYCTRL2, 62); 144 } 145 146 static int rt1711h_set_vbus(struct tcpci *tcpci, struct tcpci_data *tdata, 147 bool src, bool snk) 148 { 149 struct rt1711h_chip *chip = tdata_to_rt1711h(tdata); 150 int ret; 151 152 if (chip->src_en == src) 153 return 0; 154 155 if (src) 156 ret = regulator_enable(chip->vbus); 157 else 158 ret = regulator_disable(chip->vbus); 159 160 if (!ret) 161 chip->src_en = src; 162 return ret; 163 } 164 165 static int rt1711h_set_vconn(struct tcpci *tcpci, struct tcpci_data *tdata, 166 bool enable) 167 { 168 struct rt1711h_chip *chip = tdata_to_rt1711h(tdata); 169 170 return regmap_update_bits(chip->data.regmap, RT1711H_RTCTRL8, 171 RT1711H_AUTOIDLEEN, enable ? 0 : RT1711H_AUTOIDLEEN); 172 } 173 174 /* 175 * Selects the CC PHY noise filter voltage level according to the remote current 176 * CC voltage level. 177 * 178 * @status: The port's current cc status read from IC 179 * Return 0 if writes succeed; failure code otherwise 180 */ 181 static inline int rt1711h_init_cc_params(struct rt1711h_chip *chip, u8 status) 182 { 183 int ret, cc1, cc2; 184 u8 role = 0; 185 u32 rxdz_en, rxdz_sel; 186 187 ret = rt1711h_read8(chip, TCPC_ROLE_CTRL, &role); 188 if (ret < 0) 189 return ret; 190 191 cc1 = tcpci_to_typec_cc((status >> TCPC_CC_STATUS_CC1_SHIFT) & 192 TCPC_CC_STATUS_CC1_MASK, 193 status & TCPC_CC_STATUS_TERM || 194 tcpc_presenting_rd(role, CC1)); 195 cc2 = tcpci_to_typec_cc((status >> TCPC_CC_STATUS_CC2_SHIFT) & 196 TCPC_CC_STATUS_CC2_MASK, 197 status & TCPC_CC_STATUS_TERM || 198 tcpc_presenting_rd(role, CC2)); 199 200 if ((cc1 >= TYPEC_CC_RP_1_5 && cc2 < TYPEC_CC_RP_DEF) || 201 (cc2 >= TYPEC_CC_RP_1_5 && cc1 < TYPEC_CC_RP_DEF)) { 202 rxdz_en = BMCIO_RXDZEN; 203 if (chip->did == RT1715_DID) 204 rxdz_sel = RT1711H_BMCIO_RXDZSEL; 205 else 206 rxdz_sel = 0; 207 } else { 208 rxdz_en = 0; 209 rxdz_sel = RT1711H_BMCIO_RXDZSEL; 210 } 211 212 ret = regmap_update_bits(chip->data.regmap, RT1711H_RTCTRL18, 213 BMCIO_RXDZEN, rxdz_en); 214 if (ret < 0) 215 return ret; 216 217 return regmap_update_bits(chip->data.regmap, RT1711H_RTCTRL4, 218 RT1711H_BMCIO_RXDZSEL, rxdz_sel); 219 } 220 221 static int rt1711h_start_drp_toggling(struct tcpci *tcpci, 222 struct tcpci_data *tdata, 223 enum typec_cc_status cc) 224 { 225 struct rt1711h_chip *chip = tdata_to_rt1711h(tdata); 226 int ret; 227 unsigned int reg = 0; 228 229 switch (cc) { 230 default: 231 case TYPEC_CC_RP_DEF: 232 reg |= (TCPC_ROLE_CTRL_RP_VAL_DEF << 233 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 234 break; 235 case TYPEC_CC_RP_1_5: 236 reg |= (TCPC_ROLE_CTRL_RP_VAL_1_5 << 237 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 238 break; 239 case TYPEC_CC_RP_3_0: 240 reg |= (TCPC_ROLE_CTRL_RP_VAL_3_0 << 241 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 242 break; 243 } 244 245 if (cc == TYPEC_CC_RD) 246 reg |= (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) | 247 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT); 248 else 249 reg |= (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) | 250 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT); 251 252 ret = rt1711h_write8(chip, TCPC_ROLE_CTRL, reg); 253 if (ret < 0) 254 return ret; 255 usleep_range(500, 1000); 256 257 return 0; 258 } 259 260 static irqreturn_t rt1711h_irq(int irq, void *dev_id) 261 { 262 int ret; 263 u16 alert; 264 u8 status; 265 struct rt1711h_chip *chip = dev_id; 266 267 if (!chip->tcpci) 268 return IRQ_HANDLED; 269 270 ret = rt1711h_read16(chip, TCPC_ALERT, &alert); 271 if (ret < 0) 272 goto out; 273 274 if (alert & TCPC_ALERT_CC_STATUS) { 275 ret = rt1711h_read8(chip, TCPC_CC_STATUS, &status); 276 if (ret < 0) 277 goto out; 278 /* Clear cc change event triggered by starting toggling */ 279 if (status & TCPC_CC_STATUS_TOGGLING) 280 rt1711h_write8(chip, TCPC_ALERT, TCPC_ALERT_CC_STATUS); 281 else 282 rt1711h_init_cc_params(chip, status); 283 } 284 285 out: 286 return tcpci_irq(chip->tcpci); 287 } 288 289 static int rt1711h_sw_reset(struct rt1711h_chip *chip) 290 { 291 int ret; 292 293 ret = rt1711h_write8(chip, RT1711H_RTCTRL13, 0x01); 294 if (ret < 0) 295 return ret; 296 297 usleep_range(1000, 2000); 298 return 0; 299 } 300 301 static int rt1711h_check_revision(struct i2c_client *i2c, struct rt1711h_chip *chip) 302 { 303 int ret; 304 305 ret = i2c_smbus_read_word_data(i2c, TCPC_VENDOR_ID); 306 if (ret < 0) 307 return ret; 308 if (ret != RT1711H_VID) { 309 dev_err(&i2c->dev, "vid is not correct, 0x%04x\n", ret); 310 return -ENODEV; 311 } 312 ret = i2c_smbus_read_word_data(i2c, TCPC_PRODUCT_ID); 313 if (ret < 0) 314 return ret; 315 if (ret != RT1711H_PID) { 316 dev_err(&i2c->dev, "pid is not correct, 0x%04x\n", ret); 317 return -ENODEV; 318 } 319 ret = i2c_smbus_read_word_data(i2c, TCPC_BCD_DEV); 320 if (ret < 0) 321 return ret; 322 if (ret != chip->did) { 323 dev_err(&i2c->dev, "did is not correct, 0x%04x\n", ret); 324 return -ENODEV; 325 } 326 dev_dbg(&i2c->dev, "did is 0x%04x\n", ret); 327 return ret; 328 } 329 330 static int rt1711h_probe(struct i2c_client *client) 331 { 332 int ret; 333 struct rt1711h_chip *chip; 334 335 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); 336 if (!chip) 337 return -ENOMEM; 338 339 chip->did = (size_t)device_get_match_data(&client->dev); 340 341 ret = rt1711h_check_revision(client, chip); 342 if (ret < 0) { 343 dev_err(&client->dev, "check vid/pid fail\n"); 344 return ret; 345 } 346 347 chip->data.regmap = devm_regmap_init_i2c(client, 348 &rt1711h_regmap_config); 349 if (IS_ERR(chip->data.regmap)) 350 return PTR_ERR(chip->data.regmap); 351 352 chip->dev = &client->dev; 353 i2c_set_clientdata(client, chip); 354 355 ret = rt1711h_sw_reset(chip); 356 if (ret < 0) 357 return ret; 358 359 /* Disable chip interrupts before requesting irq */ 360 ret = rt1711h_write16(chip, TCPC_ALERT_MASK, 0); 361 if (ret < 0) 362 return ret; 363 364 chip->vbus = devm_regulator_get(&client->dev, "vbus"); 365 if (IS_ERR(chip->vbus)) 366 return PTR_ERR(chip->vbus); 367 368 chip->data.init = rt1711h_init; 369 chip->data.set_vbus = rt1711h_set_vbus; 370 chip->data.set_vconn = rt1711h_set_vconn; 371 chip->data.start_drp_toggling = rt1711h_start_drp_toggling; 372 chip->tcpci = tcpci_register_port(chip->dev, &chip->data); 373 if (IS_ERR_OR_NULL(chip->tcpci)) 374 return PTR_ERR(chip->tcpci); 375 376 ret = devm_request_threaded_irq(chip->dev, client->irq, NULL, 377 rt1711h_irq, 378 IRQF_ONESHOT | IRQF_TRIGGER_LOW, 379 dev_name(chip->dev), chip); 380 if (ret < 0) 381 return ret; 382 enable_irq_wake(client->irq); 383 384 return 0; 385 } 386 387 static void rt1711h_remove(struct i2c_client *client) 388 { 389 struct rt1711h_chip *chip = i2c_get_clientdata(client); 390 391 tcpci_unregister_port(chip->tcpci); 392 } 393 394 static const struct i2c_device_id rt1711h_id[] = { 395 { "rt1711h", 0 }, 396 { "rt1715", 0 }, 397 { } 398 }; 399 MODULE_DEVICE_TABLE(i2c, rt1711h_id); 400 401 #ifdef CONFIG_OF 402 static const struct of_device_id rt1711h_of_match[] = { 403 { .compatible = "richtek,rt1711h", .data = (void *)RT1711H_DID }, 404 { .compatible = "richtek,rt1715", .data = (void *)RT1715_DID }, 405 {}, 406 }; 407 MODULE_DEVICE_TABLE(of, rt1711h_of_match); 408 #endif 409 410 static struct i2c_driver rt1711h_i2c_driver = { 411 .driver = { 412 .name = "rt1711h", 413 .of_match_table = of_match_ptr(rt1711h_of_match), 414 }, 415 .probe = rt1711h_probe, 416 .remove = rt1711h_remove, 417 .id_table = rt1711h_id, 418 }; 419 module_i2c_driver(rt1711h_i2c_driver); 420 421 MODULE_AUTHOR("ShuFan Lee <shufan_lee@richtek.com>"); 422 MODULE_DESCRIPTION("RT1711H USB Type-C Port Controller Interface Driver"); 423 MODULE_LICENSE("GPL"); 424