1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2020 MediaTek Inc. 4 * 5 * Author: ChiYuan Huang <cy_huang@richtek.com> 6 */ 7 8 #include <linux/interrupt.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/of.h> 12 #include <linux/platform_device.h> 13 #include <linux/regmap.h> 14 #include <linux/usb/tcpci.h> 15 #include <linux/usb/tcpm.h> 16 17 #define MT6360_REG_PHYCTRL1 0x80 18 #define MT6360_REG_PHYCTRL3 0x82 19 #define MT6360_REG_PHYCTRL7 0x86 20 #define MT6360_REG_VCONNCTRL1 0x8C 21 #define MT6360_REG_MODECTRL2 0x8F 22 #define MT6360_REG_SWRESET 0xA0 23 #define MT6360_REG_DEBCTRL1 0xA1 24 #define MT6360_REG_DRPCTRL1 0xA2 25 #define MT6360_REG_DRPCTRL2 0xA3 26 #define MT6360_REG_I2CTORST 0xBF 27 #define MT6360_REG_PHYCTRL11 0xCA 28 #define MT6360_REG_RXCTRL1 0xCE 29 #define MT6360_REG_RXCTRL2 0xCF 30 #define MT6360_REG_CTDCTRL2 0xEC 31 32 /* MT6360_REG_VCONNCTRL1 */ 33 #define MT6360_VCONNCL_ENABLE BIT(0) 34 /* MT6360_REG_RXCTRL2 */ 35 #define MT6360_OPEN40M_ENABLE BIT(7) 36 /* MT6360_REG_CTDCTRL2 */ 37 #define MT6360_RPONESHOT_ENABLE BIT(6) 38 39 struct mt6360_tcpc_info { 40 struct tcpci_data tdata; 41 struct tcpci *tcpci; 42 struct device *dev; 43 int irq; 44 }; 45 46 static inline int mt6360_tcpc_write16(struct regmap *regmap, 47 unsigned int reg, u16 val) 48 { 49 return regmap_raw_write(regmap, reg, &val, sizeof(u16)); 50 } 51 52 static int mt6360_tcpc_init(struct tcpci *tcpci, struct tcpci_data *tdata) 53 { 54 struct regmap *regmap = tdata->regmap; 55 int ret; 56 57 ret = regmap_write(regmap, MT6360_REG_SWRESET, 0x01); 58 if (ret) 59 return ret; 60 61 /* after reset command, wait 1~2ms to wait IC action */ 62 usleep_range(1000, 2000); 63 64 /* write all alert to masked */ 65 ret = mt6360_tcpc_write16(regmap, TCPC_ALERT_MASK, 0); 66 if (ret) 67 return ret; 68 69 /* config I2C timeout reset enable , and timeout to 200ms */ 70 ret = regmap_write(regmap, MT6360_REG_I2CTORST, 0x8F); 71 if (ret) 72 return ret; 73 74 /* config CC Detect Debounce : 26.7*val us */ 75 ret = regmap_write(regmap, MT6360_REG_DEBCTRL1, 0x10); 76 if (ret) 77 return ret; 78 79 /* DRP Toggle Cycle : 51.2 + 6.4*val ms */ 80 ret = regmap_write(regmap, MT6360_REG_DRPCTRL1, 4); 81 if (ret) 82 return ret; 83 84 /* DRP Duyt Ctrl : dcSRC: /1024 */ 85 ret = mt6360_tcpc_write16(regmap, MT6360_REG_DRPCTRL2, 330); 86 if (ret) 87 return ret; 88 89 /* Enable VCONN Current Limit function */ 90 ret = regmap_update_bits(regmap, MT6360_REG_VCONNCTRL1, MT6360_VCONNCL_ENABLE, 91 MT6360_VCONNCL_ENABLE); 92 if (ret) 93 return ret; 94 95 /* Enable cc open 40ms when pmic send vsysuv signal */ 96 ret = regmap_update_bits(regmap, MT6360_REG_RXCTRL2, MT6360_OPEN40M_ENABLE, 97 MT6360_OPEN40M_ENABLE); 98 if (ret) 99 return ret; 100 101 /* Enable Rpdet oneshot detection */ 102 ret = regmap_update_bits(regmap, MT6360_REG_CTDCTRL2, MT6360_RPONESHOT_ENABLE, 103 MT6360_RPONESHOT_ENABLE); 104 if (ret) 105 return ret; 106 107 /* BMC PHY */ 108 ret = mt6360_tcpc_write16(regmap, MT6360_REG_PHYCTRL1, 0x3A70); 109 if (ret) 110 return ret; 111 112 ret = regmap_write(regmap, MT6360_REG_PHYCTRL3, 0x82); 113 if (ret) 114 return ret; 115 116 ret = regmap_write(regmap, MT6360_REG_PHYCTRL7, 0x36); 117 if (ret) 118 return ret; 119 120 ret = mt6360_tcpc_write16(regmap, MT6360_REG_PHYCTRL11, 0x3C60); 121 if (ret) 122 return ret; 123 124 ret = regmap_write(regmap, MT6360_REG_RXCTRL1, 0xE8); 125 if (ret) 126 return ret; 127 128 /* Set shipping mode off, AUTOIDLE on */ 129 return regmap_write(regmap, MT6360_REG_MODECTRL2, 0x7A); 130 } 131 132 static irqreturn_t mt6360_irq(int irq, void *dev_id) 133 { 134 struct mt6360_tcpc_info *mti = dev_id; 135 136 return tcpci_irq(mti->tcpci); 137 } 138 139 static int mt6360_tcpc_probe(struct platform_device *pdev) 140 { 141 struct mt6360_tcpc_info *mti; 142 int ret; 143 144 mti = devm_kzalloc(&pdev->dev, sizeof(*mti), GFP_KERNEL); 145 if (!mti) 146 return -ENOMEM; 147 148 mti->dev = &pdev->dev; 149 150 mti->tdata.regmap = dev_get_regmap(pdev->dev.parent, NULL); 151 if (!mti->tdata.regmap) { 152 dev_err(&pdev->dev, "Failed to get parent regmap\n"); 153 return -ENODEV; 154 } 155 156 mti->irq = platform_get_irq_byname(pdev, "PD_IRQB"); 157 if (mti->irq < 0) 158 return mti->irq; 159 160 mti->tdata.init = mt6360_tcpc_init; 161 mti->tcpci = tcpci_register_port(&pdev->dev, &mti->tdata); 162 if (IS_ERR(mti->tcpci)) { 163 dev_err(&pdev->dev, "Failed to register tcpci port\n"); 164 return PTR_ERR(mti->tcpci); 165 } 166 167 ret = devm_request_threaded_irq(mti->dev, mti->irq, NULL, mt6360_irq, IRQF_ONESHOT, 168 dev_name(&pdev->dev), mti); 169 if (ret) { 170 dev_err(mti->dev, "Failed to register irq\n"); 171 tcpci_unregister_port(mti->tcpci); 172 return ret; 173 } 174 175 device_init_wakeup(&pdev->dev, true); 176 platform_set_drvdata(pdev, mti); 177 178 return 0; 179 } 180 181 static int mt6360_tcpc_remove(struct platform_device *pdev) 182 { 183 struct mt6360_tcpc_info *mti = platform_get_drvdata(pdev); 184 185 disable_irq(mti->irq); 186 tcpci_unregister_port(mti->tcpci); 187 return 0; 188 } 189 190 static int __maybe_unused mt6360_tcpc_suspend(struct device *dev) 191 { 192 struct mt6360_tcpc_info *mti = dev_get_drvdata(dev); 193 194 if (device_may_wakeup(dev)) 195 enable_irq_wake(mti->irq); 196 197 return 0; 198 } 199 200 static int __maybe_unused mt6360_tcpc_resume(struct device *dev) 201 { 202 struct mt6360_tcpc_info *mti = dev_get_drvdata(dev); 203 204 if (device_may_wakeup(dev)) 205 disable_irq_wake(mti->irq); 206 207 return 0; 208 } 209 210 static SIMPLE_DEV_PM_OPS(mt6360_tcpc_pm_ops, mt6360_tcpc_suspend, mt6360_tcpc_resume); 211 212 static const struct of_device_id __maybe_unused mt6360_tcpc_of_id[] = { 213 { .compatible = "mediatek,mt6360-tcpc", }, 214 {}, 215 }; 216 MODULE_DEVICE_TABLE(of, mt6360_tcpc_of_id); 217 218 static struct platform_driver mt6360_tcpc_driver = { 219 .driver = { 220 .name = "mt6360-tcpc", 221 .pm = &mt6360_tcpc_pm_ops, 222 .of_match_table = mt6360_tcpc_of_id, 223 }, 224 .probe = mt6360_tcpc_probe, 225 .remove = mt6360_tcpc_remove, 226 }; 227 module_platform_driver(mt6360_tcpc_driver); 228 229 MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>"); 230 MODULE_DESCRIPTION("MT6360 USB Type-C Port Controller Interface Driver"); 231 MODULE_LICENSE("GPL v2"); 232