1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright 2015-2017 Google, Inc 4 * 5 * USB Type-C Port Controller Interface. 6 */ 7 8 #include <linux/delay.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/i2c.h> 12 #include <linux/interrupt.h> 13 #include <linux/property.h> 14 #include <linux/regmap.h> 15 #include <linux/usb/pd.h> 16 #include <linux/usb/tcpci.h> 17 #include <linux/usb/tcpm.h> 18 #include <linux/usb/typec.h> 19 20 #define PD_RETRY_COUNT_DEFAULT 3 21 #define PD_RETRY_COUNT_3_0_OR_HIGHER 2 22 #define AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV 3500 23 #define VSINKPD_MIN_IR_DROP_MV 750 24 #define VSRC_NEW_MIN_PERCENT 95 25 #define VSRC_VALID_MIN_MV 500 26 #define VPPS_NEW_MIN_PERCENT 95 27 #define VPPS_VALID_MIN_MV 100 28 #define VSINKDISCONNECT_PD_MIN_PERCENT 90 29 30 struct tcpci { 31 struct device *dev; 32 33 struct tcpm_port *port; 34 35 struct regmap *regmap; 36 37 bool controls_vbus; 38 39 struct tcpc_dev tcpc; 40 struct tcpci_data *data; 41 }; 42 43 struct tcpci_chip { 44 struct tcpci *tcpci; 45 struct tcpci_data data; 46 }; 47 48 struct tcpm_port *tcpci_get_tcpm_port(struct tcpci *tcpci) 49 { 50 return tcpci->port; 51 } 52 EXPORT_SYMBOL_GPL(tcpci_get_tcpm_port); 53 54 static inline struct tcpci *tcpc_to_tcpci(struct tcpc_dev *tcpc) 55 { 56 return container_of(tcpc, struct tcpci, tcpc); 57 } 58 59 static int tcpci_read16(struct tcpci *tcpci, unsigned int reg, u16 *val) 60 { 61 return regmap_raw_read(tcpci->regmap, reg, val, sizeof(u16)); 62 } 63 64 static int tcpci_write16(struct tcpci *tcpci, unsigned int reg, u16 val) 65 { 66 return regmap_raw_write(tcpci->regmap, reg, &val, sizeof(u16)); 67 } 68 69 static int tcpci_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc) 70 { 71 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 72 bool vconn_pres; 73 enum typec_cc_polarity polarity = TYPEC_POLARITY_CC1; 74 unsigned int reg; 75 int ret; 76 77 ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®); 78 if (ret < 0) 79 return ret; 80 81 vconn_pres = !!(reg & TCPC_POWER_STATUS_VCONN_PRES); 82 if (vconn_pres) { 83 ret = regmap_read(tcpci->regmap, TCPC_TCPC_CTRL, ®); 84 if (ret < 0) 85 return ret; 86 87 if (reg & TCPC_TCPC_CTRL_ORIENTATION) 88 polarity = TYPEC_POLARITY_CC2; 89 } 90 91 switch (cc) { 92 case TYPEC_CC_RA: 93 reg = (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC1_SHIFT) | 94 (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC2_SHIFT); 95 break; 96 case TYPEC_CC_RD: 97 reg = (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) | 98 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT); 99 break; 100 case TYPEC_CC_RP_DEF: 101 reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) | 102 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) | 103 (TCPC_ROLE_CTRL_RP_VAL_DEF << 104 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 105 break; 106 case TYPEC_CC_RP_1_5: 107 reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) | 108 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) | 109 (TCPC_ROLE_CTRL_RP_VAL_1_5 << 110 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 111 break; 112 case TYPEC_CC_RP_3_0: 113 reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) | 114 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) | 115 (TCPC_ROLE_CTRL_RP_VAL_3_0 << 116 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 117 break; 118 case TYPEC_CC_OPEN: 119 default: 120 reg = (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT) | 121 (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT); 122 break; 123 } 124 125 if (vconn_pres) { 126 if (polarity == TYPEC_POLARITY_CC2) { 127 reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT); 128 reg |= (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT); 129 } else { 130 reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT); 131 reg |= (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT); 132 } 133 } 134 135 ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg); 136 if (ret < 0) 137 return ret; 138 139 return 0; 140 } 141 142 static int tcpci_apply_rc(struct tcpc_dev *tcpc, enum typec_cc_status cc, 143 enum typec_cc_polarity polarity) 144 { 145 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 146 unsigned int reg; 147 int ret; 148 149 ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, ®); 150 if (ret < 0) 151 return ret; 152 153 /* 154 * APPLY_RC state is when ROLE_CONTROL.CC1 != ROLE_CONTROL.CC2 and vbus autodischarge on 155 * disconnect is disabled. Bail out when ROLE_CONTROL.CC1 != ROLE_CONTROL.CC2. 156 */ 157 if (((reg & (TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT)) >> 158 TCPC_ROLE_CTRL_CC2_SHIFT) != 159 ((reg & (TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT)) >> 160 TCPC_ROLE_CTRL_CC1_SHIFT)) 161 return 0; 162 163 return regmap_update_bits(tcpci->regmap, TCPC_ROLE_CTRL, polarity == TYPEC_POLARITY_CC1 ? 164 TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT : 165 TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT, 166 TCPC_ROLE_CTRL_CC_OPEN); 167 } 168 169 static int tcpci_start_toggling(struct tcpc_dev *tcpc, 170 enum typec_port_type port_type, 171 enum typec_cc_status cc) 172 { 173 int ret; 174 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 175 unsigned int reg = TCPC_ROLE_CTRL_DRP; 176 177 if (port_type != TYPEC_PORT_DRP) 178 return -EOPNOTSUPP; 179 180 /* Handle vendor drp toggling */ 181 if (tcpci->data->start_drp_toggling) { 182 ret = tcpci->data->start_drp_toggling(tcpci, tcpci->data, cc); 183 if (ret < 0) 184 return ret; 185 } 186 187 switch (cc) { 188 default: 189 case TYPEC_CC_RP_DEF: 190 reg |= (TCPC_ROLE_CTRL_RP_VAL_DEF << 191 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 192 break; 193 case TYPEC_CC_RP_1_5: 194 reg |= (TCPC_ROLE_CTRL_RP_VAL_1_5 << 195 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 196 break; 197 case TYPEC_CC_RP_3_0: 198 reg |= (TCPC_ROLE_CTRL_RP_VAL_3_0 << 199 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 200 break; 201 } 202 203 if (cc == TYPEC_CC_RD) 204 reg |= (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) | 205 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT); 206 else 207 reg |= (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) | 208 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT); 209 ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg); 210 if (ret < 0) 211 return ret; 212 return regmap_write(tcpci->regmap, TCPC_COMMAND, 213 TCPC_CMD_LOOK4CONNECTION); 214 } 215 216 static int tcpci_get_cc(struct tcpc_dev *tcpc, 217 enum typec_cc_status *cc1, enum typec_cc_status *cc2) 218 { 219 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 220 unsigned int reg, role_control; 221 int ret; 222 223 ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, &role_control); 224 if (ret < 0) 225 return ret; 226 227 ret = regmap_read(tcpci->regmap, TCPC_CC_STATUS, ®); 228 if (ret < 0) 229 return ret; 230 231 *cc1 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC1_SHIFT) & 232 TCPC_CC_STATUS_CC1_MASK, 233 reg & TCPC_CC_STATUS_TERM || 234 tcpc_presenting_rd(role_control, CC1)); 235 *cc2 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC2_SHIFT) & 236 TCPC_CC_STATUS_CC2_MASK, 237 reg & TCPC_CC_STATUS_TERM || 238 tcpc_presenting_rd(role_control, CC2)); 239 240 return 0; 241 } 242 243 static int tcpci_set_polarity(struct tcpc_dev *tcpc, 244 enum typec_cc_polarity polarity) 245 { 246 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 247 unsigned int reg; 248 int ret; 249 enum typec_cc_status cc1, cc2; 250 251 /* Obtain Rp setting from role control */ 252 ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, ®); 253 if (ret < 0) 254 return ret; 255 256 ret = tcpci_get_cc(tcpc, &cc1, &cc2); 257 if (ret < 0) 258 return ret; 259 260 /* 261 * When port has drp toggling enabled, ROLE_CONTROL would only have the initial 262 * terminations for the toggling and does not indicate the final cc 263 * terminations when ConnectionResult is 0 i.e. drp toggling stops and 264 * the connection is resolved. Infer port role from TCPC_CC_STATUS based on the 265 * terminations seen. The port role is then used to set the cc terminations. 266 */ 267 if (reg & TCPC_ROLE_CTRL_DRP) { 268 /* Disable DRP for the OPEN setting to take effect */ 269 reg = reg & ~TCPC_ROLE_CTRL_DRP; 270 271 if (polarity == TYPEC_POLARITY_CC2) { 272 reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT); 273 /* Local port is source */ 274 if (cc2 == TYPEC_CC_RD) 275 /* Role control would have the Rp setting when DRP was enabled */ 276 reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT; 277 else 278 reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT; 279 } else { 280 reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT); 281 /* Local port is source */ 282 if (cc1 == TYPEC_CC_RD) 283 /* Role control would have the Rp setting when DRP was enabled */ 284 reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT; 285 else 286 reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT; 287 } 288 } 289 290 if (polarity == TYPEC_POLARITY_CC2) 291 reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT; 292 else 293 reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT; 294 ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg); 295 if (ret < 0) 296 return ret; 297 298 return regmap_write(tcpci->regmap, TCPC_TCPC_CTRL, 299 (polarity == TYPEC_POLARITY_CC2) ? 300 TCPC_TCPC_CTRL_ORIENTATION : 0); 301 } 302 303 static void tcpci_set_partner_usb_comm_capable(struct tcpc_dev *tcpc, bool capable) 304 { 305 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 306 307 if (tcpci->data->set_partner_usb_comm_capable) 308 tcpci->data->set_partner_usb_comm_capable(tcpci, tcpci->data, capable); 309 } 310 311 static int tcpci_set_vconn(struct tcpc_dev *tcpc, bool enable) 312 { 313 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 314 int ret; 315 316 /* Handle vendor set vconn */ 317 if (tcpci->data->set_vconn) { 318 ret = tcpci->data->set_vconn(tcpci, tcpci->data, enable); 319 if (ret < 0) 320 return ret; 321 } 322 323 return regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, 324 TCPC_POWER_CTRL_VCONN_ENABLE, 325 enable ? TCPC_POWER_CTRL_VCONN_ENABLE : 0); 326 } 327 328 static int tcpci_enable_auto_vbus_discharge(struct tcpc_dev *dev, bool enable) 329 { 330 struct tcpci *tcpci = tcpc_to_tcpci(dev); 331 int ret; 332 333 ret = regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_POWER_CTRL_AUTO_DISCHARGE, 334 enable ? TCPC_POWER_CTRL_AUTO_DISCHARGE : 0); 335 return ret; 336 } 337 338 static int tcpci_set_auto_vbus_discharge_threshold(struct tcpc_dev *dev, enum typec_pwr_opmode mode, 339 bool pps_active, u32 requested_vbus_voltage_mv) 340 { 341 struct tcpci *tcpci = tcpc_to_tcpci(dev); 342 unsigned int pwr_ctrl, threshold = 0; 343 int ret; 344 345 /* 346 * Indicates that vbus is going to go away due PR_SWAP, hard reset etc. 347 * Do not discharge vbus here. 348 */ 349 if (requested_vbus_voltage_mv == 0) 350 goto write_thresh; 351 352 ret = regmap_read(tcpci->regmap, TCPC_POWER_CTRL, &pwr_ctrl); 353 if (ret < 0) 354 return ret; 355 356 if (pwr_ctrl & TCPC_FAST_ROLE_SWAP_EN) { 357 /* To prevent disconnect when the source is fast role swap is capable. */ 358 threshold = AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV; 359 } else if (mode == TYPEC_PWR_MODE_PD) { 360 if (pps_active) 361 threshold = ((VPPS_NEW_MIN_PERCENT * requested_vbus_voltage_mv / 100) - 362 VSINKPD_MIN_IR_DROP_MV - VPPS_VALID_MIN_MV) * 363 VSINKDISCONNECT_PD_MIN_PERCENT / 100; 364 else 365 threshold = ((VSRC_NEW_MIN_PERCENT * requested_vbus_voltage_mv / 100) - 366 VSINKPD_MIN_IR_DROP_MV - VSRC_VALID_MIN_MV) * 367 VSINKDISCONNECT_PD_MIN_PERCENT / 100; 368 } else { 369 /* 3.5V for non-pd sink */ 370 threshold = AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV; 371 } 372 373 threshold = threshold / TCPC_VBUS_SINK_DISCONNECT_THRESH_LSB_MV; 374 375 if (threshold > TCPC_VBUS_SINK_DISCONNECT_THRESH_MAX) 376 return -EINVAL; 377 378 write_thresh: 379 return tcpci_write16(tcpci, TCPC_VBUS_SINK_DISCONNECT_THRESH, threshold); 380 } 381 382 static int tcpci_enable_frs(struct tcpc_dev *dev, bool enable) 383 { 384 struct tcpci *tcpci = tcpc_to_tcpci(dev); 385 int ret; 386 387 /* To prevent disconnect during FRS, set disconnect threshold to 3.5V */ 388 ret = tcpci_write16(tcpci, TCPC_VBUS_SINK_DISCONNECT_THRESH, enable ? 0 : 0x8c); 389 if (ret < 0) 390 return ret; 391 392 ret = regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_FAST_ROLE_SWAP_EN, enable ? 393 TCPC_FAST_ROLE_SWAP_EN : 0); 394 395 return ret; 396 } 397 398 static void tcpci_frs_sourcing_vbus(struct tcpc_dev *dev) 399 { 400 struct tcpci *tcpci = tcpc_to_tcpci(dev); 401 402 if (tcpci->data->frs_sourcing_vbus) 403 tcpci->data->frs_sourcing_vbus(tcpci, tcpci->data); 404 } 405 406 static int tcpci_set_bist_data(struct tcpc_dev *tcpc, bool enable) 407 { 408 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 409 410 return regmap_update_bits(tcpci->regmap, TCPC_TCPC_CTRL, TCPC_TCPC_CTRL_BIST_TM, 411 enable ? TCPC_TCPC_CTRL_BIST_TM : 0); 412 } 413 414 static int tcpci_set_roles(struct tcpc_dev *tcpc, bool attached, 415 enum typec_role role, enum typec_data_role data) 416 { 417 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 418 unsigned int reg; 419 int ret; 420 421 reg = PD_REV20 << TCPC_MSG_HDR_INFO_REV_SHIFT; 422 if (role == TYPEC_SOURCE) 423 reg |= TCPC_MSG_HDR_INFO_PWR_ROLE; 424 if (data == TYPEC_HOST) 425 reg |= TCPC_MSG_HDR_INFO_DATA_ROLE; 426 ret = regmap_write(tcpci->regmap, TCPC_MSG_HDR_INFO, reg); 427 if (ret < 0) 428 return ret; 429 430 return 0; 431 } 432 433 static int tcpci_set_pd_rx(struct tcpc_dev *tcpc, bool enable) 434 { 435 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 436 unsigned int reg = 0; 437 int ret; 438 439 if (enable) 440 reg = TCPC_RX_DETECT_SOP | TCPC_RX_DETECT_HARD_RESET; 441 ret = regmap_write(tcpci->regmap, TCPC_RX_DETECT, reg); 442 if (ret < 0) 443 return ret; 444 445 return 0; 446 } 447 448 static int tcpci_get_vbus(struct tcpc_dev *tcpc) 449 { 450 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 451 unsigned int reg; 452 int ret; 453 454 ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®); 455 if (ret < 0) 456 return ret; 457 458 return !!(reg & TCPC_POWER_STATUS_VBUS_PRES); 459 } 460 461 static bool tcpci_is_vbus_vsafe0v(struct tcpc_dev *tcpc) 462 { 463 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 464 unsigned int reg; 465 int ret; 466 467 ret = regmap_read(tcpci->regmap, TCPC_EXTENDED_STATUS, ®); 468 if (ret < 0) 469 return false; 470 471 return !!(reg & TCPC_EXTENDED_STATUS_VSAFE0V); 472 } 473 474 static int tcpci_set_vbus(struct tcpc_dev *tcpc, bool source, bool sink) 475 { 476 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 477 int ret; 478 479 if (tcpci->data->set_vbus) { 480 ret = tcpci->data->set_vbus(tcpci, tcpci->data, source, sink); 481 /* Bypass when ret > 0 */ 482 if (ret != 0) 483 return ret < 0 ? ret : 0; 484 } 485 486 /* Disable both source and sink first before enabling anything */ 487 488 if (!source) { 489 ret = regmap_write(tcpci->regmap, TCPC_COMMAND, 490 TCPC_CMD_DISABLE_SRC_VBUS); 491 if (ret < 0) 492 return ret; 493 } 494 495 if (!sink) { 496 ret = regmap_write(tcpci->regmap, TCPC_COMMAND, 497 TCPC_CMD_DISABLE_SINK_VBUS); 498 if (ret < 0) 499 return ret; 500 } 501 502 if (source) { 503 ret = regmap_write(tcpci->regmap, TCPC_COMMAND, 504 TCPC_CMD_SRC_VBUS_DEFAULT); 505 if (ret < 0) 506 return ret; 507 } 508 509 if (sink) { 510 ret = regmap_write(tcpci->regmap, TCPC_COMMAND, 511 TCPC_CMD_SINK_VBUS); 512 if (ret < 0) 513 return ret; 514 } 515 516 return 0; 517 } 518 519 static int tcpci_pd_transmit(struct tcpc_dev *tcpc, enum tcpm_transmit_type type, 520 const struct pd_message *msg, unsigned int negotiated_rev) 521 { 522 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 523 u16 header = msg ? le16_to_cpu(msg->header) : 0; 524 unsigned int reg, cnt; 525 int ret; 526 527 cnt = msg ? pd_header_cnt(header) * 4 : 0; 528 /** 529 * TCPCI spec forbids direct access of TCPC_TX_DATA. 530 * But, since some of the chipsets offer this capability, 531 * it's fair to support both. 532 */ 533 if (tcpci->data->TX_BUF_BYTE_x_hidden) { 534 u8 buf[TCPC_TRANSMIT_BUFFER_MAX_LEN] = {0,}; 535 u8 pos = 0; 536 537 /* Payload + header + TCPC_TX_BYTE_CNT */ 538 buf[pos++] = cnt + 2; 539 540 if (msg) 541 memcpy(&buf[pos], &msg->header, sizeof(msg->header)); 542 543 pos += sizeof(header); 544 545 if (cnt > 0) 546 memcpy(&buf[pos], msg->payload, cnt); 547 548 pos += cnt; 549 ret = regmap_raw_write(tcpci->regmap, TCPC_TX_BYTE_CNT, buf, pos); 550 if (ret < 0) 551 return ret; 552 } else { 553 ret = regmap_write(tcpci->regmap, TCPC_TX_BYTE_CNT, cnt + 2); 554 if (ret < 0) 555 return ret; 556 557 ret = tcpci_write16(tcpci, TCPC_TX_HDR, header); 558 if (ret < 0) 559 return ret; 560 561 if (cnt > 0) { 562 ret = regmap_raw_write(tcpci->regmap, TCPC_TX_DATA, &msg->payload, cnt); 563 if (ret < 0) 564 return ret; 565 } 566 } 567 568 /* nRetryCount is 3 in PD2.0 spec where 2 in PD3.0 spec */ 569 reg = ((negotiated_rev > PD_REV20 ? PD_RETRY_COUNT_3_0_OR_HIGHER : PD_RETRY_COUNT_DEFAULT) 570 << TCPC_TRANSMIT_RETRY_SHIFT) | (type << TCPC_TRANSMIT_TYPE_SHIFT); 571 ret = regmap_write(tcpci->regmap, TCPC_TRANSMIT, reg); 572 if (ret < 0) 573 return ret; 574 575 return 0; 576 } 577 578 static int tcpci_init(struct tcpc_dev *tcpc) 579 { 580 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 581 unsigned long timeout = jiffies + msecs_to_jiffies(2000); /* XXX */ 582 unsigned int reg; 583 int ret; 584 585 while (time_before_eq(jiffies, timeout)) { 586 ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®); 587 if (ret < 0) 588 return ret; 589 if (!(reg & TCPC_POWER_STATUS_UNINIT)) 590 break; 591 usleep_range(10000, 20000); 592 } 593 if (time_after(jiffies, timeout)) 594 return -ETIMEDOUT; 595 596 /* Handle vendor init */ 597 if (tcpci->data->init) { 598 ret = tcpci->data->init(tcpci, tcpci->data); 599 if (ret < 0) 600 return ret; 601 } 602 603 /* Clear all events */ 604 ret = tcpci_write16(tcpci, TCPC_ALERT, 0xffff); 605 if (ret < 0) 606 return ret; 607 608 if (tcpci->controls_vbus) 609 reg = TCPC_POWER_STATUS_VBUS_PRES; 610 else 611 reg = 0; 612 ret = regmap_write(tcpci->regmap, TCPC_POWER_STATUS_MASK, reg); 613 if (ret < 0) 614 return ret; 615 616 /* Enable Vbus detection */ 617 ret = regmap_write(tcpci->regmap, TCPC_COMMAND, 618 TCPC_CMD_ENABLE_VBUS_DETECT); 619 if (ret < 0) 620 return ret; 621 622 reg = TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_FAILED | 623 TCPC_ALERT_TX_DISCARDED | TCPC_ALERT_RX_STATUS | 624 TCPC_ALERT_RX_HARD_RST | TCPC_ALERT_CC_STATUS; 625 if (tcpci->controls_vbus) 626 reg |= TCPC_ALERT_POWER_STATUS; 627 /* Enable VSAFE0V status interrupt when detecting VSAFE0V is supported */ 628 if (tcpci->data->vbus_vsafe0v) { 629 reg |= TCPC_ALERT_EXTENDED_STATUS; 630 ret = regmap_write(tcpci->regmap, TCPC_EXTENDED_STATUS_MASK, 631 TCPC_EXTENDED_STATUS_VSAFE0V); 632 if (ret < 0) 633 return ret; 634 } 635 return tcpci_write16(tcpci, TCPC_ALERT_MASK, reg); 636 } 637 638 irqreturn_t tcpci_irq(struct tcpci *tcpci) 639 { 640 u16 status; 641 int ret; 642 unsigned int raw; 643 644 tcpci_read16(tcpci, TCPC_ALERT, &status); 645 646 /* 647 * Clear alert status for everything except RX_STATUS, which shouldn't 648 * be cleared until we have successfully retrieved message. 649 */ 650 if (status & ~TCPC_ALERT_RX_STATUS) 651 tcpci_write16(tcpci, TCPC_ALERT, 652 status & ~TCPC_ALERT_RX_STATUS); 653 654 if (status & TCPC_ALERT_CC_STATUS) 655 tcpm_cc_change(tcpci->port); 656 657 if (status & TCPC_ALERT_POWER_STATUS) { 658 regmap_read(tcpci->regmap, TCPC_POWER_STATUS_MASK, &raw); 659 /* 660 * If power status mask has been reset, then the TCPC 661 * has reset. 662 */ 663 if (raw == 0xff) 664 tcpm_tcpc_reset(tcpci->port); 665 else 666 tcpm_vbus_change(tcpci->port); 667 } 668 669 if (status & TCPC_ALERT_RX_STATUS) { 670 struct pd_message msg; 671 unsigned int cnt, payload_cnt; 672 u16 header; 673 674 regmap_read(tcpci->regmap, TCPC_RX_BYTE_CNT, &cnt); 675 /* 676 * 'cnt' corresponds to READABLE_BYTE_COUNT in section 4.4.14 677 * of the TCPCI spec [Rev 2.0 Ver 1.0 October 2017] and is 678 * defined in table 4-36 as one greater than the number of 679 * bytes received. And that number includes the header. So: 680 */ 681 if (cnt > 3) 682 payload_cnt = cnt - (1 + sizeof(msg.header)); 683 else 684 payload_cnt = 0; 685 686 tcpci_read16(tcpci, TCPC_RX_HDR, &header); 687 msg.header = cpu_to_le16(header); 688 689 if (WARN_ON(payload_cnt > sizeof(msg.payload))) 690 payload_cnt = sizeof(msg.payload); 691 692 if (payload_cnt > 0) 693 regmap_raw_read(tcpci->regmap, TCPC_RX_DATA, 694 &msg.payload, payload_cnt); 695 696 /* Read complete, clear RX status alert bit */ 697 tcpci_write16(tcpci, TCPC_ALERT, TCPC_ALERT_RX_STATUS); 698 699 tcpm_pd_receive(tcpci->port, &msg); 700 } 701 702 if (tcpci->data->vbus_vsafe0v && (status & TCPC_ALERT_EXTENDED_STATUS)) { 703 ret = regmap_read(tcpci->regmap, TCPC_EXTENDED_STATUS, &raw); 704 if (!ret && (raw & TCPC_EXTENDED_STATUS_VSAFE0V)) 705 tcpm_vbus_change(tcpci->port); 706 } 707 708 if (status & TCPC_ALERT_RX_HARD_RST) 709 tcpm_pd_hard_reset(tcpci->port); 710 711 if (status & TCPC_ALERT_TX_SUCCESS) 712 tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_SUCCESS); 713 else if (status & TCPC_ALERT_TX_DISCARDED) 714 tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_DISCARDED); 715 else if (status & TCPC_ALERT_TX_FAILED) 716 tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_FAILED); 717 718 return IRQ_HANDLED; 719 } 720 EXPORT_SYMBOL_GPL(tcpci_irq); 721 722 static irqreturn_t _tcpci_irq(int irq, void *dev_id) 723 { 724 struct tcpci_chip *chip = dev_id; 725 726 return tcpci_irq(chip->tcpci); 727 } 728 729 static const struct regmap_config tcpci_regmap_config = { 730 .reg_bits = 8, 731 .val_bits = 8, 732 733 .max_register = 0x7F, /* 0x80 .. 0xFF are vendor defined */ 734 }; 735 736 static int tcpci_parse_config(struct tcpci *tcpci) 737 { 738 tcpci->controls_vbus = true; /* XXX */ 739 740 tcpci->tcpc.fwnode = device_get_named_child_node(tcpci->dev, 741 "connector"); 742 if (!tcpci->tcpc.fwnode) { 743 dev_err(tcpci->dev, "Can't find connector node.\n"); 744 return -EINVAL; 745 } 746 747 return 0; 748 } 749 750 struct tcpci *tcpci_register_port(struct device *dev, struct tcpci_data *data) 751 { 752 struct tcpci *tcpci; 753 int err; 754 755 tcpci = devm_kzalloc(dev, sizeof(*tcpci), GFP_KERNEL); 756 if (!tcpci) 757 return ERR_PTR(-ENOMEM); 758 759 tcpci->dev = dev; 760 tcpci->data = data; 761 tcpci->regmap = data->regmap; 762 763 tcpci->tcpc.init = tcpci_init; 764 tcpci->tcpc.get_vbus = tcpci_get_vbus; 765 tcpci->tcpc.set_vbus = tcpci_set_vbus; 766 tcpci->tcpc.set_cc = tcpci_set_cc; 767 tcpci->tcpc.apply_rc = tcpci_apply_rc; 768 tcpci->tcpc.get_cc = tcpci_get_cc; 769 tcpci->tcpc.set_polarity = tcpci_set_polarity; 770 tcpci->tcpc.set_vconn = tcpci_set_vconn; 771 tcpci->tcpc.start_toggling = tcpci_start_toggling; 772 773 tcpci->tcpc.set_pd_rx = tcpci_set_pd_rx; 774 tcpci->tcpc.set_roles = tcpci_set_roles; 775 tcpci->tcpc.pd_transmit = tcpci_pd_transmit; 776 tcpci->tcpc.set_bist_data = tcpci_set_bist_data; 777 tcpci->tcpc.enable_frs = tcpci_enable_frs; 778 tcpci->tcpc.frs_sourcing_vbus = tcpci_frs_sourcing_vbus; 779 tcpci->tcpc.set_partner_usb_comm_capable = tcpci_set_partner_usb_comm_capable; 780 781 if (tcpci->data->auto_discharge_disconnect) { 782 tcpci->tcpc.enable_auto_vbus_discharge = tcpci_enable_auto_vbus_discharge; 783 tcpci->tcpc.set_auto_vbus_discharge_threshold = 784 tcpci_set_auto_vbus_discharge_threshold; 785 regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_POWER_CTRL_BLEED_DISCHARGE, 786 TCPC_POWER_CTRL_BLEED_DISCHARGE); 787 } 788 789 if (tcpci->data->vbus_vsafe0v) 790 tcpci->tcpc.is_vbus_vsafe0v = tcpci_is_vbus_vsafe0v; 791 792 err = tcpci_parse_config(tcpci); 793 if (err < 0) 794 return ERR_PTR(err); 795 796 tcpci->port = tcpm_register_port(tcpci->dev, &tcpci->tcpc); 797 if (IS_ERR(tcpci->port)) { 798 fwnode_handle_put(tcpci->tcpc.fwnode); 799 return ERR_CAST(tcpci->port); 800 } 801 802 return tcpci; 803 } 804 EXPORT_SYMBOL_GPL(tcpci_register_port); 805 806 void tcpci_unregister_port(struct tcpci *tcpci) 807 { 808 tcpm_unregister_port(tcpci->port); 809 fwnode_handle_put(tcpci->tcpc.fwnode); 810 } 811 EXPORT_SYMBOL_GPL(tcpci_unregister_port); 812 813 static int tcpci_probe(struct i2c_client *client) 814 { 815 struct tcpci_chip *chip; 816 int err; 817 u16 val = 0; 818 819 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); 820 if (!chip) 821 return -ENOMEM; 822 823 chip->data.regmap = devm_regmap_init_i2c(client, &tcpci_regmap_config); 824 if (IS_ERR(chip->data.regmap)) 825 return PTR_ERR(chip->data.regmap); 826 827 i2c_set_clientdata(client, chip); 828 829 /* Disable chip interrupts before requesting irq */ 830 err = regmap_raw_write(chip->data.regmap, TCPC_ALERT_MASK, &val, 831 sizeof(u16)); 832 if (err < 0) 833 return err; 834 835 chip->tcpci = tcpci_register_port(&client->dev, &chip->data); 836 if (IS_ERR(chip->tcpci)) 837 return PTR_ERR(chip->tcpci); 838 839 err = devm_request_threaded_irq(&client->dev, client->irq, NULL, 840 _tcpci_irq, 841 IRQF_ONESHOT | IRQF_TRIGGER_LOW, 842 dev_name(&client->dev), chip); 843 if (err < 0) { 844 tcpci_unregister_port(chip->tcpci); 845 return err; 846 } 847 848 return 0; 849 } 850 851 static void tcpci_remove(struct i2c_client *client) 852 { 853 struct tcpci_chip *chip = i2c_get_clientdata(client); 854 int err; 855 856 /* Disable chip interrupts before unregistering port */ 857 err = tcpci_write16(chip->tcpci, TCPC_ALERT_MASK, 0); 858 if (err < 0) 859 dev_warn(&client->dev, "Failed to disable irqs (%pe)\n", ERR_PTR(err)); 860 861 tcpci_unregister_port(chip->tcpci); 862 } 863 864 static const struct i2c_device_id tcpci_id[] = { 865 { "tcpci", 0 }, 866 { } 867 }; 868 MODULE_DEVICE_TABLE(i2c, tcpci_id); 869 870 #ifdef CONFIG_OF 871 static const struct of_device_id tcpci_of_match[] = { 872 { .compatible = "nxp,ptn5110", }, 873 {}, 874 }; 875 MODULE_DEVICE_TABLE(of, tcpci_of_match); 876 #endif 877 878 static struct i2c_driver tcpci_i2c_driver = { 879 .driver = { 880 .name = "tcpci", 881 .of_match_table = of_match_ptr(tcpci_of_match), 882 }, 883 .probe_new = tcpci_probe, 884 .remove = tcpci_remove, 885 .id_table = tcpci_id, 886 }; 887 module_i2c_driver(tcpci_i2c_driver); 888 889 MODULE_DESCRIPTION("USB Type-C Port Controller Interface driver"); 890 MODULE_LICENSE("GPL"); 891