1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright 2015-2017 Google, Inc 4 * 5 * USB Type-C Port Controller Interface. 6 */ 7 8 #include <linux/delay.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/i2c.h> 12 #include <linux/interrupt.h> 13 #include <linux/property.h> 14 #include <linux/regmap.h> 15 #include <linux/usb/pd.h> 16 #include <linux/usb/tcpm.h> 17 #include <linux/usb/typec.h> 18 19 #include "tcpci.h" 20 21 #define PD_RETRY_COUNT_DEFAULT 3 22 #define PD_RETRY_COUNT_3_0_OR_HIGHER 2 23 #define AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV 3500 24 #define VSINKPD_MIN_IR_DROP_MV 750 25 #define VSRC_NEW_MIN_PERCENT 95 26 #define VSRC_VALID_MIN_MV 500 27 #define VPPS_NEW_MIN_PERCENT 95 28 #define VPPS_VALID_MIN_MV 100 29 #define VSINKDISCONNECT_PD_MIN_PERCENT 90 30 31 #define tcpc_presenting_rd(reg, cc) \ 32 (!(TCPC_ROLE_CTRL_DRP & (reg)) && \ 33 (((reg) & (TCPC_ROLE_CTRL_## cc ##_MASK << TCPC_ROLE_CTRL_## cc ##_SHIFT)) == \ 34 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_## cc ##_SHIFT))) 35 36 struct tcpci { 37 struct device *dev; 38 39 struct tcpm_port *port; 40 41 struct regmap *regmap; 42 43 bool controls_vbus; 44 45 struct tcpc_dev tcpc; 46 struct tcpci_data *data; 47 }; 48 49 struct tcpci_chip { 50 struct tcpci *tcpci; 51 struct tcpci_data data; 52 }; 53 54 struct tcpm_port *tcpci_get_tcpm_port(struct tcpci *tcpci) 55 { 56 return tcpci->port; 57 } 58 EXPORT_SYMBOL_GPL(tcpci_get_tcpm_port); 59 60 static inline struct tcpci *tcpc_to_tcpci(struct tcpc_dev *tcpc) 61 { 62 return container_of(tcpc, struct tcpci, tcpc); 63 } 64 65 static int tcpci_read16(struct tcpci *tcpci, unsigned int reg, u16 *val) 66 { 67 return regmap_raw_read(tcpci->regmap, reg, val, sizeof(u16)); 68 } 69 70 static int tcpci_write16(struct tcpci *tcpci, unsigned int reg, u16 val) 71 { 72 return regmap_raw_write(tcpci->regmap, reg, &val, sizeof(u16)); 73 } 74 75 static int tcpci_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc) 76 { 77 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 78 unsigned int reg; 79 int ret; 80 81 switch (cc) { 82 case TYPEC_CC_RA: 83 reg = (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC1_SHIFT) | 84 (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC2_SHIFT); 85 break; 86 case TYPEC_CC_RD: 87 reg = (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) | 88 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT); 89 break; 90 case TYPEC_CC_RP_DEF: 91 reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) | 92 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) | 93 (TCPC_ROLE_CTRL_RP_VAL_DEF << 94 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 95 break; 96 case TYPEC_CC_RP_1_5: 97 reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) | 98 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) | 99 (TCPC_ROLE_CTRL_RP_VAL_1_5 << 100 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 101 break; 102 case TYPEC_CC_RP_3_0: 103 reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) | 104 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) | 105 (TCPC_ROLE_CTRL_RP_VAL_3_0 << 106 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 107 break; 108 case TYPEC_CC_OPEN: 109 default: 110 reg = (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT) | 111 (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT); 112 break; 113 } 114 115 ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg); 116 if (ret < 0) 117 return ret; 118 119 return 0; 120 } 121 122 static int tcpci_apply_rc(struct tcpc_dev *tcpc, enum typec_cc_status cc, 123 enum typec_cc_polarity polarity) 124 { 125 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 126 unsigned int reg; 127 int ret; 128 129 ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, ®); 130 if (ret < 0) 131 return ret; 132 133 /* 134 * APPLY_RC state is when ROLE_CONTROL.CC1 != ROLE_CONTROL.CC2 and vbus autodischarge on 135 * disconnect is disabled. Bail out when ROLE_CONTROL.CC1 != ROLE_CONTROL.CC2. 136 */ 137 if (((reg & (TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT)) >> 138 TCPC_ROLE_CTRL_CC2_SHIFT) != 139 ((reg & (TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT)) >> 140 TCPC_ROLE_CTRL_CC1_SHIFT)) 141 return 0; 142 143 return regmap_update_bits(tcpci->regmap, TCPC_ROLE_CTRL, polarity == TYPEC_POLARITY_CC1 ? 144 TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT : 145 TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT, 146 TCPC_ROLE_CTRL_CC_OPEN); 147 } 148 149 static int tcpci_start_toggling(struct tcpc_dev *tcpc, 150 enum typec_port_type port_type, 151 enum typec_cc_status cc) 152 { 153 int ret; 154 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 155 unsigned int reg = TCPC_ROLE_CTRL_DRP; 156 157 if (port_type != TYPEC_PORT_DRP) 158 return -EOPNOTSUPP; 159 160 /* Handle vendor drp toggling */ 161 if (tcpci->data->start_drp_toggling) { 162 ret = tcpci->data->start_drp_toggling(tcpci, tcpci->data, cc); 163 if (ret < 0) 164 return ret; 165 } 166 167 switch (cc) { 168 default: 169 case TYPEC_CC_RP_DEF: 170 reg |= (TCPC_ROLE_CTRL_RP_VAL_DEF << 171 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 172 break; 173 case TYPEC_CC_RP_1_5: 174 reg |= (TCPC_ROLE_CTRL_RP_VAL_1_5 << 175 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 176 break; 177 case TYPEC_CC_RP_3_0: 178 reg |= (TCPC_ROLE_CTRL_RP_VAL_3_0 << 179 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 180 break; 181 } 182 183 if (cc == TYPEC_CC_RD) 184 reg |= (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) | 185 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT); 186 else 187 reg |= (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) | 188 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT); 189 ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg); 190 if (ret < 0) 191 return ret; 192 return regmap_write(tcpci->regmap, TCPC_COMMAND, 193 TCPC_CMD_LOOK4CONNECTION); 194 } 195 196 static enum typec_cc_status tcpci_to_typec_cc(unsigned int cc, bool sink) 197 { 198 switch (cc) { 199 case 0x1: 200 return sink ? TYPEC_CC_RP_DEF : TYPEC_CC_RA; 201 case 0x2: 202 return sink ? TYPEC_CC_RP_1_5 : TYPEC_CC_RD; 203 case 0x3: 204 if (sink) 205 return TYPEC_CC_RP_3_0; 206 fallthrough; 207 case 0x0: 208 default: 209 return TYPEC_CC_OPEN; 210 } 211 } 212 213 static int tcpci_get_cc(struct tcpc_dev *tcpc, 214 enum typec_cc_status *cc1, enum typec_cc_status *cc2) 215 { 216 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 217 unsigned int reg, role_control; 218 int ret; 219 220 ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, &role_control); 221 if (ret < 0) 222 return ret; 223 224 ret = regmap_read(tcpci->regmap, TCPC_CC_STATUS, ®); 225 if (ret < 0) 226 return ret; 227 228 *cc1 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC1_SHIFT) & 229 TCPC_CC_STATUS_CC1_MASK, 230 reg & TCPC_CC_STATUS_TERM || 231 tcpc_presenting_rd(role_control, CC1)); 232 *cc2 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC2_SHIFT) & 233 TCPC_CC_STATUS_CC2_MASK, 234 reg & TCPC_CC_STATUS_TERM || 235 tcpc_presenting_rd(role_control, CC2)); 236 237 return 0; 238 } 239 240 static int tcpci_set_polarity(struct tcpc_dev *tcpc, 241 enum typec_cc_polarity polarity) 242 { 243 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 244 unsigned int reg; 245 int ret; 246 enum typec_cc_status cc1, cc2; 247 248 /* Obtain Rp setting from role control */ 249 ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, ®); 250 if (ret < 0) 251 return ret; 252 253 ret = tcpci_get_cc(tcpc, &cc1, &cc2); 254 if (ret < 0) 255 return ret; 256 257 /* 258 * When port has drp toggling enabled, ROLE_CONTROL would only have the initial 259 * terminations for the toggling and does not indicate the final cc 260 * terminations when ConnectionResult is 0 i.e. drp toggling stops and 261 * the connection is resolbed. Infer port role from TCPC_CC_STATUS based on the 262 * terminations seen. The port role is then used to set the cc terminations. 263 */ 264 if (reg & TCPC_ROLE_CTRL_DRP) { 265 /* Disable DRP for the OPEN setting to take effect */ 266 reg = reg & ~TCPC_ROLE_CTRL_DRP; 267 268 if (polarity == TYPEC_POLARITY_CC2) { 269 reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT); 270 /* Local port is source */ 271 if (cc2 == TYPEC_CC_RD) 272 /* Role control would have the Rp setting when DRP was enabled */ 273 reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT; 274 else 275 reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT; 276 } else { 277 reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT); 278 /* Local port is source */ 279 if (cc1 == TYPEC_CC_RD) 280 /* Role control would have the Rp setting when DRP was enabled */ 281 reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT; 282 else 283 reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT; 284 } 285 } 286 287 if (polarity == TYPEC_POLARITY_CC2) 288 reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT; 289 else 290 reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT; 291 ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg); 292 if (ret < 0) 293 return ret; 294 295 return regmap_write(tcpci->regmap, TCPC_TCPC_CTRL, 296 (polarity == TYPEC_POLARITY_CC2) ? 297 TCPC_TCPC_CTRL_ORIENTATION : 0); 298 } 299 300 static void tcpci_set_partner_usb_comm_capable(struct tcpc_dev *tcpc, bool capable) 301 { 302 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 303 304 if (tcpci->data->set_partner_usb_comm_capable) 305 tcpci->data->set_partner_usb_comm_capable(tcpci, tcpci->data, capable); 306 } 307 308 static int tcpci_set_vconn(struct tcpc_dev *tcpc, bool enable) 309 { 310 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 311 int ret; 312 313 /* Handle vendor set vconn */ 314 if (tcpci->data->set_vconn) { 315 ret = tcpci->data->set_vconn(tcpci, tcpci->data, enable); 316 if (ret < 0) 317 return ret; 318 } 319 320 return regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, 321 TCPC_POWER_CTRL_VCONN_ENABLE, 322 enable ? TCPC_POWER_CTRL_VCONN_ENABLE : 0); 323 } 324 325 static int tcpci_enable_auto_vbus_discharge(struct tcpc_dev *dev, bool enable) 326 { 327 struct tcpci *tcpci = tcpc_to_tcpci(dev); 328 int ret; 329 330 ret = regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_POWER_CTRL_AUTO_DISCHARGE, 331 enable ? TCPC_POWER_CTRL_AUTO_DISCHARGE : 0); 332 return ret; 333 } 334 335 static int tcpci_set_auto_vbus_discharge_threshold(struct tcpc_dev *dev, enum typec_pwr_opmode mode, 336 bool pps_active, u32 requested_vbus_voltage_mv) 337 { 338 struct tcpci *tcpci = tcpc_to_tcpci(dev); 339 unsigned int pwr_ctrl, threshold = 0; 340 int ret; 341 342 /* 343 * Indicates that vbus is going to go away due PR_SWAP, hard reset etc. 344 * Do not discharge vbus here. 345 */ 346 if (requested_vbus_voltage_mv == 0) 347 goto write_thresh; 348 349 ret = regmap_read(tcpci->regmap, TCPC_POWER_CTRL, &pwr_ctrl); 350 if (ret < 0) 351 return ret; 352 353 if (pwr_ctrl & TCPC_FAST_ROLE_SWAP_EN) { 354 /* To prevent disconnect when the source is fast role swap is capable. */ 355 threshold = AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV; 356 } else if (mode == TYPEC_PWR_MODE_PD) { 357 if (pps_active) 358 threshold = ((VPPS_NEW_MIN_PERCENT * requested_vbus_voltage_mv / 100) - 359 VSINKPD_MIN_IR_DROP_MV - VPPS_VALID_MIN_MV) * 360 VSINKDISCONNECT_PD_MIN_PERCENT / 100; 361 else 362 threshold = ((VSRC_NEW_MIN_PERCENT * requested_vbus_voltage_mv / 100) - 363 VSINKPD_MIN_IR_DROP_MV - VSRC_VALID_MIN_MV) * 364 VSINKDISCONNECT_PD_MIN_PERCENT / 100; 365 } else { 366 /* 3.5V for non-pd sink */ 367 threshold = AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV; 368 } 369 370 threshold = threshold / TCPC_VBUS_SINK_DISCONNECT_THRESH_LSB_MV; 371 372 if (threshold > TCPC_VBUS_SINK_DISCONNECT_THRESH_MAX) 373 return -EINVAL; 374 375 write_thresh: 376 return tcpci_write16(tcpci, TCPC_VBUS_SINK_DISCONNECT_THRESH, threshold); 377 } 378 379 static int tcpci_enable_frs(struct tcpc_dev *dev, bool enable) 380 { 381 struct tcpci *tcpci = tcpc_to_tcpci(dev); 382 int ret; 383 384 /* To prevent disconnect during FRS, set disconnect threshold to 3.5V */ 385 ret = tcpci_write16(tcpci, TCPC_VBUS_SINK_DISCONNECT_THRESH, enable ? 0 : 0x8c); 386 if (ret < 0) 387 return ret; 388 389 ret = regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_FAST_ROLE_SWAP_EN, enable ? 390 TCPC_FAST_ROLE_SWAP_EN : 0); 391 392 return ret; 393 } 394 395 static void tcpci_frs_sourcing_vbus(struct tcpc_dev *dev) 396 { 397 struct tcpci *tcpci = tcpc_to_tcpci(dev); 398 399 if (tcpci->data->frs_sourcing_vbus) 400 tcpci->data->frs_sourcing_vbus(tcpci, tcpci->data); 401 } 402 403 static int tcpci_set_bist_data(struct tcpc_dev *tcpc, bool enable) 404 { 405 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 406 407 return regmap_update_bits(tcpci->regmap, TCPC_TCPC_CTRL, TCPC_TCPC_CTRL_BIST_TM, 408 enable ? TCPC_TCPC_CTRL_BIST_TM : 0); 409 } 410 411 static int tcpci_set_roles(struct tcpc_dev *tcpc, bool attached, 412 enum typec_role role, enum typec_data_role data) 413 { 414 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 415 unsigned int reg; 416 int ret; 417 418 reg = PD_REV20 << TCPC_MSG_HDR_INFO_REV_SHIFT; 419 if (role == TYPEC_SOURCE) 420 reg |= TCPC_MSG_HDR_INFO_PWR_ROLE; 421 if (data == TYPEC_HOST) 422 reg |= TCPC_MSG_HDR_INFO_DATA_ROLE; 423 ret = regmap_write(tcpci->regmap, TCPC_MSG_HDR_INFO, reg); 424 if (ret < 0) 425 return ret; 426 427 return 0; 428 } 429 430 static int tcpci_set_pd_rx(struct tcpc_dev *tcpc, bool enable) 431 { 432 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 433 unsigned int reg = 0; 434 int ret; 435 436 if (enable) 437 reg = TCPC_RX_DETECT_SOP | TCPC_RX_DETECT_HARD_RESET; 438 ret = regmap_write(tcpci->regmap, TCPC_RX_DETECT, reg); 439 if (ret < 0) 440 return ret; 441 442 return 0; 443 } 444 445 static int tcpci_get_vbus(struct tcpc_dev *tcpc) 446 { 447 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 448 unsigned int reg; 449 int ret; 450 451 ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®); 452 if (ret < 0) 453 return ret; 454 455 return !!(reg & TCPC_POWER_STATUS_VBUS_PRES); 456 } 457 458 static bool tcpci_is_vbus_vsafe0v(struct tcpc_dev *tcpc) 459 { 460 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 461 unsigned int reg; 462 int ret; 463 464 ret = regmap_read(tcpci->regmap, TCPC_EXTENDED_STATUS, ®); 465 if (ret < 0) 466 return false; 467 468 return !!(reg & TCPC_EXTENDED_STATUS_VSAFE0V); 469 } 470 471 static int tcpci_set_vbus(struct tcpc_dev *tcpc, bool source, bool sink) 472 { 473 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 474 int ret; 475 476 if (tcpci->data->set_vbus) { 477 ret = tcpci->data->set_vbus(tcpci, tcpci->data, source, sink); 478 /* Bypass when ret > 0 */ 479 if (ret != 0) 480 return ret < 0 ? ret : 0; 481 } 482 483 /* Disable both source and sink first before enabling anything */ 484 485 if (!source) { 486 ret = regmap_write(tcpci->regmap, TCPC_COMMAND, 487 TCPC_CMD_DISABLE_SRC_VBUS); 488 if (ret < 0) 489 return ret; 490 } 491 492 if (!sink) { 493 ret = regmap_write(tcpci->regmap, TCPC_COMMAND, 494 TCPC_CMD_DISABLE_SINK_VBUS); 495 if (ret < 0) 496 return ret; 497 } 498 499 if (source) { 500 ret = regmap_write(tcpci->regmap, TCPC_COMMAND, 501 TCPC_CMD_SRC_VBUS_DEFAULT); 502 if (ret < 0) 503 return ret; 504 } 505 506 if (sink) { 507 ret = regmap_write(tcpci->regmap, TCPC_COMMAND, 508 TCPC_CMD_SINK_VBUS); 509 if (ret < 0) 510 return ret; 511 } 512 513 return 0; 514 } 515 516 static int tcpci_pd_transmit(struct tcpc_dev *tcpc, enum tcpm_transmit_type type, 517 const struct pd_message *msg, unsigned int negotiated_rev) 518 { 519 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 520 u16 header = msg ? le16_to_cpu(msg->header) : 0; 521 unsigned int reg, cnt; 522 int ret; 523 524 cnt = msg ? pd_header_cnt(header) * 4 : 0; 525 /** 526 * TCPCI spec forbids direct access of TCPC_TX_DATA. 527 * But, since some of the chipsets offer this capability, 528 * it's fair to support both. 529 */ 530 if (tcpci->data->TX_BUF_BYTE_x_hidden) { 531 u8 buf[TCPC_TRANSMIT_BUFFER_MAX_LEN] = {0,}; 532 u8 pos = 0; 533 534 /* Payload + header + TCPC_TX_BYTE_CNT */ 535 buf[pos++] = cnt + 2; 536 537 if (msg) 538 memcpy(&buf[pos], &msg->header, sizeof(msg->header)); 539 540 pos += sizeof(header); 541 542 if (cnt > 0) 543 memcpy(&buf[pos], msg->payload, cnt); 544 545 pos += cnt; 546 ret = regmap_raw_write(tcpci->regmap, TCPC_TX_BYTE_CNT, buf, pos); 547 if (ret < 0) 548 return ret; 549 } else { 550 ret = regmap_write(tcpci->regmap, TCPC_TX_BYTE_CNT, cnt + 2); 551 if (ret < 0) 552 return ret; 553 554 ret = tcpci_write16(tcpci, TCPC_TX_HDR, header); 555 if (ret < 0) 556 return ret; 557 558 if (cnt > 0) { 559 ret = regmap_raw_write(tcpci->regmap, TCPC_TX_DATA, &msg->payload, cnt); 560 if (ret < 0) 561 return ret; 562 } 563 } 564 565 /* nRetryCount is 3 in PD2.0 spec where 2 in PD3.0 spec */ 566 reg = ((negotiated_rev > PD_REV20 ? PD_RETRY_COUNT_3_0_OR_HIGHER : PD_RETRY_COUNT_DEFAULT) 567 << TCPC_TRANSMIT_RETRY_SHIFT) | (type << TCPC_TRANSMIT_TYPE_SHIFT); 568 ret = regmap_write(tcpci->regmap, TCPC_TRANSMIT, reg); 569 if (ret < 0) 570 return ret; 571 572 return 0; 573 } 574 575 static int tcpci_init(struct tcpc_dev *tcpc) 576 { 577 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 578 unsigned long timeout = jiffies + msecs_to_jiffies(2000); /* XXX */ 579 unsigned int reg; 580 int ret; 581 582 while (time_before_eq(jiffies, timeout)) { 583 ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®); 584 if (ret < 0) 585 return ret; 586 if (!(reg & TCPC_POWER_STATUS_UNINIT)) 587 break; 588 usleep_range(10000, 20000); 589 } 590 if (time_after(jiffies, timeout)) 591 return -ETIMEDOUT; 592 593 /* Handle vendor init */ 594 if (tcpci->data->init) { 595 ret = tcpci->data->init(tcpci, tcpci->data); 596 if (ret < 0) 597 return ret; 598 } 599 600 /* Clear all events */ 601 ret = tcpci_write16(tcpci, TCPC_ALERT, 0xffff); 602 if (ret < 0) 603 return ret; 604 605 if (tcpci->controls_vbus) 606 reg = TCPC_POWER_STATUS_VBUS_PRES; 607 else 608 reg = 0; 609 ret = regmap_write(tcpci->regmap, TCPC_POWER_STATUS_MASK, reg); 610 if (ret < 0) 611 return ret; 612 613 /* Enable Vbus detection */ 614 ret = regmap_write(tcpci->regmap, TCPC_COMMAND, 615 TCPC_CMD_ENABLE_VBUS_DETECT); 616 if (ret < 0) 617 return ret; 618 619 reg = TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_FAILED | 620 TCPC_ALERT_TX_DISCARDED | TCPC_ALERT_RX_STATUS | 621 TCPC_ALERT_RX_HARD_RST | TCPC_ALERT_CC_STATUS; 622 if (tcpci->controls_vbus) 623 reg |= TCPC_ALERT_POWER_STATUS; 624 /* Enable VSAFE0V status interrupt when detecting VSAFE0V is supported */ 625 if (tcpci->data->vbus_vsafe0v) { 626 reg |= TCPC_ALERT_EXTENDED_STATUS; 627 ret = regmap_write(tcpci->regmap, TCPC_EXTENDED_STATUS_MASK, 628 TCPC_EXTENDED_STATUS_VSAFE0V); 629 if (ret < 0) 630 return ret; 631 } 632 return tcpci_write16(tcpci, TCPC_ALERT_MASK, reg); 633 } 634 635 irqreturn_t tcpci_irq(struct tcpci *tcpci) 636 { 637 u16 status; 638 int ret; 639 unsigned int raw; 640 641 tcpci_read16(tcpci, TCPC_ALERT, &status); 642 643 /* 644 * Clear alert status for everything except RX_STATUS, which shouldn't 645 * be cleared until we have successfully retrieved message. 646 */ 647 if (status & ~TCPC_ALERT_RX_STATUS) 648 tcpci_write16(tcpci, TCPC_ALERT, 649 status & ~TCPC_ALERT_RX_STATUS); 650 651 if (status & TCPC_ALERT_CC_STATUS) 652 tcpm_cc_change(tcpci->port); 653 654 if (status & TCPC_ALERT_POWER_STATUS) { 655 regmap_read(tcpci->regmap, TCPC_POWER_STATUS_MASK, &raw); 656 /* 657 * If power status mask has been reset, then the TCPC 658 * has reset. 659 */ 660 if (raw == 0xff) 661 tcpm_tcpc_reset(tcpci->port); 662 else 663 tcpm_vbus_change(tcpci->port); 664 } 665 666 if (status & TCPC_ALERT_RX_STATUS) { 667 struct pd_message msg; 668 unsigned int cnt, payload_cnt; 669 u16 header; 670 671 regmap_read(tcpci->regmap, TCPC_RX_BYTE_CNT, &cnt); 672 /* 673 * 'cnt' corresponds to READABLE_BYTE_COUNT in section 4.4.14 674 * of the TCPCI spec [Rev 2.0 Ver 1.0 October 2017] and is 675 * defined in table 4-36 as one greater than the number of 676 * bytes received. And that number includes the header. So: 677 */ 678 if (cnt > 3) 679 payload_cnt = cnt - (1 + sizeof(msg.header)); 680 else 681 payload_cnt = 0; 682 683 tcpci_read16(tcpci, TCPC_RX_HDR, &header); 684 msg.header = cpu_to_le16(header); 685 686 if (WARN_ON(payload_cnt > sizeof(msg.payload))) 687 payload_cnt = sizeof(msg.payload); 688 689 if (payload_cnt > 0) 690 regmap_raw_read(tcpci->regmap, TCPC_RX_DATA, 691 &msg.payload, payload_cnt); 692 693 /* Read complete, clear RX status alert bit */ 694 tcpci_write16(tcpci, TCPC_ALERT, TCPC_ALERT_RX_STATUS); 695 696 tcpm_pd_receive(tcpci->port, &msg); 697 } 698 699 if (status & TCPC_ALERT_EXTENDED_STATUS) { 700 ret = regmap_read(tcpci->regmap, TCPC_EXTENDED_STATUS, &raw); 701 if (!ret && (raw & TCPC_EXTENDED_STATUS_VSAFE0V)) 702 tcpm_vbus_change(tcpci->port); 703 } 704 705 if (status & TCPC_ALERT_RX_HARD_RST) 706 tcpm_pd_hard_reset(tcpci->port); 707 708 if (status & TCPC_ALERT_TX_SUCCESS) 709 tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_SUCCESS); 710 else if (status & TCPC_ALERT_TX_DISCARDED) 711 tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_DISCARDED); 712 else if (status & TCPC_ALERT_TX_FAILED) 713 tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_FAILED); 714 715 return IRQ_HANDLED; 716 } 717 EXPORT_SYMBOL_GPL(tcpci_irq); 718 719 static irqreturn_t _tcpci_irq(int irq, void *dev_id) 720 { 721 struct tcpci_chip *chip = dev_id; 722 723 return tcpci_irq(chip->tcpci); 724 } 725 726 static const struct regmap_config tcpci_regmap_config = { 727 .reg_bits = 8, 728 .val_bits = 8, 729 730 .max_register = 0x7F, /* 0x80 .. 0xFF are vendor defined */ 731 }; 732 733 static int tcpci_parse_config(struct tcpci *tcpci) 734 { 735 tcpci->controls_vbus = true; /* XXX */ 736 737 tcpci->tcpc.fwnode = device_get_named_child_node(tcpci->dev, 738 "connector"); 739 if (!tcpci->tcpc.fwnode) { 740 dev_err(tcpci->dev, "Can't find connector node.\n"); 741 return -EINVAL; 742 } 743 744 return 0; 745 } 746 747 struct tcpci *tcpci_register_port(struct device *dev, struct tcpci_data *data) 748 { 749 struct tcpci *tcpci; 750 int err; 751 752 tcpci = devm_kzalloc(dev, sizeof(*tcpci), GFP_KERNEL); 753 if (!tcpci) 754 return ERR_PTR(-ENOMEM); 755 756 tcpci->dev = dev; 757 tcpci->data = data; 758 tcpci->regmap = data->regmap; 759 760 tcpci->tcpc.init = tcpci_init; 761 tcpci->tcpc.get_vbus = tcpci_get_vbus; 762 tcpci->tcpc.set_vbus = tcpci_set_vbus; 763 tcpci->tcpc.set_cc = tcpci_set_cc; 764 tcpci->tcpc.apply_rc = tcpci_apply_rc; 765 tcpci->tcpc.get_cc = tcpci_get_cc; 766 tcpci->tcpc.set_polarity = tcpci_set_polarity; 767 tcpci->tcpc.set_vconn = tcpci_set_vconn; 768 tcpci->tcpc.start_toggling = tcpci_start_toggling; 769 770 tcpci->tcpc.set_pd_rx = tcpci_set_pd_rx; 771 tcpci->tcpc.set_roles = tcpci_set_roles; 772 tcpci->tcpc.pd_transmit = tcpci_pd_transmit; 773 tcpci->tcpc.set_bist_data = tcpci_set_bist_data; 774 tcpci->tcpc.enable_frs = tcpci_enable_frs; 775 tcpci->tcpc.frs_sourcing_vbus = tcpci_frs_sourcing_vbus; 776 tcpci->tcpc.set_partner_usb_comm_capable = tcpci_set_partner_usb_comm_capable; 777 778 if (tcpci->data->auto_discharge_disconnect) { 779 tcpci->tcpc.enable_auto_vbus_discharge = tcpci_enable_auto_vbus_discharge; 780 tcpci->tcpc.set_auto_vbus_discharge_threshold = 781 tcpci_set_auto_vbus_discharge_threshold; 782 regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_POWER_CTRL_BLEED_DISCHARGE, 783 TCPC_POWER_CTRL_BLEED_DISCHARGE); 784 } 785 786 if (tcpci->data->vbus_vsafe0v) 787 tcpci->tcpc.is_vbus_vsafe0v = tcpci_is_vbus_vsafe0v; 788 789 err = tcpci_parse_config(tcpci); 790 if (err < 0) 791 return ERR_PTR(err); 792 793 tcpci->port = tcpm_register_port(tcpci->dev, &tcpci->tcpc); 794 if (IS_ERR(tcpci->port)) 795 return ERR_CAST(tcpci->port); 796 797 return tcpci; 798 } 799 EXPORT_SYMBOL_GPL(tcpci_register_port); 800 801 void tcpci_unregister_port(struct tcpci *tcpci) 802 { 803 tcpm_unregister_port(tcpci->port); 804 } 805 EXPORT_SYMBOL_GPL(tcpci_unregister_port); 806 807 static int tcpci_probe(struct i2c_client *client, 808 const struct i2c_device_id *i2c_id) 809 { 810 struct tcpci_chip *chip; 811 int err; 812 u16 val = 0; 813 814 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); 815 if (!chip) 816 return -ENOMEM; 817 818 chip->data.regmap = devm_regmap_init_i2c(client, &tcpci_regmap_config); 819 if (IS_ERR(chip->data.regmap)) 820 return PTR_ERR(chip->data.regmap); 821 822 i2c_set_clientdata(client, chip); 823 824 /* Disable chip interrupts before requesting irq */ 825 err = regmap_raw_write(chip->data.regmap, TCPC_ALERT_MASK, &val, 826 sizeof(u16)); 827 if (err < 0) 828 return err; 829 830 chip->tcpci = tcpci_register_port(&client->dev, &chip->data); 831 if (IS_ERR(chip->tcpci)) 832 return PTR_ERR(chip->tcpci); 833 834 err = devm_request_threaded_irq(&client->dev, client->irq, NULL, 835 _tcpci_irq, 836 IRQF_ONESHOT | IRQF_TRIGGER_LOW, 837 dev_name(&client->dev), chip); 838 if (err < 0) { 839 tcpci_unregister_port(chip->tcpci); 840 return err; 841 } 842 843 return 0; 844 } 845 846 static int tcpci_remove(struct i2c_client *client) 847 { 848 struct tcpci_chip *chip = i2c_get_clientdata(client); 849 int err; 850 851 /* Disable chip interrupts before unregistering port */ 852 err = tcpci_write16(chip->tcpci, TCPC_ALERT_MASK, 0); 853 if (err < 0) 854 return err; 855 856 tcpci_unregister_port(chip->tcpci); 857 858 return 0; 859 } 860 861 static const struct i2c_device_id tcpci_id[] = { 862 { "tcpci", 0 }, 863 { } 864 }; 865 MODULE_DEVICE_TABLE(i2c, tcpci_id); 866 867 #ifdef CONFIG_OF 868 static const struct of_device_id tcpci_of_match[] = { 869 { .compatible = "nxp,ptn5110", }, 870 {}, 871 }; 872 MODULE_DEVICE_TABLE(of, tcpci_of_match); 873 #endif 874 875 static struct i2c_driver tcpci_i2c_driver = { 876 .driver = { 877 .name = "tcpci", 878 .of_match_table = of_match_ptr(tcpci_of_match), 879 }, 880 .probe = tcpci_probe, 881 .remove = tcpci_remove, 882 .id_table = tcpci_id, 883 }; 884 module_i2c_driver(tcpci_i2c_driver); 885 886 MODULE_DESCRIPTION("USB Type-C Port Controller Interface driver"); 887 MODULE_LICENSE("GPL"); 888