1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright 2015-2017 Google, Inc 4 * 5 * USB Type-C Port Controller Interface. 6 */ 7 8 #include <linux/delay.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/i2c.h> 12 #include <linux/interrupt.h> 13 #include <linux/property.h> 14 #include <linux/regmap.h> 15 #include <linux/usb/pd.h> 16 #include <linux/usb/tcpci.h> 17 #include <linux/usb/tcpm.h> 18 #include <linux/usb/typec.h> 19 20 #define PD_RETRY_COUNT_DEFAULT 3 21 #define PD_RETRY_COUNT_3_0_OR_HIGHER 2 22 #define AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV 3500 23 #define VSINKPD_MIN_IR_DROP_MV 750 24 #define VSRC_NEW_MIN_PERCENT 95 25 #define VSRC_VALID_MIN_MV 500 26 #define VPPS_NEW_MIN_PERCENT 95 27 #define VPPS_VALID_MIN_MV 100 28 #define VSINKDISCONNECT_PD_MIN_PERCENT 90 29 30 struct tcpci { 31 struct device *dev; 32 33 struct tcpm_port *port; 34 35 struct regmap *regmap; 36 unsigned int alert_mask; 37 38 bool controls_vbus; 39 40 struct tcpc_dev tcpc; 41 struct tcpci_data *data; 42 }; 43 44 struct tcpci_chip { 45 struct tcpci *tcpci; 46 struct tcpci_data data; 47 }; 48 49 struct tcpm_port *tcpci_get_tcpm_port(struct tcpci *tcpci) 50 { 51 return tcpci->port; 52 } 53 EXPORT_SYMBOL_GPL(tcpci_get_tcpm_port); 54 55 static inline struct tcpci *tcpc_to_tcpci(struct tcpc_dev *tcpc) 56 { 57 return container_of(tcpc, struct tcpci, tcpc); 58 } 59 60 static int tcpci_read16(struct tcpci *tcpci, unsigned int reg, u16 *val) 61 { 62 return regmap_raw_read(tcpci->regmap, reg, val, sizeof(u16)); 63 } 64 65 static int tcpci_write16(struct tcpci *tcpci, unsigned int reg, u16 val) 66 { 67 return regmap_raw_write(tcpci->regmap, reg, &val, sizeof(u16)); 68 } 69 70 static int tcpci_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc) 71 { 72 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 73 bool vconn_pres; 74 enum typec_cc_polarity polarity = TYPEC_POLARITY_CC1; 75 unsigned int reg; 76 int ret; 77 78 ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®); 79 if (ret < 0) 80 return ret; 81 82 vconn_pres = !!(reg & TCPC_POWER_STATUS_VCONN_PRES); 83 if (vconn_pres) { 84 ret = regmap_read(tcpci->regmap, TCPC_TCPC_CTRL, ®); 85 if (ret < 0) 86 return ret; 87 88 if (reg & TCPC_TCPC_CTRL_ORIENTATION) 89 polarity = TYPEC_POLARITY_CC2; 90 } 91 92 switch (cc) { 93 case TYPEC_CC_RA: 94 reg = (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC1_SHIFT) | 95 (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC2_SHIFT); 96 break; 97 case TYPEC_CC_RD: 98 reg = (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) | 99 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT); 100 break; 101 case TYPEC_CC_RP_DEF: 102 reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) | 103 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) | 104 (TCPC_ROLE_CTRL_RP_VAL_DEF << 105 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 106 break; 107 case TYPEC_CC_RP_1_5: 108 reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) | 109 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) | 110 (TCPC_ROLE_CTRL_RP_VAL_1_5 << 111 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 112 break; 113 case TYPEC_CC_RP_3_0: 114 reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) | 115 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) | 116 (TCPC_ROLE_CTRL_RP_VAL_3_0 << 117 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 118 break; 119 case TYPEC_CC_OPEN: 120 default: 121 reg = (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT) | 122 (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT); 123 break; 124 } 125 126 if (vconn_pres) { 127 if (polarity == TYPEC_POLARITY_CC2) { 128 reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT); 129 reg |= (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT); 130 } else { 131 reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT); 132 reg |= (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT); 133 } 134 } 135 136 ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg); 137 if (ret < 0) 138 return ret; 139 140 return 0; 141 } 142 143 static int tcpci_apply_rc(struct tcpc_dev *tcpc, enum typec_cc_status cc, 144 enum typec_cc_polarity polarity) 145 { 146 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 147 unsigned int reg; 148 int ret; 149 150 ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, ®); 151 if (ret < 0) 152 return ret; 153 154 /* 155 * APPLY_RC state is when ROLE_CONTROL.CC1 != ROLE_CONTROL.CC2 and vbus autodischarge on 156 * disconnect is disabled. Bail out when ROLE_CONTROL.CC1 != ROLE_CONTROL.CC2. 157 */ 158 if (((reg & (TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT)) >> 159 TCPC_ROLE_CTRL_CC2_SHIFT) != 160 ((reg & (TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT)) >> 161 TCPC_ROLE_CTRL_CC1_SHIFT)) 162 return 0; 163 164 return regmap_update_bits(tcpci->regmap, TCPC_ROLE_CTRL, polarity == TYPEC_POLARITY_CC1 ? 165 TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT : 166 TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT, 167 TCPC_ROLE_CTRL_CC_OPEN); 168 } 169 170 static int tcpci_start_toggling(struct tcpc_dev *tcpc, 171 enum typec_port_type port_type, 172 enum typec_cc_status cc) 173 { 174 int ret; 175 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 176 unsigned int reg = TCPC_ROLE_CTRL_DRP; 177 178 if (port_type != TYPEC_PORT_DRP) 179 return -EOPNOTSUPP; 180 181 /* Handle vendor drp toggling */ 182 if (tcpci->data->start_drp_toggling) { 183 ret = tcpci->data->start_drp_toggling(tcpci, tcpci->data, cc); 184 if (ret < 0) 185 return ret; 186 } 187 188 switch (cc) { 189 default: 190 case TYPEC_CC_RP_DEF: 191 reg |= (TCPC_ROLE_CTRL_RP_VAL_DEF << 192 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 193 break; 194 case TYPEC_CC_RP_1_5: 195 reg |= (TCPC_ROLE_CTRL_RP_VAL_1_5 << 196 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 197 break; 198 case TYPEC_CC_RP_3_0: 199 reg |= (TCPC_ROLE_CTRL_RP_VAL_3_0 << 200 TCPC_ROLE_CTRL_RP_VAL_SHIFT); 201 break; 202 } 203 204 if (cc == TYPEC_CC_RD) 205 reg |= (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) | 206 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT); 207 else 208 reg |= (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) | 209 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT); 210 ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg); 211 if (ret < 0) 212 return ret; 213 return regmap_write(tcpci->regmap, TCPC_COMMAND, 214 TCPC_CMD_LOOK4CONNECTION); 215 } 216 217 static int tcpci_get_cc(struct tcpc_dev *tcpc, 218 enum typec_cc_status *cc1, enum typec_cc_status *cc2) 219 { 220 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 221 unsigned int reg, role_control; 222 int ret; 223 224 ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, &role_control); 225 if (ret < 0) 226 return ret; 227 228 ret = regmap_read(tcpci->regmap, TCPC_CC_STATUS, ®); 229 if (ret < 0) 230 return ret; 231 232 *cc1 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC1_SHIFT) & 233 TCPC_CC_STATUS_CC1_MASK, 234 reg & TCPC_CC_STATUS_TERM || 235 tcpc_presenting_rd(role_control, CC1)); 236 *cc2 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC2_SHIFT) & 237 TCPC_CC_STATUS_CC2_MASK, 238 reg & TCPC_CC_STATUS_TERM || 239 tcpc_presenting_rd(role_control, CC2)); 240 241 return 0; 242 } 243 244 static int tcpci_set_polarity(struct tcpc_dev *tcpc, 245 enum typec_cc_polarity polarity) 246 { 247 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 248 unsigned int reg; 249 int ret; 250 enum typec_cc_status cc1, cc2; 251 252 /* Obtain Rp setting from role control */ 253 ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, ®); 254 if (ret < 0) 255 return ret; 256 257 ret = tcpci_get_cc(tcpc, &cc1, &cc2); 258 if (ret < 0) 259 return ret; 260 261 /* 262 * When port has drp toggling enabled, ROLE_CONTROL would only have the initial 263 * terminations for the toggling and does not indicate the final cc 264 * terminations when ConnectionResult is 0 i.e. drp toggling stops and 265 * the connection is resolved. Infer port role from TCPC_CC_STATUS based on the 266 * terminations seen. The port role is then used to set the cc terminations. 267 */ 268 if (reg & TCPC_ROLE_CTRL_DRP) { 269 /* Disable DRP for the OPEN setting to take effect */ 270 reg = reg & ~TCPC_ROLE_CTRL_DRP; 271 272 if (polarity == TYPEC_POLARITY_CC2) { 273 reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT); 274 /* Local port is source */ 275 if (cc2 == TYPEC_CC_RD) 276 /* Role control would have the Rp setting when DRP was enabled */ 277 reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT; 278 else 279 reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT; 280 } else { 281 reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT); 282 /* Local port is source */ 283 if (cc1 == TYPEC_CC_RD) 284 /* Role control would have the Rp setting when DRP was enabled */ 285 reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT; 286 else 287 reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT; 288 } 289 } 290 291 if (polarity == TYPEC_POLARITY_CC2) 292 reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT; 293 else 294 reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT; 295 ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg); 296 if (ret < 0) 297 return ret; 298 299 return regmap_write(tcpci->regmap, TCPC_TCPC_CTRL, 300 (polarity == TYPEC_POLARITY_CC2) ? 301 TCPC_TCPC_CTRL_ORIENTATION : 0); 302 } 303 304 static void tcpci_set_partner_usb_comm_capable(struct tcpc_dev *tcpc, bool capable) 305 { 306 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 307 308 if (tcpci->data->set_partner_usb_comm_capable) 309 tcpci->data->set_partner_usb_comm_capable(tcpci, tcpci->data, capable); 310 } 311 312 static int tcpci_set_vconn(struct tcpc_dev *tcpc, bool enable) 313 { 314 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 315 int ret; 316 317 /* Handle vendor set vconn */ 318 if (tcpci->data->set_vconn) { 319 ret = tcpci->data->set_vconn(tcpci, tcpci->data, enable); 320 if (ret < 0) 321 return ret; 322 } 323 324 return regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, 325 TCPC_POWER_CTRL_VCONN_ENABLE, 326 enable ? TCPC_POWER_CTRL_VCONN_ENABLE : 0); 327 } 328 329 static int tcpci_enable_auto_vbus_discharge(struct tcpc_dev *dev, bool enable) 330 { 331 struct tcpci *tcpci = tcpc_to_tcpci(dev); 332 int ret; 333 334 ret = regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_POWER_CTRL_AUTO_DISCHARGE, 335 enable ? TCPC_POWER_CTRL_AUTO_DISCHARGE : 0); 336 return ret; 337 } 338 339 static int tcpci_set_auto_vbus_discharge_threshold(struct tcpc_dev *dev, enum typec_pwr_opmode mode, 340 bool pps_active, u32 requested_vbus_voltage_mv) 341 { 342 struct tcpci *tcpci = tcpc_to_tcpci(dev); 343 unsigned int pwr_ctrl, threshold = 0; 344 int ret; 345 346 /* 347 * Indicates that vbus is going to go away due PR_SWAP, hard reset etc. 348 * Do not discharge vbus here. 349 */ 350 if (requested_vbus_voltage_mv == 0) 351 goto write_thresh; 352 353 ret = regmap_read(tcpci->regmap, TCPC_POWER_CTRL, &pwr_ctrl); 354 if (ret < 0) 355 return ret; 356 357 if (pwr_ctrl & TCPC_FAST_ROLE_SWAP_EN) { 358 /* To prevent disconnect when the source is fast role swap is capable. */ 359 threshold = AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV; 360 } else if (mode == TYPEC_PWR_MODE_PD) { 361 if (pps_active) 362 threshold = ((VPPS_NEW_MIN_PERCENT * requested_vbus_voltage_mv / 100) - 363 VSINKPD_MIN_IR_DROP_MV - VPPS_VALID_MIN_MV) * 364 VSINKDISCONNECT_PD_MIN_PERCENT / 100; 365 else 366 threshold = ((VSRC_NEW_MIN_PERCENT * requested_vbus_voltage_mv / 100) - 367 VSINKPD_MIN_IR_DROP_MV - VSRC_VALID_MIN_MV) * 368 VSINKDISCONNECT_PD_MIN_PERCENT / 100; 369 } else { 370 /* 3.5V for non-pd sink */ 371 threshold = AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV; 372 } 373 374 threshold = threshold / TCPC_VBUS_SINK_DISCONNECT_THRESH_LSB_MV; 375 376 if (threshold > TCPC_VBUS_SINK_DISCONNECT_THRESH_MAX) 377 return -EINVAL; 378 379 write_thresh: 380 return tcpci_write16(tcpci, TCPC_VBUS_SINK_DISCONNECT_THRESH, threshold); 381 } 382 383 static int tcpci_enable_frs(struct tcpc_dev *dev, bool enable) 384 { 385 struct tcpci *tcpci = tcpc_to_tcpci(dev); 386 int ret; 387 388 /* To prevent disconnect during FRS, set disconnect threshold to 3.5V */ 389 ret = tcpci_write16(tcpci, TCPC_VBUS_SINK_DISCONNECT_THRESH, enable ? 0 : 0x8c); 390 if (ret < 0) 391 return ret; 392 393 ret = regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_FAST_ROLE_SWAP_EN, enable ? 394 TCPC_FAST_ROLE_SWAP_EN : 0); 395 396 return ret; 397 } 398 399 static void tcpci_frs_sourcing_vbus(struct tcpc_dev *dev) 400 { 401 struct tcpci *tcpci = tcpc_to_tcpci(dev); 402 403 if (tcpci->data->frs_sourcing_vbus) 404 tcpci->data->frs_sourcing_vbus(tcpci, tcpci->data); 405 } 406 407 static void tcpci_check_contaminant(struct tcpc_dev *dev) 408 { 409 struct tcpci *tcpci = tcpc_to_tcpci(dev); 410 411 if (tcpci->data->check_contaminant) 412 tcpci->data->check_contaminant(tcpci, tcpci->data); 413 } 414 415 static int tcpci_set_bist_data(struct tcpc_dev *tcpc, bool enable) 416 { 417 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 418 419 return regmap_update_bits(tcpci->regmap, TCPC_TCPC_CTRL, TCPC_TCPC_CTRL_BIST_TM, 420 enable ? TCPC_TCPC_CTRL_BIST_TM : 0); 421 } 422 423 static int tcpci_set_roles(struct tcpc_dev *tcpc, bool attached, 424 enum typec_role role, enum typec_data_role data) 425 { 426 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 427 unsigned int reg; 428 int ret; 429 430 reg = PD_REV20 << TCPC_MSG_HDR_INFO_REV_SHIFT; 431 if (role == TYPEC_SOURCE) 432 reg |= TCPC_MSG_HDR_INFO_PWR_ROLE; 433 if (data == TYPEC_HOST) 434 reg |= TCPC_MSG_HDR_INFO_DATA_ROLE; 435 ret = regmap_write(tcpci->regmap, TCPC_MSG_HDR_INFO, reg); 436 if (ret < 0) 437 return ret; 438 439 return 0; 440 } 441 442 static int tcpci_set_pd_rx(struct tcpc_dev *tcpc, bool enable) 443 { 444 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 445 unsigned int reg = 0; 446 int ret; 447 448 if (enable) 449 reg = TCPC_RX_DETECT_SOP | TCPC_RX_DETECT_HARD_RESET; 450 ret = regmap_write(tcpci->regmap, TCPC_RX_DETECT, reg); 451 if (ret < 0) 452 return ret; 453 454 return 0; 455 } 456 457 static int tcpci_get_vbus(struct tcpc_dev *tcpc) 458 { 459 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 460 unsigned int reg; 461 int ret; 462 463 ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®); 464 if (ret < 0) 465 return ret; 466 467 return !!(reg & TCPC_POWER_STATUS_VBUS_PRES); 468 } 469 470 static bool tcpci_is_vbus_vsafe0v(struct tcpc_dev *tcpc) 471 { 472 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 473 unsigned int reg; 474 int ret; 475 476 ret = regmap_read(tcpci->regmap, TCPC_EXTENDED_STATUS, ®); 477 if (ret < 0) 478 return false; 479 480 return !!(reg & TCPC_EXTENDED_STATUS_VSAFE0V); 481 } 482 483 static int tcpci_set_vbus(struct tcpc_dev *tcpc, bool source, bool sink) 484 { 485 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 486 int ret; 487 488 if (tcpci->data->set_vbus) { 489 ret = tcpci->data->set_vbus(tcpci, tcpci->data, source, sink); 490 /* Bypass when ret > 0 */ 491 if (ret != 0) 492 return ret < 0 ? ret : 0; 493 } 494 495 /* Disable both source and sink first before enabling anything */ 496 497 if (!source) { 498 ret = regmap_write(tcpci->regmap, TCPC_COMMAND, 499 TCPC_CMD_DISABLE_SRC_VBUS); 500 if (ret < 0) 501 return ret; 502 } 503 504 if (!sink) { 505 ret = regmap_write(tcpci->regmap, TCPC_COMMAND, 506 TCPC_CMD_DISABLE_SINK_VBUS); 507 if (ret < 0) 508 return ret; 509 } 510 511 if (source) { 512 ret = regmap_write(tcpci->regmap, TCPC_COMMAND, 513 TCPC_CMD_SRC_VBUS_DEFAULT); 514 if (ret < 0) 515 return ret; 516 } 517 518 if (sink) { 519 ret = regmap_write(tcpci->regmap, TCPC_COMMAND, 520 TCPC_CMD_SINK_VBUS); 521 if (ret < 0) 522 return ret; 523 } 524 525 return 0; 526 } 527 528 static int tcpci_pd_transmit(struct tcpc_dev *tcpc, enum tcpm_transmit_type type, 529 const struct pd_message *msg, unsigned int negotiated_rev) 530 { 531 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 532 u16 header = msg ? le16_to_cpu(msg->header) : 0; 533 unsigned int reg, cnt; 534 int ret; 535 536 cnt = msg ? pd_header_cnt(header) * 4 : 0; 537 /** 538 * TCPCI spec forbids direct access of TCPC_TX_DATA. 539 * But, since some of the chipsets offer this capability, 540 * it's fair to support both. 541 */ 542 if (tcpci->data->TX_BUF_BYTE_x_hidden) { 543 u8 buf[TCPC_TRANSMIT_BUFFER_MAX_LEN] = {0,}; 544 u8 pos = 0; 545 546 /* Payload + header + TCPC_TX_BYTE_CNT */ 547 buf[pos++] = cnt + 2; 548 549 if (msg) 550 memcpy(&buf[pos], &msg->header, sizeof(msg->header)); 551 552 pos += sizeof(header); 553 554 if (cnt > 0) 555 memcpy(&buf[pos], msg->payload, cnt); 556 557 pos += cnt; 558 ret = regmap_raw_write(tcpci->regmap, TCPC_TX_BYTE_CNT, buf, pos); 559 if (ret < 0) 560 return ret; 561 } else { 562 ret = regmap_write(tcpci->regmap, TCPC_TX_BYTE_CNT, cnt + 2); 563 if (ret < 0) 564 return ret; 565 566 ret = tcpci_write16(tcpci, TCPC_TX_HDR, header); 567 if (ret < 0) 568 return ret; 569 570 if (cnt > 0) { 571 ret = regmap_raw_write(tcpci->regmap, TCPC_TX_DATA, &msg->payload, cnt); 572 if (ret < 0) 573 return ret; 574 } 575 } 576 577 /* nRetryCount is 3 in PD2.0 spec where 2 in PD3.0 spec */ 578 reg = ((negotiated_rev > PD_REV20 ? PD_RETRY_COUNT_3_0_OR_HIGHER : PD_RETRY_COUNT_DEFAULT) 579 << TCPC_TRANSMIT_RETRY_SHIFT) | (type << TCPC_TRANSMIT_TYPE_SHIFT); 580 ret = regmap_write(tcpci->regmap, TCPC_TRANSMIT, reg); 581 if (ret < 0) 582 return ret; 583 584 return 0; 585 } 586 587 static int tcpci_init(struct tcpc_dev *tcpc) 588 { 589 struct tcpci *tcpci = tcpc_to_tcpci(tcpc); 590 unsigned long timeout = jiffies + msecs_to_jiffies(2000); /* XXX */ 591 unsigned int reg; 592 int ret; 593 594 while (time_before_eq(jiffies, timeout)) { 595 ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®); 596 if (ret < 0) 597 return ret; 598 if (!(reg & TCPC_POWER_STATUS_UNINIT)) 599 break; 600 usleep_range(10000, 20000); 601 } 602 if (time_after(jiffies, timeout)) 603 return -ETIMEDOUT; 604 605 /* Handle vendor init */ 606 if (tcpci->data->init) { 607 ret = tcpci->data->init(tcpci, tcpci->data); 608 if (ret < 0) 609 return ret; 610 } 611 612 /* Clear all events */ 613 ret = tcpci_write16(tcpci, TCPC_ALERT, 0xffff); 614 if (ret < 0) 615 return ret; 616 617 if (tcpci->controls_vbus) 618 reg = TCPC_POWER_STATUS_VBUS_PRES; 619 else 620 reg = 0; 621 ret = regmap_write(tcpci->regmap, TCPC_POWER_STATUS_MASK, reg); 622 if (ret < 0) 623 return ret; 624 625 /* Enable Vbus detection */ 626 ret = regmap_write(tcpci->regmap, TCPC_COMMAND, 627 TCPC_CMD_ENABLE_VBUS_DETECT); 628 if (ret < 0) 629 return ret; 630 631 reg = TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_FAILED | 632 TCPC_ALERT_TX_DISCARDED | TCPC_ALERT_RX_STATUS | 633 TCPC_ALERT_RX_HARD_RST | TCPC_ALERT_CC_STATUS; 634 if (tcpci->controls_vbus) 635 reg |= TCPC_ALERT_POWER_STATUS; 636 /* Enable VSAFE0V status interrupt when detecting VSAFE0V is supported */ 637 if (tcpci->data->vbus_vsafe0v) { 638 reg |= TCPC_ALERT_EXTENDED_STATUS; 639 ret = regmap_write(tcpci->regmap, TCPC_EXTENDED_STATUS_MASK, 640 TCPC_EXTENDED_STATUS_VSAFE0V); 641 if (ret < 0) 642 return ret; 643 } 644 645 tcpci->alert_mask = reg; 646 647 return tcpci_write16(tcpci, TCPC_ALERT_MASK, reg); 648 } 649 650 irqreturn_t tcpci_irq(struct tcpci *tcpci) 651 { 652 u16 status; 653 int ret; 654 unsigned int raw; 655 656 tcpci_read16(tcpci, TCPC_ALERT, &status); 657 658 /* 659 * Clear alert status for everything except RX_STATUS, which shouldn't 660 * be cleared until we have successfully retrieved message. 661 */ 662 if (status & ~TCPC_ALERT_RX_STATUS) 663 tcpci_write16(tcpci, TCPC_ALERT, 664 status & ~TCPC_ALERT_RX_STATUS); 665 666 if (status & TCPC_ALERT_CC_STATUS) 667 tcpm_cc_change(tcpci->port); 668 669 if (status & TCPC_ALERT_POWER_STATUS) { 670 regmap_read(tcpci->regmap, TCPC_POWER_STATUS_MASK, &raw); 671 /* 672 * If power status mask has been reset, then the TCPC 673 * has reset. 674 */ 675 if (raw == 0xff) 676 tcpm_tcpc_reset(tcpci->port); 677 else 678 tcpm_vbus_change(tcpci->port); 679 } 680 681 if (status & TCPC_ALERT_RX_STATUS) { 682 struct pd_message msg; 683 unsigned int cnt, payload_cnt; 684 u16 header; 685 686 regmap_read(tcpci->regmap, TCPC_RX_BYTE_CNT, &cnt); 687 /* 688 * 'cnt' corresponds to READABLE_BYTE_COUNT in section 4.4.14 689 * of the TCPCI spec [Rev 2.0 Ver 1.0 October 2017] and is 690 * defined in table 4-36 as one greater than the number of 691 * bytes received. And that number includes the header. So: 692 */ 693 if (cnt > 3) 694 payload_cnt = cnt - (1 + sizeof(msg.header)); 695 else 696 payload_cnt = 0; 697 698 tcpci_read16(tcpci, TCPC_RX_HDR, &header); 699 msg.header = cpu_to_le16(header); 700 701 if (WARN_ON(payload_cnt > sizeof(msg.payload))) 702 payload_cnt = sizeof(msg.payload); 703 704 if (payload_cnt > 0) 705 regmap_raw_read(tcpci->regmap, TCPC_RX_DATA, 706 &msg.payload, payload_cnt); 707 708 /* Read complete, clear RX status alert bit */ 709 tcpci_write16(tcpci, TCPC_ALERT, TCPC_ALERT_RX_STATUS); 710 711 tcpm_pd_receive(tcpci->port, &msg); 712 } 713 714 if (tcpci->data->vbus_vsafe0v && (status & TCPC_ALERT_EXTENDED_STATUS)) { 715 ret = regmap_read(tcpci->regmap, TCPC_EXTENDED_STATUS, &raw); 716 if (!ret && (raw & TCPC_EXTENDED_STATUS_VSAFE0V)) 717 tcpm_vbus_change(tcpci->port); 718 } 719 720 if (status & TCPC_ALERT_RX_HARD_RST) 721 tcpm_pd_hard_reset(tcpci->port); 722 723 if (status & TCPC_ALERT_TX_SUCCESS) 724 tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_SUCCESS); 725 else if (status & TCPC_ALERT_TX_DISCARDED) 726 tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_DISCARDED); 727 else if (status & TCPC_ALERT_TX_FAILED) 728 tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_FAILED); 729 730 return IRQ_RETVAL(status & tcpci->alert_mask); 731 } 732 EXPORT_SYMBOL_GPL(tcpci_irq); 733 734 static irqreturn_t _tcpci_irq(int irq, void *dev_id) 735 { 736 struct tcpci_chip *chip = dev_id; 737 738 return tcpci_irq(chip->tcpci); 739 } 740 741 static const struct regmap_config tcpci_regmap_config = { 742 .reg_bits = 8, 743 .val_bits = 8, 744 745 .max_register = 0x7F, /* 0x80 .. 0xFF are vendor defined */ 746 }; 747 748 static int tcpci_parse_config(struct tcpci *tcpci) 749 { 750 tcpci->controls_vbus = true; /* XXX */ 751 752 tcpci->tcpc.fwnode = device_get_named_child_node(tcpci->dev, 753 "connector"); 754 if (!tcpci->tcpc.fwnode) { 755 dev_err(tcpci->dev, "Can't find connector node.\n"); 756 return -EINVAL; 757 } 758 759 return 0; 760 } 761 762 struct tcpci *tcpci_register_port(struct device *dev, struct tcpci_data *data) 763 { 764 struct tcpci *tcpci; 765 int err; 766 767 tcpci = devm_kzalloc(dev, sizeof(*tcpci), GFP_KERNEL); 768 if (!tcpci) 769 return ERR_PTR(-ENOMEM); 770 771 tcpci->dev = dev; 772 tcpci->data = data; 773 tcpci->regmap = data->regmap; 774 775 tcpci->tcpc.init = tcpci_init; 776 tcpci->tcpc.get_vbus = tcpci_get_vbus; 777 tcpci->tcpc.set_vbus = tcpci_set_vbus; 778 tcpci->tcpc.set_cc = tcpci_set_cc; 779 tcpci->tcpc.apply_rc = tcpci_apply_rc; 780 tcpci->tcpc.get_cc = tcpci_get_cc; 781 tcpci->tcpc.set_polarity = tcpci_set_polarity; 782 tcpci->tcpc.set_vconn = tcpci_set_vconn; 783 tcpci->tcpc.start_toggling = tcpci_start_toggling; 784 785 tcpci->tcpc.set_pd_rx = tcpci_set_pd_rx; 786 tcpci->tcpc.set_roles = tcpci_set_roles; 787 tcpci->tcpc.pd_transmit = tcpci_pd_transmit; 788 tcpci->tcpc.set_bist_data = tcpci_set_bist_data; 789 tcpci->tcpc.enable_frs = tcpci_enable_frs; 790 tcpci->tcpc.frs_sourcing_vbus = tcpci_frs_sourcing_vbus; 791 tcpci->tcpc.set_partner_usb_comm_capable = tcpci_set_partner_usb_comm_capable; 792 793 if (tcpci->data->check_contaminant) 794 tcpci->tcpc.check_contaminant = tcpci_check_contaminant; 795 796 if (tcpci->data->auto_discharge_disconnect) { 797 tcpci->tcpc.enable_auto_vbus_discharge = tcpci_enable_auto_vbus_discharge; 798 tcpci->tcpc.set_auto_vbus_discharge_threshold = 799 tcpci_set_auto_vbus_discharge_threshold; 800 regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_POWER_CTRL_BLEED_DISCHARGE, 801 TCPC_POWER_CTRL_BLEED_DISCHARGE); 802 } 803 804 if (tcpci->data->vbus_vsafe0v) 805 tcpci->tcpc.is_vbus_vsafe0v = tcpci_is_vbus_vsafe0v; 806 807 err = tcpci_parse_config(tcpci); 808 if (err < 0) 809 return ERR_PTR(err); 810 811 tcpci->port = tcpm_register_port(tcpci->dev, &tcpci->tcpc); 812 if (IS_ERR(tcpci->port)) { 813 fwnode_handle_put(tcpci->tcpc.fwnode); 814 return ERR_CAST(tcpci->port); 815 } 816 817 return tcpci; 818 } 819 EXPORT_SYMBOL_GPL(tcpci_register_port); 820 821 void tcpci_unregister_port(struct tcpci *tcpci) 822 { 823 tcpm_unregister_port(tcpci->port); 824 fwnode_handle_put(tcpci->tcpc.fwnode); 825 } 826 EXPORT_SYMBOL_GPL(tcpci_unregister_port); 827 828 static int tcpci_probe(struct i2c_client *client) 829 { 830 struct tcpci_chip *chip; 831 int err; 832 u16 val = 0; 833 834 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); 835 if (!chip) 836 return -ENOMEM; 837 838 chip->data.regmap = devm_regmap_init_i2c(client, &tcpci_regmap_config); 839 if (IS_ERR(chip->data.regmap)) 840 return PTR_ERR(chip->data.regmap); 841 842 i2c_set_clientdata(client, chip); 843 844 /* Disable chip interrupts before requesting irq */ 845 err = regmap_raw_write(chip->data.regmap, TCPC_ALERT_MASK, &val, 846 sizeof(u16)); 847 if (err < 0) 848 return err; 849 850 chip->tcpci = tcpci_register_port(&client->dev, &chip->data); 851 if (IS_ERR(chip->tcpci)) 852 return PTR_ERR(chip->tcpci); 853 854 err = devm_request_threaded_irq(&client->dev, client->irq, NULL, 855 _tcpci_irq, 856 IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_LOW, 857 dev_name(&client->dev), chip); 858 if (err < 0) { 859 tcpci_unregister_port(chip->tcpci); 860 return err; 861 } 862 863 return 0; 864 } 865 866 static void tcpci_remove(struct i2c_client *client) 867 { 868 struct tcpci_chip *chip = i2c_get_clientdata(client); 869 int err; 870 871 /* Disable chip interrupts before unregistering port */ 872 err = tcpci_write16(chip->tcpci, TCPC_ALERT_MASK, 0); 873 if (err < 0) 874 dev_warn(&client->dev, "Failed to disable irqs (%pe)\n", ERR_PTR(err)); 875 876 tcpci_unregister_port(chip->tcpci); 877 } 878 879 static const struct i2c_device_id tcpci_id[] = { 880 { "tcpci", 0 }, 881 { } 882 }; 883 MODULE_DEVICE_TABLE(i2c, tcpci_id); 884 885 #ifdef CONFIG_OF 886 static const struct of_device_id tcpci_of_match[] = { 887 { .compatible = "nxp,ptn5110", }, 888 {}, 889 }; 890 MODULE_DEVICE_TABLE(of, tcpci_of_match); 891 #endif 892 893 static struct i2c_driver tcpci_i2c_driver = { 894 .driver = { 895 .name = "tcpci", 896 .of_match_table = of_match_ptr(tcpci_of_match), 897 }, 898 .probe_new = tcpci_probe, 899 .remove = tcpci_remove, 900 .id_table = tcpci_id, 901 }; 902 module_i2c_driver(tcpci_i2c_driver); 903 904 MODULE_DESCRIPTION("USB Type-C Port Controller Interface driver"); 905 MODULE_LICENSE("GPL"); 906