1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright 2016-2017 Google, Inc 4 * 5 * Fairchild FUSB302 Type-C Chip Driver 6 */ 7 8 #include <linux/debugfs.h> 9 #include <linux/delay.h> 10 #include <linux/errno.h> 11 #include <linux/extcon.h> 12 #include <linux/gpio/consumer.h> 13 #include <linux/i2c.h> 14 #include <linux/interrupt.h> 15 #include <linux/kernel.h> 16 #include <linux/module.h> 17 #include <linux/mutex.h> 18 #include <linux/of_device.h> 19 #include <linux/pinctrl/consumer.h> 20 #include <linux/proc_fs.h> 21 #include <linux/regulator/consumer.h> 22 #include <linux/sched/clock.h> 23 #include <linux/seq_file.h> 24 #include <linux/slab.h> 25 #include <linux/spinlock.h> 26 #include <linux/string.h> 27 #include <linux/types.h> 28 #include <linux/usb.h> 29 #include <linux/usb/typec.h> 30 #include <linux/usb/tcpm.h> 31 #include <linux/usb/pd.h> 32 #include <linux/workqueue.h> 33 34 #include "fusb302_reg.h" 35 36 /* 37 * When the device is SNK, BC_LVL interrupt is used to monitor cc pins 38 * for the current capability offered by the SRC. As FUSB302 chip fires 39 * the BC_LVL interrupt on PD signalings, cc lvl should be handled after 40 * a delay to avoid measuring on PD activities. The delay is slightly 41 * longer than PD_T_PD_DEBPUNCE (10-20ms). 42 */ 43 #define T_BC_LVL_DEBOUNCE_DELAY_MS 30 44 45 enum toggling_mode { 46 TOGGLING_MODE_OFF, 47 TOGGLING_MODE_DRP, 48 TOGGLING_MODE_SNK, 49 TOGGLING_MODE_SRC, 50 }; 51 52 enum src_current_status { 53 SRC_CURRENT_DEFAULT, 54 SRC_CURRENT_MEDIUM, 55 SRC_CURRENT_HIGH, 56 }; 57 58 static const u8 ra_mda_value[] = { 59 [SRC_CURRENT_DEFAULT] = 4, /* 210mV */ 60 [SRC_CURRENT_MEDIUM] = 9, /* 420mV */ 61 [SRC_CURRENT_HIGH] = 18, /* 798mV */ 62 }; 63 64 static const u8 rd_mda_value[] = { 65 [SRC_CURRENT_DEFAULT] = 38, /* 1638mV */ 66 [SRC_CURRENT_MEDIUM] = 38, /* 1638mV */ 67 [SRC_CURRENT_HIGH] = 61, /* 2604mV */ 68 }; 69 70 #define LOG_BUFFER_ENTRIES 1024 71 #define LOG_BUFFER_ENTRY_SIZE 128 72 73 struct fusb302_chip { 74 struct device *dev; 75 struct i2c_client *i2c_client; 76 struct tcpm_port *tcpm_port; 77 struct tcpc_dev tcpc_dev; 78 79 struct regulator *vbus; 80 81 spinlock_t irq_lock; 82 struct work_struct irq_work; 83 bool irq_suspended; 84 bool irq_while_suspended; 85 struct gpio_desc *gpio_int_n; 86 int gpio_int_n_irq; 87 struct extcon_dev *extcon; 88 89 struct workqueue_struct *wq; 90 struct delayed_work bc_lvl_handler; 91 92 /* lock for sharing chip states */ 93 struct mutex lock; 94 95 /* chip status */ 96 enum toggling_mode toggling_mode; 97 enum src_current_status src_current_status; 98 bool intr_togdone; 99 bool intr_bc_lvl; 100 bool intr_comp_chng; 101 102 /* port status */ 103 bool vconn_on; 104 bool vbus_on; 105 bool charge_on; 106 bool vbus_present; 107 enum typec_cc_polarity cc_polarity; 108 enum typec_cc_status cc1; 109 enum typec_cc_status cc2; 110 u32 snk_pdo[PDO_MAX_OBJECTS]; 111 112 #ifdef CONFIG_DEBUG_FS 113 struct dentry *dentry; 114 /* lock for log buffer access */ 115 struct mutex logbuffer_lock; 116 int logbuffer_head; 117 int logbuffer_tail; 118 u8 *logbuffer[LOG_BUFFER_ENTRIES]; 119 #endif 120 }; 121 122 /* 123 * Logging 124 */ 125 126 #ifdef CONFIG_DEBUG_FS 127 static bool fusb302_log_full(struct fusb302_chip *chip) 128 { 129 return chip->logbuffer_tail == 130 (chip->logbuffer_head + 1) % LOG_BUFFER_ENTRIES; 131 } 132 133 __printf(2, 0) 134 static void _fusb302_log(struct fusb302_chip *chip, const char *fmt, 135 va_list args) 136 { 137 char tmpbuffer[LOG_BUFFER_ENTRY_SIZE]; 138 u64 ts_nsec = local_clock(); 139 unsigned long rem_nsec; 140 141 if (!chip->logbuffer[chip->logbuffer_head]) { 142 chip->logbuffer[chip->logbuffer_head] = 143 kzalloc(LOG_BUFFER_ENTRY_SIZE, GFP_KERNEL); 144 if (!chip->logbuffer[chip->logbuffer_head]) 145 return; 146 } 147 148 vsnprintf(tmpbuffer, sizeof(tmpbuffer), fmt, args); 149 150 mutex_lock(&chip->logbuffer_lock); 151 152 if (fusb302_log_full(chip)) { 153 chip->logbuffer_head = max(chip->logbuffer_head - 1, 0); 154 strscpy(tmpbuffer, "overflow", sizeof(tmpbuffer)); 155 } 156 157 if (chip->logbuffer_head < 0 || 158 chip->logbuffer_head >= LOG_BUFFER_ENTRIES) { 159 dev_warn(chip->dev, 160 "Bad log buffer index %d\n", chip->logbuffer_head); 161 goto abort; 162 } 163 164 if (!chip->logbuffer[chip->logbuffer_head]) { 165 dev_warn(chip->dev, 166 "Log buffer index %d is NULL\n", chip->logbuffer_head); 167 goto abort; 168 } 169 170 rem_nsec = do_div(ts_nsec, 1000000000); 171 scnprintf(chip->logbuffer[chip->logbuffer_head], 172 LOG_BUFFER_ENTRY_SIZE, "[%5lu.%06lu] %s", 173 (unsigned long)ts_nsec, rem_nsec / 1000, 174 tmpbuffer); 175 chip->logbuffer_head = (chip->logbuffer_head + 1) % LOG_BUFFER_ENTRIES; 176 177 abort: 178 mutex_unlock(&chip->logbuffer_lock); 179 } 180 181 __printf(2, 3) 182 static void fusb302_log(struct fusb302_chip *chip, const char *fmt, ...) 183 { 184 va_list args; 185 186 va_start(args, fmt); 187 _fusb302_log(chip, fmt, args); 188 va_end(args); 189 } 190 191 static int fusb302_debug_show(struct seq_file *s, void *v) 192 { 193 struct fusb302_chip *chip = s->private; 194 int tail; 195 196 mutex_lock(&chip->logbuffer_lock); 197 tail = chip->logbuffer_tail; 198 while (tail != chip->logbuffer_head) { 199 seq_printf(s, "%s\n", chip->logbuffer[tail]); 200 tail = (tail + 1) % LOG_BUFFER_ENTRIES; 201 } 202 if (!seq_has_overflowed(s)) 203 chip->logbuffer_tail = tail; 204 mutex_unlock(&chip->logbuffer_lock); 205 206 return 0; 207 } 208 DEFINE_SHOW_ATTRIBUTE(fusb302_debug); 209 210 static void fusb302_debugfs_init(struct fusb302_chip *chip) 211 { 212 char name[NAME_MAX]; 213 214 mutex_init(&chip->logbuffer_lock); 215 snprintf(name, NAME_MAX, "fusb302-%s", dev_name(chip->dev)); 216 chip->dentry = debugfs_create_dir(name, usb_debug_root); 217 debugfs_create_file("log", S_IFREG | 0444, chip->dentry, chip, 218 &fusb302_debug_fops); 219 } 220 221 static void fusb302_debugfs_exit(struct fusb302_chip *chip) 222 { 223 debugfs_remove(chip->dentry); 224 } 225 226 #else 227 228 static void fusb302_log(const struct fusb302_chip *chip, 229 const char *fmt, ...) { } 230 static void fusb302_debugfs_init(const struct fusb302_chip *chip) { } 231 static void fusb302_debugfs_exit(const struct fusb302_chip *chip) { } 232 233 #endif 234 235 static int fusb302_i2c_write(struct fusb302_chip *chip, 236 u8 address, u8 data) 237 { 238 int ret = 0; 239 240 ret = i2c_smbus_write_byte_data(chip->i2c_client, address, data); 241 if (ret < 0) 242 fusb302_log(chip, "cannot write 0x%02x to 0x%02x, ret=%d", 243 data, address, ret); 244 245 return ret; 246 } 247 248 static int fusb302_i2c_block_write(struct fusb302_chip *chip, u8 address, 249 u8 length, const u8 *data) 250 { 251 int ret = 0; 252 253 if (length <= 0) 254 return ret; 255 256 ret = i2c_smbus_write_i2c_block_data(chip->i2c_client, address, 257 length, data); 258 if (ret < 0) 259 fusb302_log(chip, "cannot block write 0x%02x, len=%d, ret=%d", 260 address, length, ret); 261 262 return ret; 263 } 264 265 static int fusb302_i2c_read(struct fusb302_chip *chip, 266 u8 address, u8 *data) 267 { 268 int ret = 0; 269 270 ret = i2c_smbus_read_byte_data(chip->i2c_client, address); 271 *data = (u8)ret; 272 if (ret < 0) 273 fusb302_log(chip, "cannot read %02x, ret=%d", address, ret); 274 275 return ret; 276 } 277 278 static int fusb302_i2c_block_read(struct fusb302_chip *chip, u8 address, 279 u8 length, u8 *data) 280 { 281 int ret = 0; 282 283 if (length <= 0) 284 return ret; 285 286 ret = i2c_smbus_read_i2c_block_data(chip->i2c_client, address, 287 length, data); 288 if (ret < 0) { 289 fusb302_log(chip, "cannot block read 0x%02x, len=%d, ret=%d", 290 address, length, ret); 291 goto done; 292 } 293 if (ret != length) { 294 fusb302_log(chip, "only read %d/%d bytes from 0x%02x", 295 ret, length, address); 296 ret = -EIO; 297 } 298 299 done: 300 return ret; 301 } 302 303 static int fusb302_i2c_mask_write(struct fusb302_chip *chip, u8 address, 304 u8 mask, u8 value) 305 { 306 int ret = 0; 307 u8 data; 308 309 ret = fusb302_i2c_read(chip, address, &data); 310 if (ret < 0) 311 return ret; 312 data &= ~mask; 313 data |= value; 314 ret = fusb302_i2c_write(chip, address, data); 315 if (ret < 0) 316 return ret; 317 318 return ret; 319 } 320 321 static int fusb302_i2c_set_bits(struct fusb302_chip *chip, u8 address, 322 u8 set_bits) 323 { 324 return fusb302_i2c_mask_write(chip, address, 0x00, set_bits); 325 } 326 327 static int fusb302_i2c_clear_bits(struct fusb302_chip *chip, u8 address, 328 u8 clear_bits) 329 { 330 return fusb302_i2c_mask_write(chip, address, clear_bits, 0x00); 331 } 332 333 static int fusb302_sw_reset(struct fusb302_chip *chip) 334 { 335 int ret = 0; 336 337 ret = fusb302_i2c_write(chip, FUSB_REG_RESET, 338 FUSB_REG_RESET_SW_RESET); 339 if (ret < 0) 340 fusb302_log(chip, "cannot sw reset the chip, ret=%d", ret); 341 else 342 fusb302_log(chip, "sw reset"); 343 344 return ret; 345 } 346 347 static int fusb302_enable_tx_auto_retries(struct fusb302_chip *chip, u8 retry_count) 348 { 349 int ret = 0; 350 351 ret = fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL3, retry_count | 352 FUSB_REG_CONTROL3_AUTO_RETRY); 353 354 return ret; 355 } 356 357 /* 358 * initialize interrupt on the chip 359 * - unmasked interrupt: VBUS_OK 360 */ 361 static int fusb302_init_interrupt(struct fusb302_chip *chip) 362 { 363 int ret = 0; 364 365 ret = fusb302_i2c_write(chip, FUSB_REG_MASK, 366 0xFF & ~FUSB_REG_MASK_VBUSOK); 367 if (ret < 0) 368 return ret; 369 ret = fusb302_i2c_write(chip, FUSB_REG_MASKA, 0xFF); 370 if (ret < 0) 371 return ret; 372 ret = fusb302_i2c_write(chip, FUSB_REG_MASKB, 0xFF); 373 if (ret < 0) 374 return ret; 375 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_CONTROL0, 376 FUSB_REG_CONTROL0_INT_MASK); 377 if (ret < 0) 378 return ret; 379 380 return ret; 381 } 382 383 static int fusb302_set_power_mode(struct fusb302_chip *chip, u8 power_mode) 384 { 385 int ret = 0; 386 387 ret = fusb302_i2c_write(chip, FUSB_REG_POWER, power_mode); 388 389 return ret; 390 } 391 392 static int tcpm_init(struct tcpc_dev *dev) 393 { 394 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, 395 tcpc_dev); 396 int ret = 0; 397 u8 data; 398 399 ret = fusb302_sw_reset(chip); 400 if (ret < 0) 401 return ret; 402 ret = fusb302_enable_tx_auto_retries(chip, FUSB_REG_CONTROL3_N_RETRIES_3); 403 if (ret < 0) 404 return ret; 405 ret = fusb302_init_interrupt(chip); 406 if (ret < 0) 407 return ret; 408 ret = fusb302_set_power_mode(chip, FUSB_REG_POWER_PWR_ALL); 409 if (ret < 0) 410 return ret; 411 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &data); 412 if (ret < 0) 413 return ret; 414 chip->vbus_present = !!(data & FUSB_REG_STATUS0_VBUSOK); 415 ret = fusb302_i2c_read(chip, FUSB_REG_DEVICE_ID, &data); 416 if (ret < 0) 417 return ret; 418 fusb302_log(chip, "fusb302 device ID: 0x%02x", data); 419 420 return ret; 421 } 422 423 static int tcpm_get_vbus(struct tcpc_dev *dev) 424 { 425 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, 426 tcpc_dev); 427 int ret = 0; 428 429 mutex_lock(&chip->lock); 430 ret = chip->vbus_present ? 1 : 0; 431 mutex_unlock(&chip->lock); 432 433 return ret; 434 } 435 436 static int tcpm_get_current_limit(struct tcpc_dev *dev) 437 { 438 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, 439 tcpc_dev); 440 int current_limit = 0; 441 unsigned long timeout; 442 443 if (!chip->extcon) 444 return 0; 445 446 /* 447 * USB2 Charger detection may still be in progress when we get here, 448 * this can take upto 600ms, wait 800ms max. 449 */ 450 timeout = jiffies + msecs_to_jiffies(800); 451 do { 452 if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_SDP) == 1) 453 current_limit = 500; 454 455 if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_CDP) == 1 || 456 extcon_get_state(chip->extcon, EXTCON_CHG_USB_ACA) == 1) 457 current_limit = 1500; 458 459 if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_DCP) == 1) 460 current_limit = 2000; 461 462 msleep(50); 463 } while (current_limit == 0 && time_before(jiffies, timeout)); 464 465 return current_limit; 466 } 467 468 static int fusb302_set_src_current(struct fusb302_chip *chip, 469 enum src_current_status status) 470 { 471 int ret = 0; 472 473 chip->src_current_status = status; 474 switch (status) { 475 case SRC_CURRENT_DEFAULT: 476 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0, 477 FUSB_REG_CONTROL0_HOST_CUR_MASK, 478 FUSB_REG_CONTROL0_HOST_CUR_DEF); 479 break; 480 case SRC_CURRENT_MEDIUM: 481 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0, 482 FUSB_REG_CONTROL0_HOST_CUR_MASK, 483 FUSB_REG_CONTROL0_HOST_CUR_MED); 484 break; 485 case SRC_CURRENT_HIGH: 486 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0, 487 FUSB_REG_CONTROL0_HOST_CUR_MASK, 488 FUSB_REG_CONTROL0_HOST_CUR_HIGH); 489 break; 490 default: 491 break; 492 } 493 494 return ret; 495 } 496 497 static int fusb302_set_toggling(struct fusb302_chip *chip, 498 enum toggling_mode mode) 499 { 500 int ret = 0; 501 502 /* first disable toggling */ 503 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_CONTROL2, 504 FUSB_REG_CONTROL2_TOGGLE); 505 if (ret < 0) 506 return ret; 507 /* mask interrupts for SRC or SNK */ 508 ret = fusb302_i2c_set_bits(chip, FUSB_REG_MASK, 509 FUSB_REG_MASK_BC_LVL | 510 FUSB_REG_MASK_COMP_CHNG); 511 if (ret < 0) 512 return ret; 513 chip->intr_bc_lvl = false; 514 chip->intr_comp_chng = false; 515 /* configure toggling mode: none/snk/src/drp */ 516 switch (mode) { 517 case TOGGLING_MODE_OFF: 518 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2, 519 FUSB_REG_CONTROL2_MODE_MASK, 520 FUSB_REG_CONTROL2_MODE_NONE); 521 if (ret < 0) 522 return ret; 523 break; 524 case TOGGLING_MODE_SNK: 525 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2, 526 FUSB_REG_CONTROL2_MODE_MASK, 527 FUSB_REG_CONTROL2_MODE_UFP); 528 if (ret < 0) 529 return ret; 530 break; 531 case TOGGLING_MODE_SRC: 532 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2, 533 FUSB_REG_CONTROL2_MODE_MASK, 534 FUSB_REG_CONTROL2_MODE_DFP); 535 if (ret < 0) 536 return ret; 537 break; 538 case TOGGLING_MODE_DRP: 539 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2, 540 FUSB_REG_CONTROL2_MODE_MASK, 541 FUSB_REG_CONTROL2_MODE_DRP); 542 if (ret < 0) 543 return ret; 544 break; 545 default: 546 break; 547 } 548 549 if (mode == TOGGLING_MODE_OFF) { 550 /* mask TOGDONE interrupt */ 551 ret = fusb302_i2c_set_bits(chip, FUSB_REG_MASKA, 552 FUSB_REG_MASKA_TOGDONE); 553 if (ret < 0) 554 return ret; 555 chip->intr_togdone = false; 556 } else { 557 /* Datasheet says vconn MUST be off when toggling */ 558 WARN(chip->vconn_on, "Vconn is on during toggle start"); 559 /* unmask TOGDONE interrupt */ 560 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASKA, 561 FUSB_REG_MASKA_TOGDONE); 562 if (ret < 0) 563 return ret; 564 chip->intr_togdone = true; 565 /* start toggling */ 566 ret = fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL2, 567 FUSB_REG_CONTROL2_TOGGLE); 568 if (ret < 0) 569 return ret; 570 /* during toggling, consider cc as Open */ 571 chip->cc1 = TYPEC_CC_OPEN; 572 chip->cc2 = TYPEC_CC_OPEN; 573 } 574 chip->toggling_mode = mode; 575 576 return ret; 577 } 578 579 static const char * const typec_cc_status_name[] = { 580 [TYPEC_CC_OPEN] = "Open", 581 [TYPEC_CC_RA] = "Ra", 582 [TYPEC_CC_RD] = "Rd", 583 [TYPEC_CC_RP_DEF] = "Rp-def", 584 [TYPEC_CC_RP_1_5] = "Rp-1.5", 585 [TYPEC_CC_RP_3_0] = "Rp-3.0", 586 }; 587 588 static const enum src_current_status cc_src_current[] = { 589 [TYPEC_CC_OPEN] = SRC_CURRENT_DEFAULT, 590 [TYPEC_CC_RA] = SRC_CURRENT_DEFAULT, 591 [TYPEC_CC_RD] = SRC_CURRENT_DEFAULT, 592 [TYPEC_CC_RP_DEF] = SRC_CURRENT_DEFAULT, 593 [TYPEC_CC_RP_1_5] = SRC_CURRENT_MEDIUM, 594 [TYPEC_CC_RP_3_0] = SRC_CURRENT_HIGH, 595 }; 596 597 static int tcpm_set_cc(struct tcpc_dev *dev, enum typec_cc_status cc) 598 { 599 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, 600 tcpc_dev); 601 u8 switches0_mask = FUSB_REG_SWITCHES0_CC1_PU_EN | 602 FUSB_REG_SWITCHES0_CC2_PU_EN | 603 FUSB_REG_SWITCHES0_CC1_PD_EN | 604 FUSB_REG_SWITCHES0_CC2_PD_EN; 605 u8 rd_mda, switches0_data = 0x00; 606 int ret = 0; 607 608 mutex_lock(&chip->lock); 609 switch (cc) { 610 case TYPEC_CC_OPEN: 611 break; 612 case TYPEC_CC_RD: 613 switches0_data |= FUSB_REG_SWITCHES0_CC1_PD_EN | 614 FUSB_REG_SWITCHES0_CC2_PD_EN; 615 break; 616 case TYPEC_CC_RP_DEF: 617 case TYPEC_CC_RP_1_5: 618 case TYPEC_CC_RP_3_0: 619 switches0_data |= (chip->cc_polarity == TYPEC_POLARITY_CC1) ? 620 FUSB_REG_SWITCHES0_CC1_PU_EN : 621 FUSB_REG_SWITCHES0_CC2_PU_EN; 622 break; 623 default: 624 fusb302_log(chip, "unsupported cc value %s", 625 typec_cc_status_name[cc]); 626 ret = -EINVAL; 627 goto done; 628 } 629 630 fusb302_log(chip, "cc := %s", typec_cc_status_name[cc]); 631 632 ret = fusb302_set_toggling(chip, TOGGLING_MODE_OFF); 633 if (ret < 0) { 634 fusb302_log(chip, "cannot set toggling mode, ret=%d", ret); 635 goto done; 636 } 637 638 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0, 639 switches0_mask, switches0_data); 640 if (ret < 0) { 641 fusb302_log(chip, "cannot set pull-up/-down, ret = %d", ret); 642 goto done; 643 } 644 /* reset the cc status */ 645 chip->cc1 = TYPEC_CC_OPEN; 646 chip->cc2 = TYPEC_CC_OPEN; 647 648 /* adjust current for SRC */ 649 ret = fusb302_set_src_current(chip, cc_src_current[cc]); 650 if (ret < 0) { 651 fusb302_log(chip, "cannot set src current %s, ret=%d", 652 typec_cc_status_name[cc], ret); 653 goto done; 654 } 655 656 /* enable/disable interrupts, BC_LVL for SNK and COMP_CHNG for SRC */ 657 switch (cc) { 658 case TYPEC_CC_RP_DEF: 659 case TYPEC_CC_RP_1_5: 660 case TYPEC_CC_RP_3_0: 661 rd_mda = rd_mda_value[cc_src_current[cc]]; 662 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda); 663 if (ret < 0) { 664 fusb302_log(chip, 665 "cannot set SRC measure value, ret=%d", 666 ret); 667 goto done; 668 } 669 ret = fusb302_i2c_mask_write(chip, FUSB_REG_MASK, 670 FUSB_REG_MASK_BC_LVL | 671 FUSB_REG_MASK_COMP_CHNG, 672 FUSB_REG_MASK_BC_LVL); 673 if (ret < 0) { 674 fusb302_log(chip, "cannot set SRC interrupt, ret=%d", 675 ret); 676 goto done; 677 } 678 chip->intr_comp_chng = true; 679 chip->intr_bc_lvl = false; 680 break; 681 case TYPEC_CC_RD: 682 ret = fusb302_i2c_mask_write(chip, FUSB_REG_MASK, 683 FUSB_REG_MASK_BC_LVL | 684 FUSB_REG_MASK_COMP_CHNG, 685 FUSB_REG_MASK_COMP_CHNG); 686 if (ret < 0) { 687 fusb302_log(chip, "cannot set SRC interrupt, ret=%d", 688 ret); 689 goto done; 690 } 691 chip->intr_bc_lvl = true; 692 chip->intr_comp_chng = false; 693 break; 694 default: 695 break; 696 } 697 done: 698 mutex_unlock(&chip->lock); 699 700 return ret; 701 } 702 703 static int tcpm_get_cc(struct tcpc_dev *dev, enum typec_cc_status *cc1, 704 enum typec_cc_status *cc2) 705 { 706 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, 707 tcpc_dev); 708 709 mutex_lock(&chip->lock); 710 *cc1 = chip->cc1; 711 *cc2 = chip->cc2; 712 fusb302_log(chip, "cc1=%s, cc2=%s", typec_cc_status_name[*cc1], 713 typec_cc_status_name[*cc2]); 714 mutex_unlock(&chip->lock); 715 716 return 0; 717 } 718 719 static int tcpm_set_polarity(struct tcpc_dev *dev, 720 enum typec_cc_polarity polarity) 721 { 722 return 0; 723 } 724 725 static int tcpm_set_vconn(struct tcpc_dev *dev, bool on) 726 { 727 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, 728 tcpc_dev); 729 int ret = 0; 730 u8 switches0_data = 0x00; 731 u8 switches0_mask = FUSB_REG_SWITCHES0_VCONN_CC1 | 732 FUSB_REG_SWITCHES0_VCONN_CC2; 733 734 mutex_lock(&chip->lock); 735 if (chip->vconn_on == on) { 736 fusb302_log(chip, "vconn is already %s", on ? "On" : "Off"); 737 goto done; 738 } 739 if (on) { 740 switches0_data = (chip->cc_polarity == TYPEC_POLARITY_CC1) ? 741 FUSB_REG_SWITCHES0_VCONN_CC2 : 742 FUSB_REG_SWITCHES0_VCONN_CC1; 743 } 744 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0, 745 switches0_mask, switches0_data); 746 if (ret < 0) 747 goto done; 748 chip->vconn_on = on; 749 fusb302_log(chip, "vconn := %s", on ? "On" : "Off"); 750 done: 751 mutex_unlock(&chip->lock); 752 753 return ret; 754 } 755 756 static int tcpm_set_vbus(struct tcpc_dev *dev, bool on, bool charge) 757 { 758 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, 759 tcpc_dev); 760 int ret = 0; 761 762 mutex_lock(&chip->lock); 763 if (chip->vbus_on == on) { 764 fusb302_log(chip, "vbus is already %s", on ? "On" : "Off"); 765 } else { 766 if (on) 767 ret = regulator_enable(chip->vbus); 768 else 769 ret = regulator_disable(chip->vbus); 770 if (ret < 0) { 771 fusb302_log(chip, "cannot %s vbus regulator, ret=%d", 772 on ? "enable" : "disable", ret); 773 goto done; 774 } 775 chip->vbus_on = on; 776 fusb302_log(chip, "vbus := %s", on ? "On" : "Off"); 777 } 778 if (chip->charge_on == charge) 779 fusb302_log(chip, "charge is already %s", 780 charge ? "On" : "Off"); 781 else 782 chip->charge_on = charge; 783 784 done: 785 mutex_unlock(&chip->lock); 786 787 return ret; 788 } 789 790 static int fusb302_pd_tx_flush(struct fusb302_chip *chip) 791 { 792 return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL0, 793 FUSB_REG_CONTROL0_TX_FLUSH); 794 } 795 796 static int fusb302_pd_rx_flush(struct fusb302_chip *chip) 797 { 798 return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL1, 799 FUSB_REG_CONTROL1_RX_FLUSH); 800 } 801 802 static int fusb302_pd_set_auto_goodcrc(struct fusb302_chip *chip, bool on) 803 { 804 if (on) 805 return fusb302_i2c_set_bits(chip, FUSB_REG_SWITCHES1, 806 FUSB_REG_SWITCHES1_AUTO_GCRC); 807 return fusb302_i2c_clear_bits(chip, FUSB_REG_SWITCHES1, 808 FUSB_REG_SWITCHES1_AUTO_GCRC); 809 } 810 811 static int fusb302_pd_set_interrupts(struct fusb302_chip *chip, bool on) 812 { 813 int ret = 0; 814 u8 mask_interrupts = FUSB_REG_MASK_COLLISION; 815 u8 maska_interrupts = FUSB_REG_MASKA_RETRYFAIL | 816 FUSB_REG_MASKA_HARDSENT | 817 FUSB_REG_MASKA_TX_SUCCESS | 818 FUSB_REG_MASKA_HARDRESET; 819 u8 maskb_interrupts = FUSB_REG_MASKB_GCRCSENT; 820 821 ret = on ? 822 fusb302_i2c_clear_bits(chip, FUSB_REG_MASK, mask_interrupts) : 823 fusb302_i2c_set_bits(chip, FUSB_REG_MASK, mask_interrupts); 824 if (ret < 0) 825 return ret; 826 ret = on ? 827 fusb302_i2c_clear_bits(chip, FUSB_REG_MASKA, maska_interrupts) : 828 fusb302_i2c_set_bits(chip, FUSB_REG_MASKA, maska_interrupts); 829 if (ret < 0) 830 return ret; 831 ret = on ? 832 fusb302_i2c_clear_bits(chip, FUSB_REG_MASKB, maskb_interrupts) : 833 fusb302_i2c_set_bits(chip, FUSB_REG_MASKB, maskb_interrupts); 834 return ret; 835 } 836 837 static int tcpm_set_pd_rx(struct tcpc_dev *dev, bool on) 838 { 839 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, 840 tcpc_dev); 841 int ret = 0; 842 843 mutex_lock(&chip->lock); 844 ret = fusb302_pd_rx_flush(chip); 845 if (ret < 0) { 846 fusb302_log(chip, "cannot flush pd rx buffer, ret=%d", ret); 847 goto done; 848 } 849 ret = fusb302_pd_tx_flush(chip); 850 if (ret < 0) { 851 fusb302_log(chip, "cannot flush pd tx buffer, ret=%d", ret); 852 goto done; 853 } 854 ret = fusb302_pd_set_auto_goodcrc(chip, on); 855 if (ret < 0) { 856 fusb302_log(chip, "cannot turn %s auto GCRC, ret=%d", 857 on ? "on" : "off", ret); 858 goto done; 859 } 860 ret = fusb302_pd_set_interrupts(chip, on); 861 if (ret < 0) { 862 fusb302_log(chip, "cannot turn %s pd interrupts, ret=%d", 863 on ? "on" : "off", ret); 864 goto done; 865 } 866 fusb302_log(chip, "pd := %s", on ? "on" : "off"); 867 done: 868 mutex_unlock(&chip->lock); 869 870 return ret; 871 } 872 873 static const char * const typec_role_name[] = { 874 [TYPEC_SINK] = "Sink", 875 [TYPEC_SOURCE] = "Source", 876 }; 877 878 static const char * const typec_data_role_name[] = { 879 [TYPEC_DEVICE] = "Device", 880 [TYPEC_HOST] = "Host", 881 }; 882 883 static int tcpm_set_roles(struct tcpc_dev *dev, bool attached, 884 enum typec_role pwr, enum typec_data_role data) 885 { 886 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, 887 tcpc_dev); 888 int ret = 0; 889 u8 switches1_mask = FUSB_REG_SWITCHES1_POWERROLE | 890 FUSB_REG_SWITCHES1_DATAROLE; 891 u8 switches1_data = 0x00; 892 893 mutex_lock(&chip->lock); 894 if (pwr == TYPEC_SOURCE) 895 switches1_data |= FUSB_REG_SWITCHES1_POWERROLE; 896 if (data == TYPEC_HOST) 897 switches1_data |= FUSB_REG_SWITCHES1_DATAROLE; 898 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES1, 899 switches1_mask, switches1_data); 900 if (ret < 0) { 901 fusb302_log(chip, "unable to set pd header %s, %s, ret=%d", 902 typec_role_name[pwr], typec_data_role_name[data], 903 ret); 904 goto done; 905 } 906 fusb302_log(chip, "pd header := %s, %s", typec_role_name[pwr], 907 typec_data_role_name[data]); 908 done: 909 mutex_unlock(&chip->lock); 910 911 return ret; 912 } 913 914 static int tcpm_start_toggling(struct tcpc_dev *dev, 915 enum typec_port_type port_type, 916 enum typec_cc_status cc) 917 { 918 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, 919 tcpc_dev); 920 enum toggling_mode mode = TOGGLING_MODE_OFF; 921 int ret = 0; 922 923 switch (port_type) { 924 case TYPEC_PORT_SRC: 925 mode = TOGGLING_MODE_SRC; 926 break; 927 case TYPEC_PORT_SNK: 928 mode = TOGGLING_MODE_SNK; 929 break; 930 case TYPEC_PORT_DRP: 931 mode = TOGGLING_MODE_DRP; 932 break; 933 } 934 935 mutex_lock(&chip->lock); 936 ret = fusb302_set_src_current(chip, cc_src_current[cc]); 937 if (ret < 0) { 938 fusb302_log(chip, "unable to set src current %s, ret=%d", 939 typec_cc_status_name[cc], ret); 940 goto done; 941 } 942 ret = fusb302_set_toggling(chip, mode); 943 if (ret < 0) { 944 fusb302_log(chip, 945 "unable to start drp toggling, ret=%d", ret); 946 goto done; 947 } 948 fusb302_log(chip, "start drp toggling"); 949 done: 950 mutex_unlock(&chip->lock); 951 952 return ret; 953 } 954 955 static int fusb302_pd_send_message(struct fusb302_chip *chip, 956 const struct pd_message *msg) 957 { 958 int ret = 0; 959 u8 buf[40]; 960 u8 pos = 0; 961 int len; 962 963 /* SOP tokens */ 964 buf[pos++] = FUSB302_TKN_SYNC1; 965 buf[pos++] = FUSB302_TKN_SYNC1; 966 buf[pos++] = FUSB302_TKN_SYNC1; 967 buf[pos++] = FUSB302_TKN_SYNC2; 968 969 len = pd_header_cnt_le(msg->header) * 4; 970 /* plug 2 for header */ 971 len += 2; 972 if (len > 0x1F) { 973 fusb302_log(chip, 974 "PD message too long %d (incl. header)", len); 975 return -EINVAL; 976 } 977 /* packsym tells the FUSB302 chip that the next X bytes are payload */ 978 buf[pos++] = FUSB302_TKN_PACKSYM | (len & 0x1F); 979 memcpy(&buf[pos], &msg->header, sizeof(msg->header)); 980 pos += sizeof(msg->header); 981 982 len -= 2; 983 memcpy(&buf[pos], msg->payload, len); 984 pos += len; 985 986 /* CRC */ 987 buf[pos++] = FUSB302_TKN_JAMCRC; 988 /* EOP */ 989 buf[pos++] = FUSB302_TKN_EOP; 990 /* turn tx off after sending message */ 991 buf[pos++] = FUSB302_TKN_TXOFF; 992 /* start transmission */ 993 buf[pos++] = FUSB302_TKN_TXON; 994 995 ret = fusb302_i2c_block_write(chip, FUSB_REG_FIFOS, pos, buf); 996 if (ret < 0) 997 return ret; 998 fusb302_log(chip, "sending PD message header: %x", msg->header); 999 fusb302_log(chip, "sending PD message len: %d", len); 1000 1001 return ret; 1002 } 1003 1004 static int fusb302_pd_send_hardreset(struct fusb302_chip *chip) 1005 { 1006 return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL3, 1007 FUSB_REG_CONTROL3_SEND_HARDRESET); 1008 } 1009 1010 static const char * const transmit_type_name[] = { 1011 [TCPC_TX_SOP] = "SOP", 1012 [TCPC_TX_SOP_PRIME] = "SOP'", 1013 [TCPC_TX_SOP_PRIME_PRIME] = "SOP''", 1014 [TCPC_TX_SOP_DEBUG_PRIME] = "DEBUG'", 1015 [TCPC_TX_SOP_DEBUG_PRIME_PRIME] = "DEBUG''", 1016 [TCPC_TX_HARD_RESET] = "HARD_RESET", 1017 [TCPC_TX_CABLE_RESET] = "CABLE_RESET", 1018 [TCPC_TX_BIST_MODE_2] = "BIST_MODE_2", 1019 }; 1020 1021 static int tcpm_pd_transmit(struct tcpc_dev *dev, enum tcpm_transmit_type type, 1022 const struct pd_message *msg, unsigned int negotiated_rev) 1023 { 1024 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, 1025 tcpc_dev); 1026 int ret = 0; 1027 1028 mutex_lock(&chip->lock); 1029 switch (type) { 1030 case TCPC_TX_SOP: 1031 /* nRetryCount 3 in P2.0 spec, whereas 2 in PD3.0 spec */ 1032 ret = fusb302_enable_tx_auto_retries(chip, negotiated_rev > PD_REV20 ? 1033 FUSB_REG_CONTROL3_N_RETRIES_2 : 1034 FUSB_REG_CONTROL3_N_RETRIES_3); 1035 if (ret < 0) 1036 fusb302_log(chip, "Cannot update retry count ret=%d", ret); 1037 1038 ret = fusb302_pd_send_message(chip, msg); 1039 if (ret < 0) 1040 fusb302_log(chip, 1041 "cannot send PD message, ret=%d", ret); 1042 break; 1043 case TCPC_TX_HARD_RESET: 1044 ret = fusb302_pd_send_hardreset(chip); 1045 if (ret < 0) 1046 fusb302_log(chip, 1047 "cannot send hardreset, ret=%d", ret); 1048 break; 1049 default: 1050 fusb302_log(chip, "type %s not supported", 1051 transmit_type_name[type]); 1052 ret = -EINVAL; 1053 } 1054 mutex_unlock(&chip->lock); 1055 1056 return ret; 1057 } 1058 1059 static enum typec_cc_status fusb302_bc_lvl_to_cc(u8 bc_lvl) 1060 { 1061 if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_1230_MAX) 1062 return TYPEC_CC_RP_3_0; 1063 if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_600_1230) 1064 return TYPEC_CC_RP_1_5; 1065 if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_200_600) 1066 return TYPEC_CC_RP_DEF; 1067 return TYPEC_CC_OPEN; 1068 } 1069 1070 static void fusb302_bc_lvl_handler_work(struct work_struct *work) 1071 { 1072 struct fusb302_chip *chip = container_of(work, struct fusb302_chip, 1073 bc_lvl_handler.work); 1074 int ret = 0; 1075 u8 status0; 1076 u8 bc_lvl; 1077 enum typec_cc_status cc_status; 1078 1079 mutex_lock(&chip->lock); 1080 if (!chip->intr_bc_lvl) { 1081 fusb302_log(chip, "BC_LVL interrupt is turned off, abort"); 1082 goto done; 1083 } 1084 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0); 1085 if (ret < 0) 1086 goto done; 1087 fusb302_log(chip, "BC_LVL handler, status0=0x%02x", status0); 1088 if (status0 & FUSB_REG_STATUS0_ACTIVITY) { 1089 fusb302_log(chip, "CC activities detected, delay handling"); 1090 mod_delayed_work(chip->wq, &chip->bc_lvl_handler, 1091 msecs_to_jiffies(T_BC_LVL_DEBOUNCE_DELAY_MS)); 1092 goto done; 1093 } 1094 bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK; 1095 cc_status = fusb302_bc_lvl_to_cc(bc_lvl); 1096 if (chip->cc_polarity == TYPEC_POLARITY_CC1) { 1097 if (chip->cc1 != cc_status) { 1098 fusb302_log(chip, "cc1: %s -> %s", 1099 typec_cc_status_name[chip->cc1], 1100 typec_cc_status_name[cc_status]); 1101 chip->cc1 = cc_status; 1102 tcpm_cc_change(chip->tcpm_port); 1103 } 1104 } else { 1105 if (chip->cc2 != cc_status) { 1106 fusb302_log(chip, "cc2: %s -> %s", 1107 typec_cc_status_name[chip->cc2], 1108 typec_cc_status_name[cc_status]); 1109 chip->cc2 = cc_status; 1110 tcpm_cc_change(chip->tcpm_port); 1111 } 1112 } 1113 1114 done: 1115 mutex_unlock(&chip->lock); 1116 } 1117 1118 static void init_tcpc_dev(struct tcpc_dev *fusb302_tcpc_dev) 1119 { 1120 fusb302_tcpc_dev->init = tcpm_init; 1121 fusb302_tcpc_dev->get_vbus = tcpm_get_vbus; 1122 fusb302_tcpc_dev->get_current_limit = tcpm_get_current_limit; 1123 fusb302_tcpc_dev->set_cc = tcpm_set_cc; 1124 fusb302_tcpc_dev->get_cc = tcpm_get_cc; 1125 fusb302_tcpc_dev->set_polarity = tcpm_set_polarity; 1126 fusb302_tcpc_dev->set_vconn = tcpm_set_vconn; 1127 fusb302_tcpc_dev->set_vbus = tcpm_set_vbus; 1128 fusb302_tcpc_dev->set_pd_rx = tcpm_set_pd_rx; 1129 fusb302_tcpc_dev->set_roles = tcpm_set_roles; 1130 fusb302_tcpc_dev->start_toggling = tcpm_start_toggling; 1131 fusb302_tcpc_dev->pd_transmit = tcpm_pd_transmit; 1132 } 1133 1134 static const char * const cc_polarity_name[] = { 1135 [TYPEC_POLARITY_CC1] = "Polarity_CC1", 1136 [TYPEC_POLARITY_CC2] = "Polarity_CC2", 1137 }; 1138 1139 static int fusb302_set_cc_polarity_and_pull(struct fusb302_chip *chip, 1140 enum typec_cc_polarity cc_polarity, 1141 bool pull_up, bool pull_down) 1142 { 1143 int ret = 0; 1144 u8 switches0_data = 0x00; 1145 u8 switches1_mask = FUSB_REG_SWITCHES1_TXCC1_EN | 1146 FUSB_REG_SWITCHES1_TXCC2_EN; 1147 u8 switches1_data = 0x00; 1148 1149 if (pull_down) 1150 switches0_data |= FUSB_REG_SWITCHES0_CC1_PD_EN | 1151 FUSB_REG_SWITCHES0_CC2_PD_EN; 1152 1153 if (cc_polarity == TYPEC_POLARITY_CC1) { 1154 switches0_data |= FUSB_REG_SWITCHES0_MEAS_CC1; 1155 if (chip->vconn_on) 1156 switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC2; 1157 if (pull_up) 1158 switches0_data |= FUSB_REG_SWITCHES0_CC1_PU_EN; 1159 switches1_data = FUSB_REG_SWITCHES1_TXCC1_EN; 1160 } else { 1161 switches0_data |= FUSB_REG_SWITCHES0_MEAS_CC2; 1162 if (chip->vconn_on) 1163 switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC1; 1164 if (pull_up) 1165 switches0_data |= FUSB_REG_SWITCHES0_CC2_PU_EN; 1166 switches1_data = FUSB_REG_SWITCHES1_TXCC2_EN; 1167 } 1168 ret = fusb302_i2c_write(chip, FUSB_REG_SWITCHES0, switches0_data); 1169 if (ret < 0) 1170 return ret; 1171 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES1, 1172 switches1_mask, switches1_data); 1173 if (ret < 0) 1174 return ret; 1175 chip->cc_polarity = cc_polarity; 1176 1177 return ret; 1178 } 1179 1180 static int fusb302_handle_togdone_snk(struct fusb302_chip *chip, 1181 u8 togdone_result) 1182 { 1183 int ret = 0; 1184 u8 status0; 1185 u8 bc_lvl; 1186 enum typec_cc_polarity cc_polarity; 1187 enum typec_cc_status cc_status_active, cc1, cc2; 1188 1189 /* set polarity and pull_up, pull_down */ 1190 cc_polarity = (togdone_result == FUSB_REG_STATUS1A_TOGSS_SNK1) ? 1191 TYPEC_POLARITY_CC1 : TYPEC_POLARITY_CC2; 1192 ret = fusb302_set_cc_polarity_and_pull(chip, cc_polarity, false, true); 1193 if (ret < 0) { 1194 fusb302_log(chip, "cannot set cc polarity %s, ret=%d", 1195 cc_polarity_name[cc_polarity], ret); 1196 return ret; 1197 } 1198 /* fusb302_set_cc_polarity() has set the correct measure block */ 1199 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0); 1200 if (ret < 0) 1201 return ret; 1202 bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK; 1203 cc_status_active = fusb302_bc_lvl_to_cc(bc_lvl); 1204 /* restart toggling if the cc status on the active line is OPEN */ 1205 if (cc_status_active == TYPEC_CC_OPEN) { 1206 fusb302_log(chip, "restart toggling as CC_OPEN detected"); 1207 ret = fusb302_set_toggling(chip, chip->toggling_mode); 1208 return ret; 1209 } 1210 /* update tcpm with the new cc value */ 1211 cc1 = (cc_polarity == TYPEC_POLARITY_CC1) ? 1212 cc_status_active : TYPEC_CC_OPEN; 1213 cc2 = (cc_polarity == TYPEC_POLARITY_CC2) ? 1214 cc_status_active : TYPEC_CC_OPEN; 1215 if ((chip->cc1 != cc1) || (chip->cc2 != cc2)) { 1216 chip->cc1 = cc1; 1217 chip->cc2 = cc2; 1218 tcpm_cc_change(chip->tcpm_port); 1219 } 1220 /* turn off toggling */ 1221 ret = fusb302_set_toggling(chip, TOGGLING_MODE_OFF); 1222 if (ret < 0) { 1223 fusb302_log(chip, 1224 "cannot set toggling mode off, ret=%d", ret); 1225 return ret; 1226 } 1227 /* unmask bc_lvl interrupt */ 1228 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASK, FUSB_REG_MASK_BC_LVL); 1229 if (ret < 0) { 1230 fusb302_log(chip, 1231 "cannot unmask bc_lcl interrupt, ret=%d", ret); 1232 return ret; 1233 } 1234 chip->intr_bc_lvl = true; 1235 fusb302_log(chip, "detected cc1=%s, cc2=%s", 1236 typec_cc_status_name[cc1], 1237 typec_cc_status_name[cc2]); 1238 1239 return ret; 1240 } 1241 1242 /* On error returns < 0, otherwise a typec_cc_status value */ 1243 static int fusb302_get_src_cc_status(struct fusb302_chip *chip, 1244 enum typec_cc_polarity cc_polarity, 1245 enum typec_cc_status *cc) 1246 { 1247 u8 ra_mda = ra_mda_value[chip->src_current_status]; 1248 u8 rd_mda = rd_mda_value[chip->src_current_status]; 1249 u8 switches0_data, status0; 1250 int ret; 1251 1252 /* Step 1: Set switches so that we measure the right CC pin */ 1253 switches0_data = (cc_polarity == TYPEC_POLARITY_CC1) ? 1254 FUSB_REG_SWITCHES0_CC1_PU_EN | FUSB_REG_SWITCHES0_MEAS_CC1 : 1255 FUSB_REG_SWITCHES0_CC2_PU_EN | FUSB_REG_SWITCHES0_MEAS_CC2; 1256 ret = fusb302_i2c_write(chip, FUSB_REG_SWITCHES0, switches0_data); 1257 if (ret < 0) 1258 return ret; 1259 1260 fusb302_i2c_read(chip, FUSB_REG_SWITCHES0, &status0); 1261 fusb302_log(chip, "get_src_cc_status switches: 0x%0x", status0); 1262 1263 /* Step 2: Set compararator volt to differentiate between Open and Rd */ 1264 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda); 1265 if (ret < 0) 1266 return ret; 1267 1268 usleep_range(50, 100); 1269 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0); 1270 if (ret < 0) 1271 return ret; 1272 1273 fusb302_log(chip, "get_src_cc_status rd_mda status0: 0x%0x", status0); 1274 if (status0 & FUSB_REG_STATUS0_COMP) { 1275 *cc = TYPEC_CC_OPEN; 1276 return 0; 1277 } 1278 1279 /* Step 3: Set compararator input to differentiate between Rd and Ra. */ 1280 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, ra_mda); 1281 if (ret < 0) 1282 return ret; 1283 1284 usleep_range(50, 100); 1285 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0); 1286 if (ret < 0) 1287 return ret; 1288 1289 fusb302_log(chip, "get_src_cc_status ra_mda status0: 0x%0x", status0); 1290 if (status0 & FUSB_REG_STATUS0_COMP) 1291 *cc = TYPEC_CC_RD; 1292 else 1293 *cc = TYPEC_CC_RA; 1294 1295 return 0; 1296 } 1297 1298 static int fusb302_handle_togdone_src(struct fusb302_chip *chip, 1299 u8 togdone_result) 1300 { 1301 /* 1302 * - set polarity (measure cc, vconn, tx) 1303 * - set pull_up, pull_down 1304 * - set cc1, cc2, and update to tcpm_port 1305 * - set I_COMP interrupt on 1306 */ 1307 int ret = 0; 1308 u8 rd_mda = rd_mda_value[chip->src_current_status]; 1309 enum toggling_mode toggling_mode = chip->toggling_mode; 1310 enum typec_cc_polarity cc_polarity; 1311 enum typec_cc_status cc1, cc2; 1312 1313 /* 1314 * The toggle-engine will stop in a src state if it sees either Ra or 1315 * Rd. Determine the status for both CC pins, starting with the one 1316 * where toggling stopped, as that is where the switches point now. 1317 */ 1318 if (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1) 1319 ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC1, &cc1); 1320 else 1321 ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC2, &cc2); 1322 if (ret < 0) 1323 return ret; 1324 /* we must turn off toggling before we can measure the other pin */ 1325 ret = fusb302_set_toggling(chip, TOGGLING_MODE_OFF); 1326 if (ret < 0) { 1327 fusb302_log(chip, "cannot set toggling mode off, ret=%d", ret); 1328 return ret; 1329 } 1330 /* get the status of the other pin */ 1331 if (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1) 1332 ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC2, &cc2); 1333 else 1334 ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC1, &cc1); 1335 if (ret < 0) 1336 return ret; 1337 1338 /* determine polarity based on the status of both pins */ 1339 if (cc1 == TYPEC_CC_RD && 1340 (cc2 == TYPEC_CC_OPEN || cc2 == TYPEC_CC_RA)) { 1341 cc_polarity = TYPEC_POLARITY_CC1; 1342 } else if (cc2 == TYPEC_CC_RD && 1343 (cc1 == TYPEC_CC_OPEN || cc1 == TYPEC_CC_RA)) { 1344 cc_polarity = TYPEC_POLARITY_CC2; 1345 } else { 1346 fusb302_log(chip, "unexpected CC status cc1=%s, cc2=%s, restarting toggling", 1347 typec_cc_status_name[cc1], 1348 typec_cc_status_name[cc2]); 1349 return fusb302_set_toggling(chip, toggling_mode); 1350 } 1351 /* set polarity and pull_up, pull_down */ 1352 ret = fusb302_set_cc_polarity_and_pull(chip, cc_polarity, true, false); 1353 if (ret < 0) { 1354 fusb302_log(chip, "cannot set cc polarity %s, ret=%d", 1355 cc_polarity_name[cc_polarity], ret); 1356 return ret; 1357 } 1358 /* update tcpm with the new cc value */ 1359 if ((chip->cc1 != cc1) || (chip->cc2 != cc2)) { 1360 chip->cc1 = cc1; 1361 chip->cc2 = cc2; 1362 tcpm_cc_change(chip->tcpm_port); 1363 } 1364 /* set MDAC to Rd threshold, and unmask I_COMP for unplug detection */ 1365 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda); 1366 if (ret < 0) 1367 return ret; 1368 /* unmask comp_chng interrupt */ 1369 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASK, 1370 FUSB_REG_MASK_COMP_CHNG); 1371 if (ret < 0) { 1372 fusb302_log(chip, 1373 "cannot unmask comp_chng interrupt, ret=%d", ret); 1374 return ret; 1375 } 1376 chip->intr_comp_chng = true; 1377 fusb302_log(chip, "detected cc1=%s, cc2=%s", 1378 typec_cc_status_name[cc1], 1379 typec_cc_status_name[cc2]); 1380 1381 return ret; 1382 } 1383 1384 static int fusb302_handle_togdone(struct fusb302_chip *chip) 1385 { 1386 int ret = 0; 1387 u8 status1a; 1388 u8 togdone_result; 1389 1390 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS1A, &status1a); 1391 if (ret < 0) 1392 return ret; 1393 togdone_result = (status1a >> FUSB_REG_STATUS1A_TOGSS_POS) & 1394 FUSB_REG_STATUS1A_TOGSS_MASK; 1395 switch (togdone_result) { 1396 case FUSB_REG_STATUS1A_TOGSS_SNK1: 1397 case FUSB_REG_STATUS1A_TOGSS_SNK2: 1398 return fusb302_handle_togdone_snk(chip, togdone_result); 1399 case FUSB_REG_STATUS1A_TOGSS_SRC1: 1400 case FUSB_REG_STATUS1A_TOGSS_SRC2: 1401 return fusb302_handle_togdone_src(chip, togdone_result); 1402 case FUSB_REG_STATUS1A_TOGSS_AA: 1403 /* doesn't support */ 1404 fusb302_log(chip, "AudioAccessory not supported"); 1405 fusb302_set_toggling(chip, chip->toggling_mode); 1406 break; 1407 default: 1408 fusb302_log(chip, "TOGDONE with an invalid state: %d", 1409 togdone_result); 1410 fusb302_set_toggling(chip, chip->toggling_mode); 1411 break; 1412 } 1413 return ret; 1414 } 1415 1416 static int fusb302_pd_reset(struct fusb302_chip *chip) 1417 { 1418 return fusb302_i2c_set_bits(chip, FUSB_REG_RESET, 1419 FUSB_REG_RESET_PD_RESET); 1420 } 1421 1422 static int fusb302_pd_read_message(struct fusb302_chip *chip, 1423 struct pd_message *msg) 1424 { 1425 int ret = 0; 1426 u8 token; 1427 u8 crc[4]; 1428 int len; 1429 1430 /* first SOP token */ 1431 ret = fusb302_i2c_read(chip, FUSB_REG_FIFOS, &token); 1432 if (ret < 0) 1433 return ret; 1434 ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, 2, 1435 (u8 *)&msg->header); 1436 if (ret < 0) 1437 return ret; 1438 len = pd_header_cnt_le(msg->header) * 4; 1439 /* add 4 to length to include the CRC */ 1440 if (len > PD_MAX_PAYLOAD * 4) { 1441 fusb302_log(chip, "PD message too long %d", len); 1442 return -EINVAL; 1443 } 1444 if (len > 0) { 1445 ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, len, 1446 (u8 *)msg->payload); 1447 if (ret < 0) 1448 return ret; 1449 } 1450 /* another 4 bytes to read CRC out */ 1451 ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, 4, crc); 1452 if (ret < 0) 1453 return ret; 1454 fusb302_log(chip, "PD message header: %x", msg->header); 1455 fusb302_log(chip, "PD message len: %d", len); 1456 1457 /* 1458 * Check if we've read off a GoodCRC message. If so then indicate to 1459 * TCPM that the previous transmission has completed. Otherwise we pass 1460 * the received message over to TCPM for processing. 1461 * 1462 * We make this check here instead of basing the reporting decision on 1463 * the IRQ event type, as it's possible for the chip to report the 1464 * TX_SUCCESS and GCRCSENT events out of order on occasion, so we need 1465 * to check the message type to ensure correct reporting to TCPM. 1466 */ 1467 if ((!len) && (pd_header_type_le(msg->header) == PD_CTRL_GOOD_CRC)) 1468 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_SUCCESS); 1469 else 1470 tcpm_pd_receive(chip->tcpm_port, msg); 1471 1472 return ret; 1473 } 1474 1475 static irqreturn_t fusb302_irq_intn(int irq, void *dev_id) 1476 { 1477 struct fusb302_chip *chip = dev_id; 1478 unsigned long flags; 1479 1480 /* Disable our level triggered IRQ until our irq_work has cleared it */ 1481 disable_irq_nosync(chip->gpio_int_n_irq); 1482 1483 spin_lock_irqsave(&chip->irq_lock, flags); 1484 if (chip->irq_suspended) 1485 chip->irq_while_suspended = true; 1486 else 1487 schedule_work(&chip->irq_work); 1488 spin_unlock_irqrestore(&chip->irq_lock, flags); 1489 1490 return IRQ_HANDLED; 1491 } 1492 1493 static void fusb302_irq_work(struct work_struct *work) 1494 { 1495 struct fusb302_chip *chip = container_of(work, struct fusb302_chip, 1496 irq_work); 1497 int ret = 0; 1498 u8 interrupt; 1499 u8 interrupta; 1500 u8 interruptb; 1501 u8 status0; 1502 bool vbus_present; 1503 bool comp_result; 1504 bool intr_togdone; 1505 bool intr_bc_lvl; 1506 bool intr_comp_chng; 1507 struct pd_message pd_msg; 1508 1509 mutex_lock(&chip->lock); 1510 /* grab a snapshot of intr flags */ 1511 intr_togdone = chip->intr_togdone; 1512 intr_bc_lvl = chip->intr_bc_lvl; 1513 intr_comp_chng = chip->intr_comp_chng; 1514 1515 ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPT, &interrupt); 1516 if (ret < 0) 1517 goto done; 1518 ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPTA, &interrupta); 1519 if (ret < 0) 1520 goto done; 1521 ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPTB, &interruptb); 1522 if (ret < 0) 1523 goto done; 1524 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0); 1525 if (ret < 0) 1526 goto done; 1527 fusb302_log(chip, 1528 "IRQ: 0x%02x, a: 0x%02x, b: 0x%02x, status0: 0x%02x", 1529 interrupt, interrupta, interruptb, status0); 1530 1531 if (interrupt & FUSB_REG_INTERRUPT_VBUSOK) { 1532 vbus_present = !!(status0 & FUSB_REG_STATUS0_VBUSOK); 1533 fusb302_log(chip, "IRQ: VBUS_OK, vbus=%s", 1534 vbus_present ? "On" : "Off"); 1535 if (vbus_present != chip->vbus_present) { 1536 chip->vbus_present = vbus_present; 1537 tcpm_vbus_change(chip->tcpm_port); 1538 } 1539 } 1540 1541 if ((interrupta & FUSB_REG_INTERRUPTA_TOGDONE) && intr_togdone) { 1542 fusb302_log(chip, "IRQ: TOGDONE"); 1543 ret = fusb302_handle_togdone(chip); 1544 if (ret < 0) { 1545 fusb302_log(chip, 1546 "handle togdone error, ret=%d", ret); 1547 goto done; 1548 } 1549 } 1550 1551 if ((interrupt & FUSB_REG_INTERRUPT_BC_LVL) && intr_bc_lvl) { 1552 fusb302_log(chip, "IRQ: BC_LVL, handler pending"); 1553 /* 1554 * as BC_LVL interrupt can be affected by PD activity, 1555 * apply delay to for the handler to wait for the PD 1556 * signaling to finish. 1557 */ 1558 mod_delayed_work(chip->wq, &chip->bc_lvl_handler, 1559 msecs_to_jiffies(T_BC_LVL_DEBOUNCE_DELAY_MS)); 1560 } 1561 1562 if ((interrupt & FUSB_REG_INTERRUPT_COMP_CHNG) && intr_comp_chng) { 1563 comp_result = !!(status0 & FUSB_REG_STATUS0_COMP); 1564 fusb302_log(chip, "IRQ: COMP_CHNG, comp=%s", 1565 comp_result ? "true" : "false"); 1566 if (comp_result) { 1567 /* cc level > Rd_threshold, detach */ 1568 chip->cc1 = TYPEC_CC_OPEN; 1569 chip->cc2 = TYPEC_CC_OPEN; 1570 tcpm_cc_change(chip->tcpm_port); 1571 } 1572 } 1573 1574 if (interrupt & FUSB_REG_INTERRUPT_COLLISION) { 1575 fusb302_log(chip, "IRQ: PD collision"); 1576 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_FAILED); 1577 } 1578 1579 if (interrupta & FUSB_REG_INTERRUPTA_RETRYFAIL) { 1580 fusb302_log(chip, "IRQ: PD retry failed"); 1581 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_FAILED); 1582 } 1583 1584 if (interrupta & FUSB_REG_INTERRUPTA_HARDSENT) { 1585 fusb302_log(chip, "IRQ: PD hardreset sent"); 1586 ret = fusb302_pd_reset(chip); 1587 if (ret < 0) { 1588 fusb302_log(chip, "cannot PD reset, ret=%d", ret); 1589 goto done; 1590 } 1591 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_SUCCESS); 1592 } 1593 1594 if (interrupta & FUSB_REG_INTERRUPTA_TX_SUCCESS) { 1595 fusb302_log(chip, "IRQ: PD tx success"); 1596 ret = fusb302_pd_read_message(chip, &pd_msg); 1597 if (ret < 0) { 1598 fusb302_log(chip, 1599 "cannot read in PD message, ret=%d", ret); 1600 goto done; 1601 } 1602 } 1603 1604 if (interrupta & FUSB_REG_INTERRUPTA_HARDRESET) { 1605 fusb302_log(chip, "IRQ: PD received hardreset"); 1606 ret = fusb302_pd_reset(chip); 1607 if (ret < 0) { 1608 fusb302_log(chip, "cannot PD reset, ret=%d", ret); 1609 goto done; 1610 } 1611 tcpm_pd_hard_reset(chip->tcpm_port); 1612 } 1613 1614 if (interruptb & FUSB_REG_INTERRUPTB_GCRCSENT) { 1615 fusb302_log(chip, "IRQ: PD sent good CRC"); 1616 ret = fusb302_pd_read_message(chip, &pd_msg); 1617 if (ret < 0) { 1618 fusb302_log(chip, 1619 "cannot read in PD message, ret=%d", ret); 1620 goto done; 1621 } 1622 } 1623 done: 1624 mutex_unlock(&chip->lock); 1625 enable_irq(chip->gpio_int_n_irq); 1626 } 1627 1628 static int init_gpio(struct fusb302_chip *chip) 1629 { 1630 struct device *dev = chip->dev; 1631 int ret = 0; 1632 1633 chip->gpio_int_n = devm_gpiod_get(dev, "fcs,int_n", GPIOD_IN); 1634 if (IS_ERR(chip->gpio_int_n)) { 1635 dev_err(dev, "failed to request gpio_int_n\n"); 1636 return PTR_ERR(chip->gpio_int_n); 1637 } 1638 ret = gpiod_to_irq(chip->gpio_int_n); 1639 if (ret < 0) { 1640 dev_err(dev, 1641 "cannot request IRQ for GPIO Int_N, ret=%d", ret); 1642 return ret; 1643 } 1644 chip->gpio_int_n_irq = ret; 1645 return 0; 1646 } 1647 1648 #define PDO_FIXED_FLAGS \ 1649 (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP | PDO_FIXED_USB_COMM) 1650 1651 static const u32 src_pdo[] = { 1652 PDO_FIXED(5000, 400, PDO_FIXED_FLAGS) 1653 }; 1654 1655 static const u32 snk_pdo[] = { 1656 PDO_FIXED(5000, 400, PDO_FIXED_FLAGS) 1657 }; 1658 1659 static const struct property_entry port_props[] = { 1660 PROPERTY_ENTRY_STRING("data-role", "dual"), 1661 PROPERTY_ENTRY_STRING("power-role", "dual"), 1662 PROPERTY_ENTRY_STRING("try-power-role", "sink"), 1663 PROPERTY_ENTRY_U32_ARRAY("source-pdos", src_pdo), 1664 PROPERTY_ENTRY_U32_ARRAY("sink-pdos", snk_pdo), 1665 PROPERTY_ENTRY_U32("op-sink-microwatt", 2500000), 1666 { } 1667 }; 1668 1669 static struct fwnode_handle *fusb302_fwnode_get(struct device *dev) 1670 { 1671 struct fwnode_handle *fwnode; 1672 1673 fwnode = device_get_named_child_node(dev, "connector"); 1674 if (!fwnode) 1675 fwnode = fwnode_create_software_node(port_props, NULL); 1676 1677 return fwnode; 1678 } 1679 1680 static int fusb302_probe(struct i2c_client *client) 1681 { 1682 struct fusb302_chip *chip; 1683 struct i2c_adapter *adapter = client->adapter; 1684 struct device *dev = &client->dev; 1685 const char *name; 1686 int ret = 0; 1687 1688 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { 1689 dev_err(&client->dev, 1690 "I2C/SMBus block functionality not supported!\n"); 1691 return -ENODEV; 1692 } 1693 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); 1694 if (!chip) 1695 return -ENOMEM; 1696 1697 chip->i2c_client = client; 1698 chip->dev = &client->dev; 1699 mutex_init(&chip->lock); 1700 1701 /* 1702 * Devicetree platforms should get extcon via phandle (not yet 1703 * supported). On ACPI platforms, we get the name from a device prop. 1704 * This device prop is for kernel internal use only and is expected 1705 * to be set by the platform code which also registers the i2c client 1706 * for the fusb302. 1707 */ 1708 if (device_property_read_string(dev, "linux,extcon-name", &name) == 0) { 1709 chip->extcon = extcon_get_extcon_dev(name); 1710 if (IS_ERR(chip->extcon)) 1711 return PTR_ERR(chip->extcon); 1712 } 1713 1714 chip->vbus = devm_regulator_get(chip->dev, "vbus"); 1715 if (IS_ERR(chip->vbus)) 1716 return PTR_ERR(chip->vbus); 1717 1718 chip->wq = create_singlethread_workqueue(dev_name(chip->dev)); 1719 if (!chip->wq) 1720 return -ENOMEM; 1721 1722 spin_lock_init(&chip->irq_lock); 1723 INIT_WORK(&chip->irq_work, fusb302_irq_work); 1724 INIT_DELAYED_WORK(&chip->bc_lvl_handler, fusb302_bc_lvl_handler_work); 1725 init_tcpc_dev(&chip->tcpc_dev); 1726 fusb302_debugfs_init(chip); 1727 1728 if (client->irq) { 1729 chip->gpio_int_n_irq = client->irq; 1730 } else { 1731 ret = init_gpio(chip); 1732 if (ret < 0) 1733 goto destroy_workqueue; 1734 } 1735 1736 chip->tcpc_dev.fwnode = fusb302_fwnode_get(dev); 1737 if (IS_ERR(chip->tcpc_dev.fwnode)) { 1738 ret = PTR_ERR(chip->tcpc_dev.fwnode); 1739 goto destroy_workqueue; 1740 } 1741 1742 chip->tcpm_port = tcpm_register_port(&client->dev, &chip->tcpc_dev); 1743 if (IS_ERR(chip->tcpm_port)) { 1744 fwnode_handle_put(chip->tcpc_dev.fwnode); 1745 ret = dev_err_probe(dev, PTR_ERR(chip->tcpm_port), 1746 "cannot register tcpm port\n"); 1747 goto destroy_workqueue; 1748 } 1749 1750 ret = request_irq(chip->gpio_int_n_irq, fusb302_irq_intn, 1751 IRQF_ONESHOT | IRQF_TRIGGER_LOW, 1752 "fsc_interrupt_int_n", chip); 1753 if (ret < 0) { 1754 dev_err(dev, "cannot request IRQ for GPIO Int_N, ret=%d", ret); 1755 goto tcpm_unregister_port; 1756 } 1757 enable_irq_wake(chip->gpio_int_n_irq); 1758 i2c_set_clientdata(client, chip); 1759 1760 return ret; 1761 1762 tcpm_unregister_port: 1763 tcpm_unregister_port(chip->tcpm_port); 1764 fwnode_handle_put(chip->tcpc_dev.fwnode); 1765 destroy_workqueue: 1766 fusb302_debugfs_exit(chip); 1767 destroy_workqueue(chip->wq); 1768 1769 return ret; 1770 } 1771 1772 static void fusb302_remove(struct i2c_client *client) 1773 { 1774 struct fusb302_chip *chip = i2c_get_clientdata(client); 1775 1776 disable_irq_wake(chip->gpio_int_n_irq); 1777 free_irq(chip->gpio_int_n_irq, chip); 1778 cancel_work_sync(&chip->irq_work); 1779 cancel_delayed_work_sync(&chip->bc_lvl_handler); 1780 tcpm_unregister_port(chip->tcpm_port); 1781 fwnode_handle_put(chip->tcpc_dev.fwnode); 1782 destroy_workqueue(chip->wq); 1783 fusb302_debugfs_exit(chip); 1784 } 1785 1786 static int fusb302_pm_suspend(struct device *dev) 1787 { 1788 struct fusb302_chip *chip = dev->driver_data; 1789 unsigned long flags; 1790 1791 spin_lock_irqsave(&chip->irq_lock, flags); 1792 chip->irq_suspended = true; 1793 spin_unlock_irqrestore(&chip->irq_lock, flags); 1794 1795 /* Make sure any pending irq_work is finished before the bus suspends */ 1796 flush_work(&chip->irq_work); 1797 return 0; 1798 } 1799 1800 static int fusb302_pm_resume(struct device *dev) 1801 { 1802 struct fusb302_chip *chip = dev->driver_data; 1803 unsigned long flags; 1804 1805 spin_lock_irqsave(&chip->irq_lock, flags); 1806 if (chip->irq_while_suspended) { 1807 schedule_work(&chip->irq_work); 1808 chip->irq_while_suspended = false; 1809 } 1810 chip->irq_suspended = false; 1811 spin_unlock_irqrestore(&chip->irq_lock, flags); 1812 1813 return 0; 1814 } 1815 1816 static const struct of_device_id fusb302_dt_match[] __maybe_unused = { 1817 {.compatible = "fcs,fusb302"}, 1818 {}, 1819 }; 1820 MODULE_DEVICE_TABLE(of, fusb302_dt_match); 1821 1822 static const struct i2c_device_id fusb302_i2c_device_id[] = { 1823 {"typec_fusb302", 0}, 1824 {}, 1825 }; 1826 MODULE_DEVICE_TABLE(i2c, fusb302_i2c_device_id); 1827 1828 static const struct dev_pm_ops fusb302_pm_ops = { 1829 .suspend = fusb302_pm_suspend, 1830 .resume = fusb302_pm_resume, 1831 }; 1832 1833 static struct i2c_driver fusb302_driver = { 1834 .driver = { 1835 .name = "typec_fusb302", 1836 .pm = &fusb302_pm_ops, 1837 .of_match_table = of_match_ptr(fusb302_dt_match), 1838 }, 1839 .probe = fusb302_probe, 1840 .remove = fusb302_remove, 1841 .id_table = fusb302_i2c_device_id, 1842 }; 1843 module_i2c_driver(fusb302_driver); 1844 1845 MODULE_AUTHOR("Yueyao Zhu <yueyao.zhu@gmail.com>"); 1846 MODULE_DESCRIPTION("Fairchild FUSB302 Type-C Chip Driver"); 1847 MODULE_LICENSE("GPL"); 1848