xref: /openbmc/linux/drivers/usb/serial/mct_u232.h (revision dea54fba)
1 /*
2  * Definitions for MCT (Magic Control Technology) USB-RS232 Converter Driver
3  *
4  *   Copyright (C) 2000 Wolfgang Grandegger (wolfgang@ces.ch)
5  *
6  *   This program is free software; you can redistribute it and/or modify
7  *   it under the terms of the GNU General Public License as published by
8  *   the Free Software Foundation; either version 2 of the License, or
9  *   (at your option) any later version.
10  *
11  * This driver is for the device MCT USB-RS232 Converter (25 pin, Model No.
12  * U232-P25) from Magic Control Technology Corp. (there is also a 9 pin
13  * Model No. U232-P9). See http://www.mct.com.tw/products/product_us232.html
14  * for further information. The properties of this device are listed at the end
15  * of this file. This device was used in the Dlink DSB-S25.
16  *
17  * All of the information about the device was acquired by using SniffUSB
18  * on Windows98. The technical details of the reverse engineering are
19  * summarized at the end of this file.
20  */
21 
22 #ifndef __LINUX_USB_SERIAL_MCT_U232_H
23 #define __LINUX_USB_SERIAL_MCT_U232_H
24 
25 #define MCT_U232_VID	                0x0711	/* Vendor Id */
26 #define MCT_U232_PID	                0x0210	/* Original MCT Product Id */
27 
28 /* U232-P25, Sitecom */
29 #define MCT_U232_SITECOM_PID		0x0230	/* Sitecom Product Id */
30 
31 /* DU-H3SP USB BAY hub */
32 #define MCT_U232_DU_H3SP_PID		0x0200	/* D-Link DU-H3SP USB BAY */
33 
34 /* Belkin badge the MCT U232-P9 as the F5U109 */
35 #define MCT_U232_BELKIN_F5U109_VID	0x050d	/* Vendor Id */
36 #define MCT_U232_BELKIN_F5U109_PID	0x0109	/* Product Id */
37 
38 /*
39  * Vendor Request Interface
40  */
41 #define MCT_U232_SET_REQUEST_TYPE	0x40
42 #define MCT_U232_GET_REQUEST_TYPE	0xc0
43 
44 /* Get Modem Status Register (MSR) */
45 #define MCT_U232_GET_MODEM_STAT_REQUEST	2
46 #define MCT_U232_GET_MODEM_STAT_SIZE	1
47 
48 /* Get Line Control Register (LCR) */
49 /* ... not used by this driver */
50 #define MCT_U232_GET_LINE_CTRL_REQUEST	6
51 #define MCT_U232_GET_LINE_CTRL_SIZE	1
52 
53 /* Set Baud Rate Divisor */
54 #define MCT_U232_SET_BAUD_RATE_REQUEST	5
55 #define MCT_U232_SET_BAUD_RATE_SIZE	4
56 
57 /* Set Line Control Register (LCR) */
58 #define MCT_U232_SET_LINE_CTRL_REQUEST	7
59 #define MCT_U232_SET_LINE_CTRL_SIZE	1
60 
61 /* Set Modem Control Register (MCR) */
62 #define MCT_U232_SET_MODEM_CTRL_REQUEST	10
63 #define MCT_U232_SET_MODEM_CTRL_SIZE	1
64 
65 /*
66  * This USB device request code is not well understood.  It is transmitted by
67  * the MCT-supplied Windows driver whenever the baud rate changes.
68  */
69 #define MCT_U232_SET_UNKNOWN1_REQUEST	11  /* Unknown functionality */
70 #define MCT_U232_SET_UNKNOWN1_SIZE	1
71 
72 /*
73  * This USB device request code appears to control whether CTS is required
74  * during transmission.
75  *
76  * Sending a zero byte allows data transmission to a device which is not
77  * asserting CTS.  Sending a '1' byte will cause transmission to be deferred
78  * until the device asserts CTS.
79  */
80 #define MCT_U232_SET_CTS_REQUEST	12
81 #define MCT_U232_SET_CTS_SIZE		1
82 
83 #define MCT_U232_MAX_SIZE		4	/* of MCT_XXX_SIZE */
84 
85 /*
86  * Baud rate (divisor)
87  * Actually, there are two of them, MCT website calls them "Philips solution"
88  * and "Intel solution". They are the regular MCT and "Sitecom" for us.
89  * This is pointless to document in the header, see the code for the bits.
90  */
91 static int mct_u232_calculate_baud_rate(struct usb_serial *serial,
92 					speed_t value, speed_t *result);
93 
94 /*
95  * Line Control Register (LCR)
96  */
97 #define MCT_U232_SET_BREAK              0x40
98 
99 #define MCT_U232_PARITY_SPACE		0x38
100 #define MCT_U232_PARITY_MARK		0x28
101 #define MCT_U232_PARITY_EVEN		0x18
102 #define MCT_U232_PARITY_ODD		0x08
103 #define MCT_U232_PARITY_NONE		0x00
104 
105 #define MCT_U232_DATA_BITS_5            0x00
106 #define MCT_U232_DATA_BITS_6            0x01
107 #define MCT_U232_DATA_BITS_7            0x02
108 #define MCT_U232_DATA_BITS_8            0x03
109 
110 #define MCT_U232_STOP_BITS_2            0x04
111 #define MCT_U232_STOP_BITS_1            0x00
112 
113 /*
114  * Modem Control Register (MCR)
115  */
116 #define MCT_U232_MCR_NONE               0x8     /* Deactivate DTR and RTS */
117 #define MCT_U232_MCR_RTS                0xa     /* Activate RTS */
118 #define MCT_U232_MCR_DTR                0x9     /* Activate DTR */
119 
120 /*
121  * Modem Status Register (MSR)
122  */
123 #define MCT_U232_MSR_INDEX              0x0     /* data[index] */
124 #define MCT_U232_MSR_CD                 0x80    /* Current CD */
125 #define MCT_U232_MSR_RI                 0x40    /* Current RI */
126 #define MCT_U232_MSR_DSR                0x20    /* Current DSR */
127 #define MCT_U232_MSR_CTS                0x10    /* Current CTS */
128 #define MCT_U232_MSR_DCD                0x08    /* Delta CD */
129 #define MCT_U232_MSR_DRI                0x04    /* Delta RI */
130 #define MCT_U232_MSR_DDSR               0x02    /* Delta DSR */
131 #define MCT_U232_MSR_DCTS               0x01    /* Delta CTS */
132 
133 /*
134  * Line Status Register (LSR)
135  */
136 #define MCT_U232_LSR_INDEX	1	/* data[index] */
137 #define MCT_U232_LSR_ERR	0x80	/* OE | PE | FE | BI */
138 #define MCT_U232_LSR_TEMT	0x40	/* transmit register empty */
139 #define MCT_U232_LSR_THRE	0x20	/* transmit holding register empty */
140 #define MCT_U232_LSR_BI		0x10	/* break indicator */
141 #define MCT_U232_LSR_FE		0x08	/* framing error */
142 #define MCT_U232_LSR_OE		0x02	/* overrun error */
143 #define MCT_U232_LSR_PE		0x04	/* parity error */
144 #define MCT_U232_LSR_OE		0x02	/* overrun error */
145 #define MCT_U232_LSR_DR		0x01	/* receive data ready */
146 
147 
148 /* -----------------------------------------------------------------------------
149  * Technical Specification reverse engineered with SniffUSB on Windows98
150  * =====================================================================
151  *
152  *  The technical details of the device have been acquired be using "SniffUSB"
153  *  and the vendor-supplied device driver (version 2.3A) under Windows98. To
154  *  identify the USB vendor-specific requests and to assign them to terminal
155  *  settings (flow control, baud rate, etc.) the program "SerialSettings" from
156  *  William G. Greathouse has been proven to be very useful. I also used the
157  *  Win98 "HyperTerminal" and "usb-robot" on Linux for testing. The results and
158  *  observations are summarized below:
159  *
160  *  The USB requests seem to be directly mapped to the registers of a 8250,
161  *  16450 or 16550 UART. The FreeBSD handbook (appendix F.4 "Input/Output
162  *  devices") contains a comprehensive description of UARTs and its registers.
163  *  The bit descriptions are actually taken from there.
164  *
165  *
166  * Baud rate (divisor)
167  * -------------------
168  *
169  *   BmRequestType:  0x40 (0100 0000B)
170  *   bRequest:       0x05
171  *   wValue:         0x0000
172  *   wIndex:         0x0000
173  *   wLength:        0x0004
174  *   Data:           divisor = 115200 / baud_rate
175  *
176  *   SniffUSB observations (Nov 2003): Contrary to the 'wLength' value of 4
177  *   shown above, observations with a Belkin F5U109 adapter, using the
178  *   MCT-supplied Windows98 driver (U2SPORT.VXD, "File version: 1.21P.0104 for
179  *   Win98/Me"), show this request has a length of 1 byte, presumably because
180  *   of the fact that the Belkin adapter and the 'Sitecom U232-P25' adapter
181  *   use a baud-rate code instead of a conventional RS-232 baud rate divisor.
182  *   The current source code for this driver does not reflect this fact, but
183  *   the driver works fine with this adapter/driver combination nonetheless.
184  *
185  *
186  * Line Control Register (LCR)
187  * ---------------------------
188  *
189  *  BmRequestType:  0x40 (0100 0000B)    0xc0 (1100 0000B)
190  *  bRequest:       0x07                 0x06
191  *  wValue:         0x0000
192  *  wIndex:         0x0000
193  *  wLength:        0x0001
194  *  Data:           LCR (see below)
195  *
196  *  Bit 7: Divisor Latch Access Bit (DLAB). When set, access to the data
197  *	   transmit/receive register (THR/RBR) and the Interrupt Enable Register
198  *	   (IER) is disabled. Any access to these ports is now redirected to the
199  *	   Divisor Latch Registers. Setting this bit, loading the Divisor
200  *	   Registers, and clearing DLAB should be done with interrupts disabled.
201  *  Bit 6: Set Break. When set to "1", the transmitter begins to transmit
202  *	   continuous Spacing until this bit is set to "0". This overrides any
203  *	   bits of characters that are being transmitted.
204  *  Bit 5: Stick Parity. When parity is enabled, setting this bit causes parity
205  *	   to always be "1" or "0", based on the value of Bit 4.
206  *  Bit 4: Even Parity Select (EPS). When parity is enabled and Bit 5 is "0",
207  *	   setting this bit causes even parity to be transmitted and expected.
208  *	   Otherwise, odd parity is used.
209  *  Bit 3: Parity Enable (PEN). When set to "1", a parity bit is inserted
210  *	   between the last bit of the data and the Stop Bit. The UART will also
211  *	   expect parity to be present in the received data.
212  *  Bit 2: Number of Stop Bits (STB). If set to "1" and using 5-bit data words,
213  *	   1.5 Stop Bits are transmitted and expected in each data word. For
214  *	   6, 7 and 8-bit data words, 2 Stop Bits are transmitted and expected.
215  *	   When this bit is set to "0", one Stop Bit is used on each data word.
216  *  Bit 1: Word Length Select Bit #1 (WLSB1)
217  *  Bit 0: Word Length Select Bit #0 (WLSB0)
218  *	   Together these bits specify the number of bits in each data word.
219  *	     1 0  Word Length
220  *	     0 0  5 Data Bits
221  *	     0 1  6 Data Bits
222  *	     1 0  7 Data Bits
223  *	     1 1  8 Data Bits
224  *
225  *  SniffUSB observations: Bit 7 seems not to be used. There seem to be two bugs
226  *  in the Win98 driver: the break does not work (bit 6 is not asserted) and the
227  *  stick parity bit is not cleared when set once. The LCR can also be read
228  *  back with USB request 6 but this has never been observed with SniffUSB.
229  *
230  *
231  * Modem Control Register (MCR)
232  * ----------------------------
233  *
234  *  BmRequestType:  0x40  (0100 0000B)
235  *  bRequest:       0x0a
236  *  wValue:         0x0000
237  *  wIndex:         0x0000
238  *  wLength:        0x0001
239  *  Data:           MCR (Bit 4..7, see below)
240  *
241  *  Bit 7: Reserved, always 0.
242  *  Bit 6: Reserved, always 0.
243  *  Bit 5: Reserved, always 0.
244  *  Bit 4: Loop-Back Enable. When set to "1", the UART transmitter and receiver
245  *	   are internally connected together to allow diagnostic operations. In
246  *	   addition, the UART modem control outputs are connected to the UART
247  *	   modem control inputs. CTS is connected to RTS, DTR is connected to
248  *	   DSR, OUT1 is connected to RI, and OUT 2 is connected to DCD.
249  *  Bit 3: OUT 2. An auxiliary output that the host processor may set high or
250  *	   low. In the IBM PC serial adapter (and most clones), OUT 2 is used
251  *	   to tri-state (disable) the interrupt signal from the
252  *	   8250/16450/16550 UART.
253  *  Bit 2: OUT 1. An auxiliary output that the host processor may set high or
254  *	   low. This output is not used on the IBM PC serial adapter.
255  *  Bit 1: Request to Send (RTS). When set to "1", the output of the UART -RTS
256  *	   line is Low (Active).
257  *  Bit 0: Data Terminal Ready (DTR). When set to "1", the output of the UART
258  *	   -DTR line is Low (Active).
259  *
260  *  SniffUSB observations: Bit 2 and 4 seem not to be used but bit 3 has been
261  *  seen _always_ set.
262  *
263  *
264  * Modem Status Register (MSR)
265  * ---------------------------
266  *
267  *  BmRequestType:  0xc0  (1100 0000B)
268  *  bRequest:       0x02
269  *  wValue:         0x0000
270  *  wIndex:         0x0000
271  *  wLength:        0x0001
272  *  Data:           MSR (see below)
273  *
274  *  Bit 7: Data Carrier Detect (CD). Reflects the state of the DCD line on the
275  *	   UART.
276  *  Bit 6: Ring Indicator (RI). Reflects the state of the RI line on the UART.
277  *  Bit 5: Data Set Ready (DSR). Reflects the state of the DSR line on the UART.
278  *  Bit 4: Clear To Send (CTS). Reflects the state of the CTS line on the UART.
279  *  Bit 3: Delta Data Carrier Detect (DDCD). Set to "1" if the -DCD line has
280  *	   changed state one more more times since the last time the MSR was
281  *	   read by the host.
282  *  Bit 2: Trailing Edge Ring Indicator (TERI). Set to "1" if the -RI line has
283  *	   had a low to high transition since the last time the MSR was read by
284  *	   the host.
285  *  Bit 1: Delta Data Set Ready (DDSR). Set to "1" if the -DSR line has changed
286  *	   state one more more times since the last time the MSR was read by the
287  *	   host.
288  *  Bit 0: Delta Clear To Send (DCTS). Set to "1" if the -CTS line has changed
289  *	   state one more times since the last time the MSR was read by the
290  *	   host.
291  *
292  *  SniffUSB observations: the MSR is also returned as first byte on the
293  *  interrupt-in endpoint 0x83 to signal changes of modem status lines. The USB
294  *  request to read MSR cannot be applied during normal device operation.
295  *
296  *
297  * Line Status Register (LSR)
298  * --------------------------
299  *
300  *  Bit 7   Error in Receiver FIFO. On the 8250/16450 UART, this bit is zero.
301  *	    This bit is set to "1" when any of the bytes in the FIFO have one
302  *	    or more of the following error conditions: PE, FE, or BI.
303  *  Bit 6   Transmitter Empty (TEMT). When set to "1", there are no words
304  *	    remaining in the transmit FIFO or the transmit shift register. The
305  *	    transmitter is completely idle.
306  *  Bit 5   Transmitter Holding Register Empty (THRE). When set to "1", the
307  *	    FIFO (or holding register) now has room for at least one additional
308  *	    word to transmit. The transmitter may still be transmitting when
309  *	    this bit is set to "1".
310  *  Bit 4   Break Interrupt (BI). The receiver has detected a Break signal.
311  *  Bit 3   Framing Error (FE). A Start Bit was detected but the Stop Bit did
312  *	    not appear at the expected time. The received word is probably
313  *	    garbled.
314  *  Bit 2   Parity Error (PE). The parity bit was incorrect for the word
315  *	    received.
316  *  Bit 1   Overrun Error (OE). A new word was received and there was no room
317  *	    in the receive buffer. The newly-arrived word in the shift register
318  *	    is discarded. On 8250/16450 UARTs, the word in the holding register
319  *	    is discarded and the newly- arrived word is put in the holding
320  *	    register.
321  *  Bit 0   Data Ready (DR). One or more words are in the receive FIFO that the
322  *	    host may read. A word must be completely received and moved from
323  *	    the shift register into the FIFO (or holding register for
324  *	    8250/16450 designs) before this bit is set.
325  *
326  *  SniffUSB observations: the LSR is returned as second byte on the
327  *  interrupt-in endpoint 0x83 to signal error conditions. Such errors have
328  *  been seen with minicom/zmodem transfers (CRC errors).
329  *
330  *
331  * Unknown #1
332  * -------------------
333  *
334  *   BmRequestType:  0x40 (0100 0000B)
335  *   bRequest:       0x0b
336  *   wValue:         0x0000
337  *   wIndex:         0x0000
338  *   wLength:        0x0001
339  *   Data:           0x00
340  *
341  *   SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver
342  *   (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request
343  *   occurs immediately after a "Baud rate (divisor)" message.  It was not
344  *   observed at any other time.  It is unclear what purpose this message
345  *   serves.
346  *
347  *
348  * Unknown #2
349  * -------------------
350  *
351  *   BmRequestType:  0x40 (0100 0000B)
352  *   bRequest:       0x0c
353  *   wValue:         0x0000
354  *   wIndex:         0x0000
355  *   wLength:        0x0001
356  *   Data:           0x00
357  *
358  *   SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver
359  *   (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request
360  *   occurs immediately after the 'Unknown #1' message (see above).  It was
361  *   not observed at any other time.  It is unclear what other purpose (if
362  *   any) this message might serve, but without it, the USB/RS-232 adapter
363  *   will not write to RS-232 devices which do not assert the 'CTS' signal.
364  *
365  *
366  * Flow control
367  * ------------
368  *
369  *  SniffUSB observations: no flow control specific requests have been realized
370  *  apart from DTR/RTS settings. Both signals are dropped for no flow control
371  *  but asserted for hardware or software flow control.
372  *
373  *
374  * Endpoint usage
375  * --------------
376  *
377  *  SniffUSB observations: the bulk-out endpoint 0x1 and interrupt-in endpoint
378  *  0x81 is used to transmit and receive characters. The second interrupt-in
379  *  endpoint 0x83 signals exceptional conditions like modem line changes and
380  *  errors. The first byte returned is the MSR and the second byte the LSR.
381  *
382  *
383  * Other observations
384  * ------------------
385  *
386  *  Queued bulk transfers like used in visor.c did not work.
387  *
388  *
389  * Properties of the USB device used (as found in /var/log/messages)
390  * -----------------------------------------------------------------
391  *
392  *  Manufacturer: MCT Corporation.
393  *  Product: USB-232 Interfact Controller
394  *  SerialNumber: U2S22050
395  *
396  *    Length              = 18
397  *    DescriptorType      = 01
398  *    USB version         = 1.00
399  *    Vendor:Product      = 0711:0210
400  *    MaxPacketSize0      = 8
401  *    NumConfigurations   = 1
402  *    Device version      = 1.02
403  *    Device Class:SubClass:Protocol = 00:00:00
404  *      Per-interface classes
405  *  Configuration:
406  *    bLength             =    9
407  *    bDescriptorType     =   02
408  *    wTotalLength        = 0027
409  *    bNumInterfaces      =   01
410  *    bConfigurationValue =   01
411  *    iConfiguration      =   00
412  *    bmAttributes        =   c0
413  *    MaxPower            =  100mA
414  *
415  *    Interface: 0
416  *    Alternate Setting:  0
417  *      bLength             =    9
418  *      bDescriptorType     =   04
419  *      bInterfaceNumber    =   00
420  *      bAlternateSetting   =   00
421  *      bNumEndpoints       =   03
422  *      bInterface Class:SubClass:Protocol =   00:00:00
423  *      iInterface          =   00
424  *      Endpoint:
425  *	  bLength             =    7
426  *	  bDescriptorType     =   05
427  *	  bEndpointAddress    =   81 (in)
428  *	  bmAttributes        =   03 (Interrupt)
429  *	  wMaxPacketSize      = 0040
430  *	  bInterval           =   02
431  *      Endpoint:
432  *	  bLength             =    7
433  *	  bDescriptorType     =   05
434  *	  bEndpointAddress    =   01 (out)
435  *	  bmAttributes        =   02 (Bulk)
436  *	  wMaxPacketSize      = 0040
437  *	  bInterval           =   00
438  *      Endpoint:
439  *	  bLength             =    7
440  *	  bDescriptorType     =   05
441  *	  bEndpointAddress    =   83 (in)
442  *	  bmAttributes        =   03 (Interrupt)
443  *	  wMaxPacketSize      = 0002
444  *	  bInterval           =   02
445  *
446  *
447  * Hardware details (added by Martin Hamilton, 2001/12/06)
448  * -----------------------------------------------------------------
449  *
450  * This info was gleaned from opening a Belkin F5U109 DB9 USB serial
451  * adaptor, which turns out to simply be a re-badged U232-P9.  We
452  * know this because there is a sticky label on the circuit board
453  * which says "U232-P9" ;-)
454  *
455  * The circuit board inside the adaptor contains a Philips PDIUSBD12
456  * USB endpoint chip and a Philips P87C52UBAA microcontroller with
457  * embedded UART.  Exhaustive documentation for these is available at:
458  *
459  *   http://www.semiconductors.philips.com/pip/p87c52ubaa
460  *   http://www.nxp.com/acrobat_download/various/PDIUSBD12_PROGRAMMING_GUIDE.pdf
461  *
462  * Thanks to Julian Highfield for the pointer to the Philips database.
463  *
464  */
465 
466 #endif /* __LINUX_USB_SERIAL_MCT_U232_H */
467 
468