1 // SPDX-License-Identifier: GPL-2.0+ 2 /***************************************************************************** 3 * 4 * Copyright (C) 1997-2002 Inside Out Networks, Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * 12 * Feb-16-2001 DMI Added I2C structure definitions 13 * May-29-2002 gkh Ported to Linux 14 * 15 * 16 ******************************************************************************/ 17 18 #ifndef _IO_TI_H_ 19 #define _IO_TI_H_ 20 21 /* Address Space */ 22 #define DTK_ADDR_SPACE_XDATA 0x03 /* Addr is placed in XDATA space */ 23 #define DTK_ADDR_SPACE_I2C_TYPE_II 0x82 /* Addr is placed in I2C area */ 24 #define DTK_ADDR_SPACE_I2C_TYPE_III 0x83 /* Addr is placed in I2C area */ 25 26 /* UART Defines */ 27 #define UMPMEM_BASE_UART1 0xFFA0 /* UMP UART1 base address */ 28 #define UMPMEM_BASE_UART2 0xFFB0 /* UMP UART2 base address */ 29 #define UMPMEM_OFFS_UART_LSR 0x05 /* UMP UART LSR register offset */ 30 31 /* Bits per character */ 32 #define UMP_UART_CHAR5BITS 0x00 33 #define UMP_UART_CHAR6BITS 0x01 34 #define UMP_UART_CHAR7BITS 0x02 35 #define UMP_UART_CHAR8BITS 0x03 36 37 /* Parity */ 38 #define UMP_UART_NOPARITY 0x00 39 #define UMP_UART_ODDPARITY 0x01 40 #define UMP_UART_EVENPARITY 0x02 41 #define UMP_UART_MARKPARITY 0x03 42 #define UMP_UART_SPACEPARITY 0x04 43 44 /* Stop bits */ 45 #define UMP_UART_STOPBIT1 0x00 46 #define UMP_UART_STOPBIT15 0x01 47 #define UMP_UART_STOPBIT2 0x02 48 49 /* Line status register masks */ 50 #define UMP_UART_LSR_OV_MASK 0x01 51 #define UMP_UART_LSR_PE_MASK 0x02 52 #define UMP_UART_LSR_FE_MASK 0x04 53 #define UMP_UART_LSR_BR_MASK 0x08 54 #define UMP_UART_LSR_ER_MASK 0x0F 55 #define UMP_UART_LSR_RX_MASK 0x10 56 #define UMP_UART_LSR_TX_MASK 0x20 57 58 #define UMP_UART_LSR_DATA_MASK (LSR_PAR_ERR | LSR_FRM_ERR | LSR_BREAK) 59 60 /* Port Settings Constants) */ 61 #define UMP_MASK_UART_FLAGS_RTS_FLOW 0x0001 62 #define UMP_MASK_UART_FLAGS_RTS_DISABLE 0x0002 63 #define UMP_MASK_UART_FLAGS_PARITY 0x0008 64 #define UMP_MASK_UART_FLAGS_OUT_X_DSR_FLOW 0x0010 65 #define UMP_MASK_UART_FLAGS_OUT_X_CTS_FLOW 0x0020 66 #define UMP_MASK_UART_FLAGS_OUT_X 0x0040 67 #define UMP_MASK_UART_FLAGS_OUT_XA 0x0080 68 #define UMP_MASK_UART_FLAGS_IN_X 0x0100 69 #define UMP_MASK_UART_FLAGS_DTR_FLOW 0x0800 70 #define UMP_MASK_UART_FLAGS_DTR_DISABLE 0x1000 71 #define UMP_MASK_UART_FLAGS_RECEIVE_MS_INT 0x2000 72 #define UMP_MASK_UART_FLAGS_AUTO_START_ON_ERR 0x4000 73 74 #define UMP_DMA_MODE_CONTINOUS 0x01 75 #define UMP_PIPE_TRANS_TIMEOUT_ENA 0x80 76 #define UMP_PIPE_TRANSFER_MODE_MASK 0x03 77 #define UMP_PIPE_TRANS_TIMEOUT_MASK 0x7C 78 79 /* Purge port Direction Mask Bits */ 80 #define UMP_PORT_DIR_OUT 0x01 81 #define UMP_PORT_DIR_IN 0x02 82 83 /* Address of Port 0 */ 84 #define UMPM_UART1_PORT 0x03 85 86 /* Commands */ 87 #define UMPC_SET_CONFIG 0x05 88 #define UMPC_OPEN_PORT 0x06 89 #define UMPC_CLOSE_PORT 0x07 90 #define UMPC_START_PORT 0x08 91 #define UMPC_STOP_PORT 0x09 92 #define UMPC_TEST_PORT 0x0A 93 #define UMPC_PURGE_PORT 0x0B 94 95 /* Force the Firmware to complete the current Read */ 96 #define UMPC_COMPLETE_READ 0x80 97 /* Force UMP back into BOOT Mode */ 98 #define UMPC_HARDWARE_RESET 0x81 99 /* 100 * Copy current download image to type 0xf2 record in 16k I2C 101 * firmware will change 0xff record to type 2 record when complete 102 */ 103 #define UMPC_COPY_DNLD_TO_I2C 0x82 104 105 /* 106 * Special function register commands 107 * wIndex is register address 108 * wValue is MSB/LSB mask/data 109 */ 110 #define UMPC_WRITE_SFR 0x83 /* Write SFR Register */ 111 112 /* wIndex is register address */ 113 #define UMPC_READ_SFR 0x84 /* Read SRF Register */ 114 115 /* Set or Clear DTR (wValue bit 0 Set/Clear) wIndex ModuleID (port) */ 116 #define UMPC_SET_CLR_DTR 0x85 117 118 /* Set or Clear RTS (wValue bit 0 Set/Clear) wIndex ModuleID (port) */ 119 #define UMPC_SET_CLR_RTS 0x86 120 121 /* Set or Clear LOOPBACK (wValue bit 0 Set/Clear) wIndex ModuleID (port) */ 122 #define UMPC_SET_CLR_LOOPBACK 0x87 123 124 /* Set or Clear BREAK (wValue bit 0 Set/Clear) wIndex ModuleID (port) */ 125 #define UMPC_SET_CLR_BREAK 0x88 126 127 /* Read MSR wIndex ModuleID (port) */ 128 #define UMPC_READ_MSR 0x89 129 130 /* Toolkit commands */ 131 /* Read-write group */ 132 #define UMPC_MEMORY_READ 0x92 133 #define UMPC_MEMORY_WRITE 0x93 134 135 /* 136 * UMP DMA Definitions 137 */ 138 #define UMPD_OEDB1_ADDRESS 0xFF08 139 #define UMPD_OEDB2_ADDRESS 0xFF10 140 141 struct out_endpoint_desc_block { 142 __u8 Configuration; 143 __u8 XBufAddr; 144 __u8 XByteCount; 145 __u8 Unused1; 146 __u8 Unused2; 147 __u8 YBufAddr; 148 __u8 YByteCount; 149 __u8 BufferSize; 150 } __attribute__((packed)); 151 152 153 /* 154 * TYPE DEFINITIONS 155 * Structures for Firmware commands 156 */ 157 /* UART settings */ 158 struct ump_uart_config { 159 __u16 wBaudRate; /* Baud rate */ 160 __u16 wFlags; /* Bitmap mask of flags */ 161 __u8 bDataBits; /* 5..8 - data bits per character */ 162 __u8 bParity; /* Parity settings */ 163 __u8 bStopBits; /* Stop bits settings */ 164 char cXon; /* XON character */ 165 char cXoff; /* XOFF character */ 166 __u8 bUartMode; /* Will be updated when a user */ 167 /* interface is defined */ 168 } __attribute__((packed)); 169 170 171 /* 172 * TYPE DEFINITIONS 173 * Structures for USB interrupts 174 */ 175 /* Interrupt packet structure */ 176 struct ump_interrupt { 177 __u8 bICode; /* Interrupt code (interrupt num) */ 178 __u8 bIInfo; /* Interrupt information */ 179 } __attribute__((packed)); 180 181 182 #define TIUMP_GET_PORT_FROM_CODE(c) (((c) >> 4) - 3) 183 #define TIUMP_GET_FUNC_FROM_CODE(c) ((c) & 0x0f) 184 #define TIUMP_INTERRUPT_CODE_LSR 0x03 185 #define TIUMP_INTERRUPT_CODE_MSR 0x04 186 187 #endif 188