1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * F81532/F81534 USB to Serial Ports Bridge 4 * 5 * F81532 => 2 Serial Ports 6 * F81534 => 4 Serial Ports 7 * 8 * Copyright (C) 2016 Feature Integration Technology Inc., (Fintek) 9 * Copyright (C) 2016 Tom Tsai (Tom_Tsai@fintek.com.tw) 10 * Copyright (C) 2016 Peter Hong (Peter_Hong@fintek.com.tw) 11 * 12 * The F81532/F81534 had 1 control endpoint for setting, 1 endpoint bulk-out 13 * for all serial port TX and 1 endpoint bulk-in for all serial port read in 14 * (Read Data/MSR/LSR). 15 * 16 * Write URB is fixed with 512bytes, per serial port used 128Bytes. 17 * It can be described by f81534_prepare_write_buffer() 18 * 19 * Read URB is 512Bytes max, per serial port used 128Bytes. 20 * It can be described by f81534_process_read_urb() and maybe received with 21 * 128x1,2,3,4 bytes. 22 * 23 */ 24 #include <linux/slab.h> 25 #include <linux/tty.h> 26 #include <linux/tty_flip.h> 27 #include <linux/usb.h> 28 #include <linux/usb/serial.h> 29 #include <linux/serial_reg.h> 30 #include <linux/module.h> 31 #include <linux/uaccess.h> 32 33 /* Serial Port register Address */ 34 #define F81534_UART_BASE_ADDRESS 0x1200 35 #define F81534_UART_OFFSET 0x10 36 #define F81534_DIVISOR_LSB_REG (0x00 + F81534_UART_BASE_ADDRESS) 37 #define F81534_DIVISOR_MSB_REG (0x01 + F81534_UART_BASE_ADDRESS) 38 #define F81534_INTERRUPT_ENABLE_REG (0x01 + F81534_UART_BASE_ADDRESS) 39 #define F81534_FIFO_CONTROL_REG (0x02 + F81534_UART_BASE_ADDRESS) 40 #define F81534_LINE_CONTROL_REG (0x03 + F81534_UART_BASE_ADDRESS) 41 #define F81534_MODEM_CONTROL_REG (0x04 + F81534_UART_BASE_ADDRESS) 42 #define F81534_LINE_STATUS_REG (0x05 + F81534_UART_BASE_ADDRESS) 43 #define F81534_MODEM_STATUS_REG (0x06 + F81534_UART_BASE_ADDRESS) 44 #define F81534_CLOCK_REG (0x08 + F81534_UART_BASE_ADDRESS) 45 #define F81534_CONFIG1_REG (0x09 + F81534_UART_BASE_ADDRESS) 46 47 #define F81534_DEF_CONF_ADDRESS_START 0x3000 48 #define F81534_DEF_CONF_SIZE 8 49 50 #define F81534_CUSTOM_ADDRESS_START 0x2f00 51 #define F81534_CUSTOM_DATA_SIZE 0x10 52 #define F81534_CUSTOM_NO_CUSTOM_DATA 0xff 53 #define F81534_CUSTOM_VALID_TOKEN 0xf0 54 #define F81534_CONF_OFFSET 1 55 #define F81534_CONF_GPIO_OFFSET 4 56 57 #define F81534_MAX_DATA_BLOCK 64 58 #define F81534_MAX_BUS_RETRY 20 59 60 /* Default URB timeout for USB operations */ 61 #define F81534_USB_MAX_RETRY 10 62 #define F81534_USB_TIMEOUT 2000 63 #define F81534_SET_GET_REGISTER 0xA0 64 65 #define F81534_NUM_PORT 4 66 #define F81534_UNUSED_PORT 0xff 67 #define F81534_WRITE_BUFFER_SIZE 512 68 69 #define DRIVER_DESC "Fintek F81532/F81534" 70 #define FINTEK_VENDOR_ID_1 0x1934 71 #define FINTEK_VENDOR_ID_2 0x2C42 72 #define FINTEK_DEVICE_ID 0x1202 73 #define F81534_MAX_TX_SIZE 124 74 #define F81534_MAX_RX_SIZE 124 75 #define F81534_RECEIVE_BLOCK_SIZE 128 76 #define F81534_MAX_RECEIVE_BLOCK_SIZE 512 77 78 #define F81534_TOKEN_RECEIVE 0x01 79 #define F81534_TOKEN_WRITE 0x02 80 #define F81534_TOKEN_TX_EMPTY 0x03 81 #define F81534_TOKEN_MSR_CHANGE 0x04 82 83 /* 84 * We used interal SPI bus to access FLASH section. We must wait the SPI bus to 85 * idle if we performed any command. 86 * 87 * SPI Bus status register: F81534_BUS_REG_STATUS 88 * Bit 0/1 : BUSY 89 * Bit 2 : IDLE 90 */ 91 #define F81534_BUS_BUSY (BIT(0) | BIT(1)) 92 #define F81534_BUS_IDLE BIT(2) 93 #define F81534_BUS_READ_DATA 0x1004 94 #define F81534_BUS_REG_STATUS 0x1003 95 #define F81534_BUS_REG_START 0x1002 96 #define F81534_BUS_REG_END 0x1001 97 98 #define F81534_CMD_READ 0x03 99 100 #define F81534_DEFAULT_BAUD_RATE 9600 101 102 #define F81534_PORT_CONF_RS232 0 103 #define F81534_PORT_CONF_RS485 BIT(0) 104 #define F81534_PORT_CONF_RS485_INVERT (BIT(0) | BIT(1)) 105 #define F81534_PORT_CONF_MODE_MASK GENMASK(1, 0) 106 #define F81534_PORT_CONF_DISABLE_PORT BIT(3) 107 #define F81534_PORT_CONF_NOT_EXIST_PORT BIT(7) 108 #define F81534_PORT_UNAVAILABLE \ 109 (F81534_PORT_CONF_DISABLE_PORT | F81534_PORT_CONF_NOT_EXIST_PORT) 110 111 112 #define F81534_1X_RXTRIGGER 0xc3 113 #define F81534_8X_RXTRIGGER 0xcf 114 115 /* 116 * F81532/534 Clock registers (offset +08h) 117 * 118 * Bit0: UART Enable (always on) 119 * Bit2-1: Clock source selector 120 * 00: 1.846MHz. 121 * 01: 18.46MHz. 122 * 10: 24MHz. 123 * 11: 14.77MHz. 124 * Bit4: Auto direction(RTS) control (RTS pin Low when TX) 125 * Bit5: Invert direction(RTS) when Bit4 enabled (RTS pin high when TX) 126 */ 127 128 #define F81534_UART_EN BIT(0) 129 #define F81534_CLK_1_846_MHZ 0 130 #define F81534_CLK_18_46_MHZ BIT(1) 131 #define F81534_CLK_24_MHZ BIT(2) 132 #define F81534_CLK_14_77_MHZ (BIT(1) | BIT(2)) 133 #define F81534_CLK_MASK GENMASK(2, 1) 134 #define F81534_CLK_TX_DELAY_1BIT BIT(3) 135 #define F81534_CLK_RS485_MODE BIT(4) 136 #define F81534_CLK_RS485_INVERT BIT(5) 137 138 static const struct usb_device_id f81534_id_table[] = { 139 { USB_DEVICE(FINTEK_VENDOR_ID_1, FINTEK_DEVICE_ID) }, 140 { USB_DEVICE(FINTEK_VENDOR_ID_2, FINTEK_DEVICE_ID) }, 141 {} /* Terminating entry */ 142 }; 143 144 #define F81534_TX_EMPTY_BIT 0 145 146 struct f81534_serial_private { 147 u8 conf_data[F81534_DEF_CONF_SIZE]; 148 int tty_idx[F81534_NUM_PORT]; 149 u8 setting_idx; 150 int opened_port; 151 struct mutex urb_mutex; 152 }; 153 154 struct f81534_port_private { 155 struct mutex mcr_mutex; 156 struct mutex lcr_mutex; 157 struct work_struct lsr_work; 158 struct usb_serial_port *port; 159 unsigned long tx_empty; 160 spinlock_t msr_lock; 161 u32 baud_base; 162 u8 shadow_mcr; 163 u8 shadow_lcr; 164 u8 shadow_msr; 165 u8 shadow_clk; 166 u8 phy_num; 167 }; 168 169 struct f81534_pin_data { 170 const u16 reg_addr; 171 const u8 reg_mask; 172 }; 173 174 struct f81534_port_out_pin { 175 struct f81534_pin_data pin[3]; 176 }; 177 178 /* Pin output value for M2/M1/M0(SD) */ 179 static const struct f81534_port_out_pin f81534_port_out_pins[] = { 180 { { { 0x2ae8, BIT(7) }, { 0x2a90, BIT(5) }, { 0x2a90, BIT(4) } } }, 181 { { { 0x2ae8, BIT(6) }, { 0x2ae8, BIT(0) }, { 0x2ae8, BIT(3) } } }, 182 { { { 0x2a90, BIT(0) }, { 0x2ae8, BIT(2) }, { 0x2a80, BIT(6) } } }, 183 { { { 0x2a90, BIT(3) }, { 0x2a90, BIT(2) }, { 0x2a90, BIT(1) } } }, 184 }; 185 186 static u32 const baudrate_table[] = { 115200, 921600, 1152000, 1500000 }; 187 static u8 const clock_table[] = { F81534_CLK_1_846_MHZ, F81534_CLK_14_77_MHZ, 188 F81534_CLK_18_46_MHZ, F81534_CLK_24_MHZ }; 189 190 static int f81534_logic_to_phy_port(struct usb_serial *serial, 191 struct usb_serial_port *port) 192 { 193 struct f81534_serial_private *serial_priv = 194 usb_get_serial_data(port->serial); 195 int count = 0; 196 int i; 197 198 for (i = 0; i < F81534_NUM_PORT; ++i) { 199 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE) 200 continue; 201 202 if (port->port_number == count) 203 return i; 204 205 ++count; 206 } 207 208 return -ENODEV; 209 } 210 211 static int f81534_set_register(struct usb_serial *serial, u16 reg, u8 data) 212 { 213 struct usb_interface *interface = serial->interface; 214 struct usb_device *dev = serial->dev; 215 size_t count = F81534_USB_MAX_RETRY; 216 int status; 217 u8 *tmp; 218 219 tmp = kmalloc(sizeof(u8), GFP_KERNEL); 220 if (!tmp) 221 return -ENOMEM; 222 223 *tmp = data; 224 225 /* 226 * Our device maybe not reply when heavily loading, We'll retry for 227 * F81534_USB_MAX_RETRY times. 228 */ 229 while (count--) { 230 status = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), 231 F81534_SET_GET_REGISTER, 232 USB_TYPE_VENDOR | USB_DIR_OUT, 233 reg, 0, tmp, sizeof(u8), 234 F81534_USB_TIMEOUT); 235 if (status > 0) { 236 status = 0; 237 break; 238 } else if (status == 0) { 239 status = -EIO; 240 } 241 } 242 243 if (status < 0) { 244 dev_err(&interface->dev, "%s: reg: %x data: %x failed: %d\n", 245 __func__, reg, data, status); 246 } 247 248 kfree(tmp); 249 return status; 250 } 251 252 static int f81534_get_register(struct usb_serial *serial, u16 reg, u8 *data) 253 { 254 struct usb_interface *interface = serial->interface; 255 struct usb_device *dev = serial->dev; 256 size_t count = F81534_USB_MAX_RETRY; 257 int status; 258 u8 *tmp; 259 260 tmp = kmalloc(sizeof(u8), GFP_KERNEL); 261 if (!tmp) 262 return -ENOMEM; 263 264 /* 265 * Our device maybe not reply when heavily loading, We'll retry for 266 * F81534_USB_MAX_RETRY times. 267 */ 268 while (count--) { 269 status = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), 270 F81534_SET_GET_REGISTER, 271 USB_TYPE_VENDOR | USB_DIR_IN, 272 reg, 0, tmp, sizeof(u8), 273 F81534_USB_TIMEOUT); 274 if (status > 0) { 275 status = 0; 276 break; 277 } else if (status == 0) { 278 status = -EIO; 279 } 280 } 281 282 if (status < 0) { 283 dev_err(&interface->dev, "%s: reg: %x failed: %d\n", __func__, 284 reg, status); 285 goto end; 286 } 287 288 *data = *tmp; 289 290 end: 291 kfree(tmp); 292 return status; 293 } 294 295 static int f81534_set_mask_register(struct usb_serial *serial, u16 reg, 296 u8 mask, u8 data) 297 { 298 int status; 299 u8 tmp; 300 301 status = f81534_get_register(serial, reg, &tmp); 302 if (status) 303 return status; 304 305 tmp &= ~mask; 306 tmp |= (mask & data); 307 308 return f81534_set_register(serial, reg, tmp); 309 } 310 311 static int f81534_set_phy_port_register(struct usb_serial *serial, int phy, 312 u16 reg, u8 data) 313 { 314 return f81534_set_register(serial, reg + F81534_UART_OFFSET * phy, 315 data); 316 } 317 318 static int f81534_get_phy_port_register(struct usb_serial *serial, int phy, 319 u16 reg, u8 *data) 320 { 321 return f81534_get_register(serial, reg + F81534_UART_OFFSET * phy, 322 data); 323 } 324 325 static int f81534_set_port_register(struct usb_serial_port *port, u16 reg, 326 u8 data) 327 { 328 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 329 330 return f81534_set_register(port->serial, 331 reg + port_priv->phy_num * F81534_UART_OFFSET, data); 332 } 333 334 static int f81534_get_port_register(struct usb_serial_port *port, u16 reg, 335 u8 *data) 336 { 337 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 338 339 return f81534_get_register(port->serial, 340 reg + port_priv->phy_num * F81534_UART_OFFSET, data); 341 } 342 343 /* 344 * If we try to access the internal flash via SPI bus, we should check the bus 345 * status for every command. e.g., F81534_BUS_REG_START/F81534_BUS_REG_END 346 */ 347 static int f81534_wait_for_spi_idle(struct usb_serial *serial) 348 { 349 size_t count = F81534_MAX_BUS_RETRY; 350 u8 tmp; 351 int status; 352 353 do { 354 status = f81534_get_register(serial, F81534_BUS_REG_STATUS, 355 &tmp); 356 if (status) 357 return status; 358 359 if (tmp & F81534_BUS_BUSY) 360 continue; 361 362 if (tmp & F81534_BUS_IDLE) 363 break; 364 365 } while (--count); 366 367 if (!count) { 368 dev_err(&serial->interface->dev, 369 "%s: timed out waiting for idle SPI bus\n", 370 __func__); 371 return -EIO; 372 } 373 374 return f81534_set_register(serial, F81534_BUS_REG_STATUS, 375 tmp & ~F81534_BUS_IDLE); 376 } 377 378 static int f81534_get_spi_register(struct usb_serial *serial, u16 reg, 379 u8 *data) 380 { 381 int status; 382 383 status = f81534_get_register(serial, reg, data); 384 if (status) 385 return status; 386 387 return f81534_wait_for_spi_idle(serial); 388 } 389 390 static int f81534_set_spi_register(struct usb_serial *serial, u16 reg, u8 data) 391 { 392 int status; 393 394 status = f81534_set_register(serial, reg, data); 395 if (status) 396 return status; 397 398 return f81534_wait_for_spi_idle(serial); 399 } 400 401 static int f81534_read_flash(struct usb_serial *serial, u32 address, 402 size_t size, u8 *buf) 403 { 404 u8 tmp_buf[F81534_MAX_DATA_BLOCK]; 405 size_t block = 0; 406 size_t read_size; 407 size_t count; 408 int status; 409 int offset; 410 u16 reg_tmp; 411 412 status = f81534_set_spi_register(serial, F81534_BUS_REG_START, 413 F81534_CMD_READ); 414 if (status) 415 return status; 416 417 status = f81534_set_spi_register(serial, F81534_BUS_REG_START, 418 (address >> 16) & 0xff); 419 if (status) 420 return status; 421 422 status = f81534_set_spi_register(serial, F81534_BUS_REG_START, 423 (address >> 8) & 0xff); 424 if (status) 425 return status; 426 427 status = f81534_set_spi_register(serial, F81534_BUS_REG_START, 428 (address >> 0) & 0xff); 429 if (status) 430 return status; 431 432 /* Continuous read mode */ 433 do { 434 read_size = min_t(size_t, F81534_MAX_DATA_BLOCK, size); 435 436 for (count = 0; count < read_size; ++count) { 437 /* To write F81534_BUS_REG_END when final byte */ 438 if (size <= F81534_MAX_DATA_BLOCK && 439 read_size == count + 1) 440 reg_tmp = F81534_BUS_REG_END; 441 else 442 reg_tmp = F81534_BUS_REG_START; 443 444 /* 445 * Dummy code, force IC to generate a read pulse, the 446 * set of value 0xf1 is dont care (any value is ok) 447 */ 448 status = f81534_set_spi_register(serial, reg_tmp, 449 0xf1); 450 if (status) 451 return status; 452 453 status = f81534_get_spi_register(serial, 454 F81534_BUS_READ_DATA, 455 &tmp_buf[count]); 456 if (status) 457 return status; 458 459 offset = count + block * F81534_MAX_DATA_BLOCK; 460 buf[offset] = tmp_buf[count]; 461 } 462 463 size -= read_size; 464 ++block; 465 } while (size); 466 467 return 0; 468 } 469 470 static void f81534_prepare_write_buffer(struct usb_serial_port *port, u8 *buf) 471 { 472 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 473 int phy_num = port_priv->phy_num; 474 u8 tx_len; 475 int i; 476 477 /* 478 * The block layout is fixed with 4x128 Bytes, per 128 Bytes a port. 479 * index 0: port phy idx (e.g., 0,1,2,3) 480 * index 1: only F81534_TOKEN_WRITE 481 * index 2: serial TX out length 482 * index 3: fix to 0 483 * index 4~127: serial out data block 484 */ 485 for (i = 0; i < F81534_NUM_PORT; ++i) { 486 buf[i * F81534_RECEIVE_BLOCK_SIZE] = i; 487 buf[i * F81534_RECEIVE_BLOCK_SIZE + 1] = F81534_TOKEN_WRITE; 488 buf[i * F81534_RECEIVE_BLOCK_SIZE + 2] = 0; 489 buf[i * F81534_RECEIVE_BLOCK_SIZE + 3] = 0; 490 } 491 492 tx_len = kfifo_out_locked(&port->write_fifo, 493 &buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 4], 494 F81534_MAX_TX_SIZE, &port->lock); 495 496 buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 2] = tx_len; 497 } 498 499 static int f81534_submit_writer(struct usb_serial_port *port, gfp_t mem_flags) 500 { 501 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 502 struct urb *urb; 503 unsigned long flags; 504 int result; 505 506 /* Check is any data in write_fifo */ 507 spin_lock_irqsave(&port->lock, flags); 508 509 if (kfifo_is_empty(&port->write_fifo)) { 510 spin_unlock_irqrestore(&port->lock, flags); 511 return 0; 512 } 513 514 spin_unlock_irqrestore(&port->lock, flags); 515 516 /* Check H/W is TXEMPTY */ 517 if (!test_and_clear_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty)) 518 return 0; 519 520 urb = port->write_urbs[0]; 521 f81534_prepare_write_buffer(port, port->bulk_out_buffers[0]); 522 urb->transfer_buffer_length = F81534_WRITE_BUFFER_SIZE; 523 524 result = usb_submit_urb(urb, mem_flags); 525 if (result) { 526 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty); 527 dev_err(&port->dev, "%s: submit failed: %d\n", __func__, 528 result); 529 return result; 530 } 531 532 usb_serial_port_softint(port); 533 return 0; 534 } 535 536 static u32 f81534_calc_baud_divisor(u32 baudrate, u32 clockrate) 537 { 538 if (!baudrate) 539 return 0; 540 541 /* Round to nearest divisor */ 542 return DIV_ROUND_CLOSEST(clockrate, baudrate); 543 } 544 545 static int f81534_find_clk(u32 baudrate) 546 { 547 int idx; 548 549 for (idx = 0; idx < ARRAY_SIZE(baudrate_table); ++idx) { 550 if (baudrate <= baudrate_table[idx] && 551 baudrate_table[idx] % baudrate == 0) 552 return idx; 553 } 554 555 return -EINVAL; 556 } 557 558 static int f81534_set_port_config(struct usb_serial_port *port, 559 struct tty_struct *tty, u32 baudrate, u32 old_baudrate, u8 lcr) 560 { 561 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 562 u32 divisor; 563 int status; 564 int i; 565 int idx; 566 u8 value; 567 u32 baud_list[] = {baudrate, old_baudrate, F81534_DEFAULT_BAUD_RATE}; 568 569 for (i = 0; i < ARRAY_SIZE(baud_list); ++i) { 570 idx = f81534_find_clk(baud_list[i]); 571 if (idx >= 0) { 572 baudrate = baud_list[i]; 573 tty_encode_baud_rate(tty, baudrate, baudrate); 574 break; 575 } 576 } 577 578 if (idx < 0) 579 return -EINVAL; 580 581 port_priv->baud_base = baudrate_table[idx]; 582 port_priv->shadow_clk &= ~F81534_CLK_MASK; 583 port_priv->shadow_clk |= clock_table[idx]; 584 585 status = f81534_set_port_register(port, F81534_CLOCK_REG, 586 port_priv->shadow_clk); 587 if (status) { 588 dev_err(&port->dev, "CLOCK_REG setting failed\n"); 589 return status; 590 } 591 592 if (baudrate <= 1200) 593 value = F81534_1X_RXTRIGGER; /* 128 FIFO & TL: 1x */ 594 else 595 value = F81534_8X_RXTRIGGER; /* 128 FIFO & TL: 8x */ 596 597 status = f81534_set_port_register(port, F81534_CONFIG1_REG, value); 598 if (status) { 599 dev_err(&port->dev, "%s: CONFIG1 setting failed\n", __func__); 600 return status; 601 } 602 603 if (baudrate <= 1200) 604 value = UART_FCR_TRIGGER_1 | UART_FCR_ENABLE_FIFO; /* TL: 1 */ 605 else 606 value = UART_FCR_TRIGGER_8 | UART_FCR_ENABLE_FIFO; /* TL: 8 */ 607 608 status = f81534_set_port_register(port, F81534_FIFO_CONTROL_REG, 609 value); 610 if (status) { 611 dev_err(&port->dev, "%s: FCR setting failed\n", __func__); 612 return status; 613 } 614 615 divisor = f81534_calc_baud_divisor(baudrate, port_priv->baud_base); 616 617 mutex_lock(&port_priv->lcr_mutex); 618 619 value = UART_LCR_DLAB; 620 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG, 621 value); 622 if (status) { 623 dev_err(&port->dev, "%s: set LCR failed\n", __func__); 624 goto out_unlock; 625 } 626 627 value = divisor & 0xff; 628 status = f81534_set_port_register(port, F81534_DIVISOR_LSB_REG, value); 629 if (status) { 630 dev_err(&port->dev, "%s: set DLAB LSB failed\n", __func__); 631 goto out_unlock; 632 } 633 634 value = (divisor >> 8) & 0xff; 635 status = f81534_set_port_register(port, F81534_DIVISOR_MSB_REG, value); 636 if (status) { 637 dev_err(&port->dev, "%s: set DLAB MSB failed\n", __func__); 638 goto out_unlock; 639 } 640 641 value = lcr | (port_priv->shadow_lcr & UART_LCR_SBC); 642 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG, 643 value); 644 if (status) { 645 dev_err(&port->dev, "%s: set LCR failed\n", __func__); 646 goto out_unlock; 647 } 648 649 port_priv->shadow_lcr = value; 650 out_unlock: 651 mutex_unlock(&port_priv->lcr_mutex); 652 653 return status; 654 } 655 656 static void f81534_break_ctl(struct tty_struct *tty, int break_state) 657 { 658 struct usb_serial_port *port = tty->driver_data; 659 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 660 int status; 661 662 mutex_lock(&port_priv->lcr_mutex); 663 664 if (break_state) 665 port_priv->shadow_lcr |= UART_LCR_SBC; 666 else 667 port_priv->shadow_lcr &= ~UART_LCR_SBC; 668 669 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG, 670 port_priv->shadow_lcr); 671 if (status) 672 dev_err(&port->dev, "set break failed: %d\n", status); 673 674 mutex_unlock(&port_priv->lcr_mutex); 675 } 676 677 static int f81534_update_mctrl(struct usb_serial_port *port, unsigned int set, 678 unsigned int clear) 679 { 680 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 681 int status; 682 u8 tmp; 683 684 if (((set | clear) & (TIOCM_DTR | TIOCM_RTS)) == 0) 685 return 0; /* no change */ 686 687 mutex_lock(&port_priv->mcr_mutex); 688 689 /* 'Set' takes precedence over 'Clear' */ 690 clear &= ~set; 691 692 /* Always enable UART_MCR_OUT2 */ 693 tmp = UART_MCR_OUT2 | port_priv->shadow_mcr; 694 695 if (clear & TIOCM_DTR) 696 tmp &= ~UART_MCR_DTR; 697 698 if (clear & TIOCM_RTS) 699 tmp &= ~UART_MCR_RTS; 700 701 if (set & TIOCM_DTR) 702 tmp |= UART_MCR_DTR; 703 704 if (set & TIOCM_RTS) 705 tmp |= UART_MCR_RTS; 706 707 status = f81534_set_port_register(port, F81534_MODEM_CONTROL_REG, tmp); 708 if (status < 0) { 709 dev_err(&port->dev, "%s: MCR write failed\n", __func__); 710 mutex_unlock(&port_priv->mcr_mutex); 711 return status; 712 } 713 714 port_priv->shadow_mcr = tmp; 715 mutex_unlock(&port_priv->mcr_mutex); 716 return 0; 717 } 718 719 /* 720 * This function will search the data area with token F81534_CUSTOM_VALID_TOKEN 721 * for latest configuration index. If nothing found 722 * (*index = F81534_CUSTOM_NO_CUSTOM_DATA), We'll load default configure in 723 * F81534_DEF_CONF_ADDRESS_START section. 724 * 725 * Due to we only use block0 to save data, so *index should be 0 or 726 * F81534_CUSTOM_NO_CUSTOM_DATA. 727 */ 728 static int f81534_find_config_idx(struct usb_serial *serial, u8 *index) 729 { 730 u8 tmp; 731 int status; 732 733 status = f81534_read_flash(serial, F81534_CUSTOM_ADDRESS_START, 1, 734 &tmp); 735 if (status) { 736 dev_err(&serial->interface->dev, "%s: read failed: %d\n", 737 __func__, status); 738 return status; 739 } 740 741 /* We'll use the custom data when the data is valid. */ 742 if (tmp == F81534_CUSTOM_VALID_TOKEN) 743 *index = 0; 744 else 745 *index = F81534_CUSTOM_NO_CUSTOM_DATA; 746 747 return 0; 748 } 749 750 /* 751 * The F81532/534 will not report serial port to USB serial subsystem when 752 * H/W DCD/DSR/CTS/RI/RX pin connected to ground. 753 * 754 * To detect RX pin status, we'll enable MCR interal loopback, disable it and 755 * delayed for 60ms. It connected to ground If LSR register report UART_LSR_BI. 756 */ 757 static bool f81534_check_port_hw_disabled(struct usb_serial *serial, int phy) 758 { 759 int status; 760 u8 old_mcr; 761 u8 msr; 762 u8 lsr; 763 u8 msr_mask; 764 765 msr_mask = UART_MSR_DCD | UART_MSR_RI | UART_MSR_DSR | UART_MSR_CTS; 766 767 status = f81534_get_phy_port_register(serial, phy, 768 F81534_MODEM_STATUS_REG, &msr); 769 if (status) 770 return false; 771 772 if ((msr & msr_mask) != msr_mask) 773 return false; 774 775 status = f81534_set_phy_port_register(serial, phy, 776 F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO | 777 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 778 if (status) 779 return false; 780 781 status = f81534_get_phy_port_register(serial, phy, 782 F81534_MODEM_CONTROL_REG, &old_mcr); 783 if (status) 784 return false; 785 786 status = f81534_set_phy_port_register(serial, phy, 787 F81534_MODEM_CONTROL_REG, UART_MCR_LOOP); 788 if (status) 789 return false; 790 791 status = f81534_set_phy_port_register(serial, phy, 792 F81534_MODEM_CONTROL_REG, 0x0); 793 if (status) 794 return false; 795 796 msleep(60); 797 798 status = f81534_get_phy_port_register(serial, phy, 799 F81534_LINE_STATUS_REG, &lsr); 800 if (status) 801 return false; 802 803 status = f81534_set_phy_port_register(serial, phy, 804 F81534_MODEM_CONTROL_REG, old_mcr); 805 if (status) 806 return false; 807 808 if ((lsr & UART_LSR_BI) == UART_LSR_BI) 809 return true; 810 811 return false; 812 } 813 814 /* 815 * We had 2 generation of F81532/534 IC. All has an internal storage. 816 * 817 * 1st is pure USB-to-TTL RS232 IC and designed for 4 ports only, no any 818 * internal data will used. All mode and gpio control should manually set 819 * by AP or Driver and all storage space value are 0xff. The 820 * f81534_calc_num_ports() will run to final we marked as "oldest version" 821 * for this IC. 822 * 823 * 2rd is designed to more generic to use any transceiver and this is our 824 * mass production type. We'll save data in F81534_CUSTOM_ADDRESS_START 825 * (0x2f00) with 9bytes. The 1st byte is a indicater. If the token is 826 * F81534_CUSTOM_VALID_TOKEN(0xf0), the IC is 2nd gen type, the following 827 * 4bytes save port mode (0:RS232/1:RS485 Invert/2:RS485), and the last 828 * 4bytes save GPIO state(value from 0~7 to represent 3 GPIO output pin). 829 * The f81534_calc_num_ports() will run to "new style" with checking 830 * F81534_PORT_UNAVAILABLE section. 831 */ 832 static int f81534_calc_num_ports(struct usb_serial *serial, 833 struct usb_serial_endpoints *epds) 834 { 835 struct f81534_serial_private *serial_priv; 836 struct device *dev = &serial->interface->dev; 837 int size_bulk_in = usb_endpoint_maxp(epds->bulk_in[0]); 838 int size_bulk_out = usb_endpoint_maxp(epds->bulk_out[0]); 839 u8 num_port = 0; 840 int index = 0; 841 int status; 842 int i; 843 844 if (size_bulk_out != F81534_WRITE_BUFFER_SIZE || 845 size_bulk_in != F81534_MAX_RECEIVE_BLOCK_SIZE) { 846 dev_err(dev, "unsupported endpoint max packet size\n"); 847 return -ENODEV; 848 } 849 850 serial_priv = devm_kzalloc(&serial->interface->dev, 851 sizeof(*serial_priv), GFP_KERNEL); 852 if (!serial_priv) 853 return -ENOMEM; 854 855 usb_set_serial_data(serial, serial_priv); 856 mutex_init(&serial_priv->urb_mutex); 857 858 /* Check had custom setting */ 859 status = f81534_find_config_idx(serial, &serial_priv->setting_idx); 860 if (status) { 861 dev_err(&serial->interface->dev, "%s: find idx failed: %d\n", 862 __func__, status); 863 return status; 864 } 865 866 /* 867 * We'll read custom data only when data available, otherwise we'll 868 * read default value instead. 869 */ 870 if (serial_priv->setting_idx != F81534_CUSTOM_NO_CUSTOM_DATA) { 871 status = f81534_read_flash(serial, 872 F81534_CUSTOM_ADDRESS_START + 873 F81534_CONF_OFFSET, 874 sizeof(serial_priv->conf_data), 875 serial_priv->conf_data); 876 if (status) { 877 dev_err(&serial->interface->dev, 878 "%s: get custom data failed: %d\n", 879 __func__, status); 880 return status; 881 } 882 883 dev_dbg(&serial->interface->dev, 884 "%s: read config from block: %d\n", __func__, 885 serial_priv->setting_idx); 886 } else { 887 /* Read default board setting */ 888 status = f81534_read_flash(serial, 889 F81534_DEF_CONF_ADDRESS_START, 890 sizeof(serial_priv->conf_data), 891 serial_priv->conf_data); 892 if (status) { 893 dev_err(&serial->interface->dev, 894 "%s: read failed: %d\n", __func__, 895 status); 896 return status; 897 } 898 899 dev_dbg(&serial->interface->dev, "%s: read default config\n", 900 __func__); 901 } 902 903 /* New style, find all possible ports */ 904 for (i = 0; i < F81534_NUM_PORT; ++i) { 905 if (f81534_check_port_hw_disabled(serial, i)) 906 serial_priv->conf_data[i] |= F81534_PORT_UNAVAILABLE; 907 908 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE) 909 continue; 910 911 ++num_port; 912 } 913 914 if (!num_port) { 915 dev_warn(&serial->interface->dev, 916 "no config found, assuming 4 ports\n"); 917 num_port = 4; /* Nothing found, oldest version IC */ 918 } 919 920 /* Assign phy-to-logic mapping */ 921 for (i = 0; i < F81534_NUM_PORT; ++i) { 922 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE) 923 continue; 924 925 serial_priv->tty_idx[i] = index++; 926 dev_dbg(&serial->interface->dev, 927 "%s: phy_num: %d, tty_idx: %d\n", __func__, i, 928 serial_priv->tty_idx[i]); 929 } 930 931 /* 932 * Setup bulk-out endpoint multiplexing. All ports share the same 933 * bulk-out endpoint. 934 */ 935 BUILD_BUG_ON(ARRAY_SIZE(epds->bulk_out) < F81534_NUM_PORT); 936 937 for (i = 1; i < num_port; ++i) 938 epds->bulk_out[i] = epds->bulk_out[0]; 939 940 epds->num_bulk_out = num_port; 941 942 return num_port; 943 } 944 945 static void f81534_set_termios(struct tty_struct *tty, 946 struct usb_serial_port *port, 947 struct ktermios *old_termios) 948 { 949 u8 new_lcr = 0; 950 int status; 951 u32 baud; 952 u32 old_baud; 953 954 if (C_BAUD(tty) == B0) 955 f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS); 956 else if (old_termios && (old_termios->c_cflag & CBAUD) == B0) 957 f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0); 958 959 if (C_PARENB(tty)) { 960 new_lcr |= UART_LCR_PARITY; 961 962 if (!C_PARODD(tty)) 963 new_lcr |= UART_LCR_EPAR; 964 965 if (C_CMSPAR(tty)) 966 new_lcr |= UART_LCR_SPAR; 967 } 968 969 if (C_CSTOPB(tty)) 970 new_lcr |= UART_LCR_STOP; 971 972 switch (C_CSIZE(tty)) { 973 case CS5: 974 new_lcr |= UART_LCR_WLEN5; 975 break; 976 case CS6: 977 new_lcr |= UART_LCR_WLEN6; 978 break; 979 case CS7: 980 new_lcr |= UART_LCR_WLEN7; 981 break; 982 default: 983 case CS8: 984 new_lcr |= UART_LCR_WLEN8; 985 break; 986 } 987 988 baud = tty_get_baud_rate(tty); 989 if (!baud) 990 return; 991 992 if (old_termios) 993 old_baud = tty_termios_baud_rate(old_termios); 994 else 995 old_baud = F81534_DEFAULT_BAUD_RATE; 996 997 dev_dbg(&port->dev, "%s: baud: %d\n", __func__, baud); 998 999 status = f81534_set_port_config(port, tty, baud, old_baud, new_lcr); 1000 if (status < 0) { 1001 dev_err(&port->dev, "%s: set port config failed: %d\n", 1002 __func__, status); 1003 } 1004 } 1005 1006 static int f81534_submit_read_urb(struct usb_serial *serial, gfp_t flags) 1007 { 1008 return usb_serial_generic_submit_read_urbs(serial->port[0], flags); 1009 } 1010 1011 static void f81534_msr_changed(struct usb_serial_port *port, u8 msr) 1012 { 1013 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 1014 struct tty_struct *tty; 1015 unsigned long flags; 1016 u8 old_msr; 1017 1018 if (!(msr & UART_MSR_ANY_DELTA)) 1019 return; 1020 1021 spin_lock_irqsave(&port_priv->msr_lock, flags); 1022 old_msr = port_priv->shadow_msr; 1023 port_priv->shadow_msr = msr; 1024 spin_unlock_irqrestore(&port_priv->msr_lock, flags); 1025 1026 dev_dbg(&port->dev, "%s: MSR from %02x to %02x\n", __func__, old_msr, 1027 msr); 1028 1029 /* Update input line counters */ 1030 if (msr & UART_MSR_DCTS) 1031 port->icount.cts++; 1032 if (msr & UART_MSR_DDSR) 1033 port->icount.dsr++; 1034 if (msr & UART_MSR_DDCD) 1035 port->icount.dcd++; 1036 if (msr & UART_MSR_TERI) 1037 port->icount.rng++; 1038 1039 wake_up_interruptible(&port->port.delta_msr_wait); 1040 1041 if (!(msr & UART_MSR_DDCD)) 1042 return; 1043 1044 dev_dbg(&port->dev, "%s: DCD Changed: phy_num: %d from %x to %x\n", 1045 __func__, port_priv->phy_num, old_msr, msr); 1046 1047 tty = tty_port_tty_get(&port->port); 1048 if (!tty) 1049 return; 1050 1051 usb_serial_handle_dcd_change(port, tty, msr & UART_MSR_DCD); 1052 tty_kref_put(tty); 1053 } 1054 1055 static int f81534_read_msr(struct usb_serial_port *port) 1056 { 1057 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 1058 unsigned long flags; 1059 int status; 1060 u8 msr; 1061 1062 /* Get MSR initial value */ 1063 status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr); 1064 if (status) 1065 return status; 1066 1067 /* Force update current state */ 1068 spin_lock_irqsave(&port_priv->msr_lock, flags); 1069 port_priv->shadow_msr = msr; 1070 spin_unlock_irqrestore(&port_priv->msr_lock, flags); 1071 1072 return 0; 1073 } 1074 1075 static int f81534_open(struct tty_struct *tty, struct usb_serial_port *port) 1076 { 1077 struct f81534_serial_private *serial_priv = 1078 usb_get_serial_data(port->serial); 1079 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 1080 int status; 1081 1082 status = f81534_set_port_register(port, 1083 F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO | 1084 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 1085 if (status) { 1086 dev_err(&port->dev, "%s: Clear FIFO failed: %d\n", __func__, 1087 status); 1088 return status; 1089 } 1090 1091 if (tty) 1092 f81534_set_termios(tty, port, NULL); 1093 1094 status = f81534_read_msr(port); 1095 if (status) 1096 return status; 1097 1098 mutex_lock(&serial_priv->urb_mutex); 1099 1100 /* Submit Read URBs for first port opened */ 1101 if (!serial_priv->opened_port) { 1102 status = f81534_submit_read_urb(port->serial, GFP_KERNEL); 1103 if (status) 1104 goto exit; 1105 } 1106 1107 serial_priv->opened_port++; 1108 1109 exit: 1110 mutex_unlock(&serial_priv->urb_mutex); 1111 1112 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty); 1113 return status; 1114 } 1115 1116 static void f81534_close(struct usb_serial_port *port) 1117 { 1118 struct f81534_serial_private *serial_priv = 1119 usb_get_serial_data(port->serial); 1120 struct usb_serial_port *port0 = port->serial->port[0]; 1121 unsigned long flags; 1122 size_t i; 1123 1124 usb_kill_urb(port->write_urbs[0]); 1125 1126 spin_lock_irqsave(&port->lock, flags); 1127 kfifo_reset_out(&port->write_fifo); 1128 spin_unlock_irqrestore(&port->lock, flags); 1129 1130 /* Kill Read URBs when final port closed */ 1131 mutex_lock(&serial_priv->urb_mutex); 1132 serial_priv->opened_port--; 1133 1134 if (!serial_priv->opened_port) { 1135 for (i = 0; i < ARRAY_SIZE(port0->read_urbs); ++i) 1136 usb_kill_urb(port0->read_urbs[i]); 1137 } 1138 1139 mutex_unlock(&serial_priv->urb_mutex); 1140 } 1141 1142 static int f81534_get_serial_info(struct tty_struct *tty, 1143 struct serial_struct *ss) 1144 { 1145 struct usb_serial_port *port = tty->driver_data; 1146 struct f81534_port_private *port_priv; 1147 1148 port_priv = usb_get_serial_port_data(port); 1149 1150 ss->type = PORT_16550A; 1151 ss->port = port->port_number; 1152 ss->line = port->minor; 1153 ss->baud_base = port_priv->baud_base; 1154 return 0; 1155 } 1156 1157 static void f81534_process_per_serial_block(struct usb_serial_port *port, 1158 u8 *data) 1159 { 1160 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 1161 int phy_num = data[0]; 1162 size_t read_size = 0; 1163 size_t i; 1164 char tty_flag; 1165 int status; 1166 u8 lsr; 1167 1168 /* 1169 * The block layout is 128 Bytes 1170 * index 0: port phy idx (e.g., 0,1,2,3), 1171 * index 1: It's could be 1172 * F81534_TOKEN_RECEIVE 1173 * F81534_TOKEN_TX_EMPTY 1174 * F81534_TOKEN_MSR_CHANGE 1175 * index 2: serial in size (data+lsr, must be even) 1176 * meaningful for F81534_TOKEN_RECEIVE only 1177 * index 3: current MSR with this device 1178 * index 4~127: serial in data block (data+lsr, must be even) 1179 */ 1180 switch (data[1]) { 1181 case F81534_TOKEN_TX_EMPTY: 1182 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty); 1183 1184 /* Try to submit writer */ 1185 status = f81534_submit_writer(port, GFP_ATOMIC); 1186 if (status) 1187 dev_err(&port->dev, "%s: submit failed\n", __func__); 1188 return; 1189 1190 case F81534_TOKEN_MSR_CHANGE: 1191 f81534_msr_changed(port, data[3]); 1192 return; 1193 1194 case F81534_TOKEN_RECEIVE: 1195 read_size = data[2]; 1196 if (read_size > F81534_MAX_RX_SIZE) { 1197 dev_err(&port->dev, 1198 "%s: phy: %d read_size: %zu larger than: %d\n", 1199 __func__, phy_num, read_size, 1200 F81534_MAX_RX_SIZE); 1201 return; 1202 } 1203 1204 break; 1205 1206 default: 1207 dev_warn(&port->dev, "%s: unknown token: %02x\n", __func__, 1208 data[1]); 1209 return; 1210 } 1211 1212 for (i = 4; i < 4 + read_size; i += 2) { 1213 tty_flag = TTY_NORMAL; 1214 lsr = data[i + 1]; 1215 1216 if (lsr & UART_LSR_BRK_ERROR_BITS) { 1217 if (lsr & UART_LSR_BI) { 1218 tty_flag = TTY_BREAK; 1219 port->icount.brk++; 1220 usb_serial_handle_break(port); 1221 } else if (lsr & UART_LSR_PE) { 1222 tty_flag = TTY_PARITY; 1223 port->icount.parity++; 1224 } else if (lsr & UART_LSR_FE) { 1225 tty_flag = TTY_FRAME; 1226 port->icount.frame++; 1227 } 1228 1229 if (lsr & UART_LSR_OE) { 1230 port->icount.overrun++; 1231 tty_insert_flip_char(&port->port, 0, 1232 TTY_OVERRUN); 1233 } 1234 1235 schedule_work(&port_priv->lsr_work); 1236 } 1237 1238 if (port->port.console && port->sysrq) { 1239 if (usb_serial_handle_sysrq_char(port, data[i])) 1240 continue; 1241 } 1242 1243 tty_insert_flip_char(&port->port, data[i], tty_flag); 1244 } 1245 1246 tty_flip_buffer_push(&port->port); 1247 } 1248 1249 static void f81534_process_read_urb(struct urb *urb) 1250 { 1251 struct f81534_serial_private *serial_priv; 1252 struct usb_serial_port *port; 1253 struct usb_serial *serial; 1254 u8 *buf; 1255 int phy_port_num; 1256 int tty_port_num; 1257 size_t i; 1258 1259 if (!urb->actual_length || 1260 urb->actual_length % F81534_RECEIVE_BLOCK_SIZE) { 1261 return; 1262 } 1263 1264 port = urb->context; 1265 serial = port->serial; 1266 buf = urb->transfer_buffer; 1267 serial_priv = usb_get_serial_data(serial); 1268 1269 for (i = 0; i < urb->actual_length; i += F81534_RECEIVE_BLOCK_SIZE) { 1270 phy_port_num = buf[i]; 1271 if (phy_port_num >= F81534_NUM_PORT) { 1272 dev_err(&port->dev, 1273 "%s: phy_port_num: %d larger than: %d\n", 1274 __func__, phy_port_num, F81534_NUM_PORT); 1275 continue; 1276 } 1277 1278 tty_port_num = serial_priv->tty_idx[phy_port_num]; 1279 port = serial->port[tty_port_num]; 1280 1281 if (tty_port_initialized(&port->port)) 1282 f81534_process_per_serial_block(port, &buf[i]); 1283 } 1284 } 1285 1286 static void f81534_write_usb_callback(struct urb *urb) 1287 { 1288 struct usb_serial_port *port = urb->context; 1289 1290 switch (urb->status) { 1291 case 0: 1292 break; 1293 case -ENOENT: 1294 case -ECONNRESET: 1295 case -ESHUTDOWN: 1296 dev_dbg(&port->dev, "%s - urb stopped: %d\n", 1297 __func__, urb->status); 1298 return; 1299 case -EPIPE: 1300 dev_err(&port->dev, "%s - urb stopped: %d\n", 1301 __func__, urb->status); 1302 return; 1303 default: 1304 dev_dbg(&port->dev, "%s - nonzero urb status: %d\n", 1305 __func__, urb->status); 1306 break; 1307 } 1308 } 1309 1310 static void f81534_lsr_worker(struct work_struct *work) 1311 { 1312 struct f81534_port_private *port_priv; 1313 struct usb_serial_port *port; 1314 int status; 1315 u8 tmp; 1316 1317 port_priv = container_of(work, struct f81534_port_private, lsr_work); 1318 port = port_priv->port; 1319 1320 status = f81534_get_port_register(port, F81534_LINE_STATUS_REG, &tmp); 1321 if (status) 1322 dev_warn(&port->dev, "read LSR failed: %d\n", status); 1323 } 1324 1325 static int f81534_set_port_output_pin(struct usb_serial_port *port) 1326 { 1327 struct f81534_serial_private *serial_priv; 1328 struct f81534_port_private *port_priv; 1329 struct usb_serial *serial; 1330 const struct f81534_port_out_pin *pins; 1331 int status; 1332 int i; 1333 u8 value; 1334 u8 idx; 1335 1336 serial = port->serial; 1337 serial_priv = usb_get_serial_data(serial); 1338 port_priv = usb_get_serial_port_data(port); 1339 1340 idx = F81534_CONF_GPIO_OFFSET + port_priv->phy_num; 1341 value = serial_priv->conf_data[idx]; 1342 pins = &f81534_port_out_pins[port_priv->phy_num]; 1343 1344 for (i = 0; i < ARRAY_SIZE(pins->pin); ++i) { 1345 status = f81534_set_mask_register(serial, 1346 pins->pin[i].reg_addr, pins->pin[i].reg_mask, 1347 value & BIT(i) ? pins->pin[i].reg_mask : 0); 1348 if (status) 1349 return status; 1350 } 1351 1352 dev_dbg(&port->dev, "Output pin (M0/M1/M2): %d\n", value); 1353 return 0; 1354 } 1355 1356 static int f81534_port_probe(struct usb_serial_port *port) 1357 { 1358 struct f81534_serial_private *serial_priv; 1359 struct f81534_port_private *port_priv; 1360 int ret; 1361 u8 value; 1362 1363 serial_priv = usb_get_serial_data(port->serial); 1364 port_priv = devm_kzalloc(&port->dev, sizeof(*port_priv), GFP_KERNEL); 1365 if (!port_priv) 1366 return -ENOMEM; 1367 1368 /* 1369 * We'll make tx frame error when baud rate from 384~500kps. So we'll 1370 * delay all tx data frame with 1bit. 1371 */ 1372 port_priv->shadow_clk = F81534_UART_EN | F81534_CLK_TX_DELAY_1BIT; 1373 spin_lock_init(&port_priv->msr_lock); 1374 mutex_init(&port_priv->mcr_mutex); 1375 mutex_init(&port_priv->lcr_mutex); 1376 INIT_WORK(&port_priv->lsr_work, f81534_lsr_worker); 1377 1378 /* Assign logic-to-phy mapping */ 1379 ret = f81534_logic_to_phy_port(port->serial, port); 1380 if (ret < 0) 1381 return ret; 1382 1383 port_priv->phy_num = ret; 1384 port_priv->port = port; 1385 usb_set_serial_port_data(port, port_priv); 1386 dev_dbg(&port->dev, "%s: port_number: %d, phy_num: %d\n", __func__, 1387 port->port_number, port_priv->phy_num); 1388 1389 /* 1390 * The F81532/534 will hang-up when enable LSR interrupt in IER and 1391 * occur data overrun. So we'll disable the LSR interrupt in probe() 1392 * and submit the LSR worker to clear LSR state when reported LSR error 1393 * bit with bulk-in data in f81534_process_per_serial_block(). 1394 */ 1395 ret = f81534_set_port_register(port, F81534_INTERRUPT_ENABLE_REG, 1396 UART_IER_RDI | UART_IER_THRI | UART_IER_MSI); 1397 if (ret) 1398 return ret; 1399 1400 value = serial_priv->conf_data[port_priv->phy_num]; 1401 switch (value & F81534_PORT_CONF_MODE_MASK) { 1402 case F81534_PORT_CONF_RS485_INVERT: 1403 port_priv->shadow_clk |= F81534_CLK_RS485_MODE | 1404 F81534_CLK_RS485_INVERT; 1405 dev_dbg(&port->dev, "RS485 invert mode\n"); 1406 break; 1407 case F81534_PORT_CONF_RS485: 1408 port_priv->shadow_clk |= F81534_CLK_RS485_MODE; 1409 dev_dbg(&port->dev, "RS485 mode\n"); 1410 break; 1411 1412 default: 1413 case F81534_PORT_CONF_RS232: 1414 dev_dbg(&port->dev, "RS232 mode\n"); 1415 break; 1416 } 1417 1418 return f81534_set_port_output_pin(port); 1419 } 1420 1421 static int f81534_port_remove(struct usb_serial_port *port) 1422 { 1423 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 1424 1425 flush_work(&port_priv->lsr_work); 1426 return 0; 1427 } 1428 1429 static int f81534_tiocmget(struct tty_struct *tty) 1430 { 1431 struct usb_serial_port *port = tty->driver_data; 1432 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 1433 int status; 1434 int r; 1435 u8 msr; 1436 u8 mcr; 1437 1438 /* Read current MSR from device */ 1439 status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr); 1440 if (status) 1441 return status; 1442 1443 mutex_lock(&port_priv->mcr_mutex); 1444 mcr = port_priv->shadow_mcr; 1445 mutex_unlock(&port_priv->mcr_mutex); 1446 1447 r = (mcr & UART_MCR_DTR ? TIOCM_DTR : 0) | 1448 (mcr & UART_MCR_RTS ? TIOCM_RTS : 0) | 1449 (msr & UART_MSR_CTS ? TIOCM_CTS : 0) | 1450 (msr & UART_MSR_DCD ? TIOCM_CAR : 0) | 1451 (msr & UART_MSR_RI ? TIOCM_RI : 0) | 1452 (msr & UART_MSR_DSR ? TIOCM_DSR : 0); 1453 1454 return r; 1455 } 1456 1457 static int f81534_tiocmset(struct tty_struct *tty, unsigned int set, 1458 unsigned int clear) 1459 { 1460 struct usb_serial_port *port = tty->driver_data; 1461 1462 return f81534_update_mctrl(port, set, clear); 1463 } 1464 1465 static void f81534_dtr_rts(struct usb_serial_port *port, int on) 1466 { 1467 if (on) 1468 f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0); 1469 else 1470 f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS); 1471 } 1472 1473 static int f81534_write(struct tty_struct *tty, struct usb_serial_port *port, 1474 const u8 *buf, int count) 1475 { 1476 int bytes_out, status; 1477 1478 if (!count) 1479 return 0; 1480 1481 bytes_out = kfifo_in_locked(&port->write_fifo, buf, count, 1482 &port->lock); 1483 1484 status = f81534_submit_writer(port, GFP_ATOMIC); 1485 if (status) { 1486 dev_err(&port->dev, "%s: submit failed\n", __func__); 1487 return status; 1488 } 1489 1490 return bytes_out; 1491 } 1492 1493 static bool f81534_tx_empty(struct usb_serial_port *port) 1494 { 1495 struct f81534_port_private *port_priv = usb_get_serial_port_data(port); 1496 1497 return test_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty); 1498 } 1499 1500 static int f81534_resume(struct usb_serial *serial) 1501 { 1502 struct f81534_serial_private *serial_priv = 1503 usb_get_serial_data(serial); 1504 struct usb_serial_port *port; 1505 int error = 0; 1506 int status; 1507 size_t i; 1508 1509 /* 1510 * We'll register port 0 bulkin when port had opened, It'll take all 1511 * port received data, MSR register change and TX_EMPTY information. 1512 */ 1513 mutex_lock(&serial_priv->urb_mutex); 1514 1515 if (serial_priv->opened_port) { 1516 status = f81534_submit_read_urb(serial, GFP_NOIO); 1517 if (status) { 1518 mutex_unlock(&serial_priv->urb_mutex); 1519 return status; 1520 } 1521 } 1522 1523 mutex_unlock(&serial_priv->urb_mutex); 1524 1525 for (i = 0; i < serial->num_ports; i++) { 1526 port = serial->port[i]; 1527 if (!tty_port_initialized(&port->port)) 1528 continue; 1529 1530 status = f81534_submit_writer(port, GFP_NOIO); 1531 if (status) { 1532 dev_err(&port->dev, "%s: submit failed\n", __func__); 1533 ++error; 1534 } 1535 } 1536 1537 if (error) 1538 return -EIO; 1539 1540 return 0; 1541 } 1542 1543 static struct usb_serial_driver f81534_device = { 1544 .driver = { 1545 .owner = THIS_MODULE, 1546 .name = "f81534", 1547 }, 1548 .description = DRIVER_DESC, 1549 .id_table = f81534_id_table, 1550 .num_bulk_in = 1, 1551 .num_bulk_out = 1, 1552 .open = f81534_open, 1553 .close = f81534_close, 1554 .write = f81534_write, 1555 .tx_empty = f81534_tx_empty, 1556 .calc_num_ports = f81534_calc_num_ports, 1557 .port_probe = f81534_port_probe, 1558 .port_remove = f81534_port_remove, 1559 .break_ctl = f81534_break_ctl, 1560 .dtr_rts = f81534_dtr_rts, 1561 .process_read_urb = f81534_process_read_urb, 1562 .get_serial = f81534_get_serial_info, 1563 .tiocmget = f81534_tiocmget, 1564 .tiocmset = f81534_tiocmset, 1565 .write_bulk_callback = f81534_write_usb_callback, 1566 .set_termios = f81534_set_termios, 1567 .resume = f81534_resume, 1568 }; 1569 1570 static struct usb_serial_driver *const serial_drivers[] = { 1571 &f81534_device, NULL 1572 }; 1573 1574 module_usb_serial_driver(serial_drivers, f81534_id_table); 1575 1576 MODULE_DEVICE_TABLE(usb, f81534_id_table); 1577 MODULE_DESCRIPTION(DRIVER_DESC); 1578 MODULE_AUTHOR("Peter Hong <Peter_Hong@fintek.com.tw>"); 1579 MODULE_AUTHOR("Tom Tsai <Tom_Tsai@fintek.com.tw>"); 1580 MODULE_LICENSE("GPL"); 1581