1 // SPDX-License-Identifier: GPL-1.0+ 2 /* 3 * Renesas USB driver 4 * 5 * Copyright (C) 2011 Renesas Solutions Corp. 6 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 7 */ 8 #include <linux/delay.h> 9 #include <linux/io.h> 10 #include <linux/scatterlist.h> 11 #include "common.h" 12 #include "pipe.h" 13 14 #define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo)) 15 #define usbhsf_is_cfifo(p, f) (usbhsf_get_cfifo(p) == f) 16 17 #define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */ 18 19 /* 20 * packet initialize 21 */ 22 void usbhs_pkt_init(struct usbhs_pkt *pkt) 23 { 24 INIT_LIST_HEAD(&pkt->node); 25 } 26 27 /* 28 * packet control function 29 */ 30 static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done) 31 { 32 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); 33 struct device *dev = usbhs_priv_to_dev(priv); 34 35 dev_err(dev, "null handler\n"); 36 37 return -EINVAL; 38 } 39 40 static const struct usbhs_pkt_handle usbhsf_null_handler = { 41 .prepare = usbhsf_null_handle, 42 .try_run = usbhsf_null_handle, 43 }; 44 45 void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, 46 void (*done)(struct usbhs_priv *priv, 47 struct usbhs_pkt *pkt), 48 void *buf, int len, int zero, int sequence) 49 { 50 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 51 struct device *dev = usbhs_priv_to_dev(priv); 52 unsigned long flags; 53 54 if (!done) { 55 dev_err(dev, "no done function\n"); 56 return; 57 } 58 59 /******************** spin lock ********************/ 60 usbhs_lock(priv, flags); 61 62 if (!pipe->handler) { 63 dev_err(dev, "no handler function\n"); 64 pipe->handler = &usbhsf_null_handler; 65 } 66 67 list_move_tail(&pkt->node, &pipe->list); 68 69 /* 70 * each pkt must hold own handler. 71 * because handler might be changed by its situation. 72 * dma handler -> pio handler. 73 */ 74 pkt->pipe = pipe; 75 pkt->buf = buf; 76 pkt->handler = pipe->handler; 77 pkt->length = len; 78 pkt->zero = zero; 79 pkt->actual = 0; 80 pkt->done = done; 81 pkt->sequence = sequence; 82 83 usbhs_unlock(priv, flags); 84 /******************** spin unlock ******************/ 85 } 86 87 static void __usbhsf_pkt_del(struct usbhs_pkt *pkt) 88 { 89 list_del_init(&pkt->node); 90 } 91 92 static struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe) 93 { 94 return list_first_entry_or_null(&pipe->list, struct usbhs_pkt, node); 95 } 96 97 static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe, 98 struct usbhs_fifo *fifo); 99 static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo, 100 struct usbhs_pkt *pkt); 101 #define usbhsf_dma_map(p) __usbhsf_dma_map_ctrl(p, 1) 102 #define usbhsf_dma_unmap(p) __usbhsf_dma_map_ctrl(p, 0) 103 static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map); 104 struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt) 105 { 106 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 107 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe); 108 unsigned long flags; 109 110 /******************** spin lock ********************/ 111 usbhs_lock(priv, flags); 112 113 usbhs_pipe_disable(pipe); 114 115 if (!pkt) 116 pkt = __usbhsf_pkt_get(pipe); 117 118 if (pkt) { 119 struct dma_chan *chan = NULL; 120 121 if (fifo) 122 chan = usbhsf_dma_chan_get(fifo, pkt); 123 if (chan) { 124 dmaengine_terminate_all(chan); 125 usbhsf_dma_unmap(pkt); 126 } 127 128 usbhs_pipe_clear_without_sequence(pipe, 0, 0); 129 130 __usbhsf_pkt_del(pkt); 131 } 132 133 if (fifo) 134 usbhsf_fifo_unselect(pipe, fifo); 135 136 usbhs_unlock(priv, flags); 137 /******************** spin unlock ******************/ 138 139 return pkt; 140 } 141 142 enum { 143 USBHSF_PKT_PREPARE, 144 USBHSF_PKT_TRY_RUN, 145 USBHSF_PKT_DMA_DONE, 146 }; 147 148 static int usbhsf_pkt_handler(struct usbhs_pipe *pipe, int type) 149 { 150 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 151 struct usbhs_pkt *pkt; 152 struct device *dev = usbhs_priv_to_dev(priv); 153 int (*func)(struct usbhs_pkt *pkt, int *is_done); 154 unsigned long flags; 155 int ret = 0; 156 int is_done = 0; 157 158 /******************** spin lock ********************/ 159 usbhs_lock(priv, flags); 160 161 pkt = __usbhsf_pkt_get(pipe); 162 if (!pkt) 163 goto __usbhs_pkt_handler_end; 164 165 switch (type) { 166 case USBHSF_PKT_PREPARE: 167 func = pkt->handler->prepare; 168 break; 169 case USBHSF_PKT_TRY_RUN: 170 func = pkt->handler->try_run; 171 break; 172 case USBHSF_PKT_DMA_DONE: 173 func = pkt->handler->dma_done; 174 break; 175 default: 176 dev_err(dev, "unknown pkt handler\n"); 177 goto __usbhs_pkt_handler_end; 178 } 179 180 if (likely(func)) 181 ret = func(pkt, &is_done); 182 183 if (is_done) 184 __usbhsf_pkt_del(pkt); 185 186 __usbhs_pkt_handler_end: 187 usbhs_unlock(priv, flags); 188 /******************** spin unlock ******************/ 189 190 if (is_done) { 191 pkt->done(priv, pkt); 192 usbhs_pkt_start(pipe); 193 } 194 195 return ret; 196 } 197 198 void usbhs_pkt_start(struct usbhs_pipe *pipe) 199 { 200 usbhsf_pkt_handler(pipe, USBHSF_PKT_PREPARE); 201 } 202 203 /* 204 * irq enable/disable function 205 */ 206 #define usbhsf_irq_empty_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_bempsts, e) 207 #define usbhsf_irq_ready_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_brdysts, e) 208 #define usbhsf_irq_callback_ctrl(pipe, status, enable) \ 209 ({ \ 210 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); \ 211 struct usbhs_mod *mod = usbhs_mod_get_current(priv); \ 212 u16 status = (1 << usbhs_pipe_number(pipe)); \ 213 if (!mod) \ 214 return; \ 215 if (enable) \ 216 mod->status |= status; \ 217 else \ 218 mod->status &= ~status; \ 219 usbhs_irq_callback_update(priv, mod); \ 220 }) 221 222 static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable) 223 { 224 /* 225 * And DCP pipe can NOT use "ready interrupt" for "send" 226 * it should use "empty" interrupt. 227 * see 228 * "Operation" - "Interrupt Function" - "BRDY Interrupt" 229 * 230 * on the other hand, normal pipe can use "ready interrupt" for "send" 231 * even though it is single/double buffer 232 */ 233 if (usbhs_pipe_is_dcp(pipe)) 234 usbhsf_irq_empty_ctrl(pipe, enable); 235 else 236 usbhsf_irq_ready_ctrl(pipe, enable); 237 } 238 239 static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable) 240 { 241 usbhsf_irq_ready_ctrl(pipe, enable); 242 } 243 244 /* 245 * FIFO ctrl 246 */ 247 static void usbhsf_send_terminator(struct usbhs_pipe *pipe, 248 struct usbhs_fifo *fifo) 249 { 250 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 251 252 usbhs_bset(priv, fifo->ctr, BVAL, BVAL); 253 } 254 255 static int usbhsf_fifo_barrier(struct usbhs_priv *priv, 256 struct usbhs_fifo *fifo) 257 { 258 /* The FIFO port is accessible */ 259 if (usbhs_read(priv, fifo->ctr) & FRDY) 260 return 0; 261 262 return -EBUSY; 263 } 264 265 static void usbhsf_fifo_clear(struct usbhs_pipe *pipe, 266 struct usbhs_fifo *fifo) 267 { 268 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 269 int ret = 0; 270 271 if (!usbhs_pipe_is_dcp(pipe)) { 272 /* 273 * This driver checks the pipe condition first to avoid -EBUSY 274 * from usbhsf_fifo_barrier() if the pipe is RX direction and 275 * empty. 276 */ 277 if (usbhs_pipe_is_dir_in(pipe)) 278 ret = usbhs_pipe_is_accessible(pipe); 279 if (!ret) 280 ret = usbhsf_fifo_barrier(priv, fifo); 281 } 282 283 /* 284 * if non-DCP pipe, this driver should set BCLR when 285 * usbhsf_fifo_barrier() returns 0. 286 */ 287 if (!ret) 288 usbhs_write(priv, fifo->ctr, BCLR); 289 } 290 291 static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv, 292 struct usbhs_fifo *fifo) 293 { 294 return usbhs_read(priv, fifo->ctr) & DTLN_MASK; 295 } 296 297 static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe, 298 struct usbhs_fifo *fifo) 299 { 300 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 301 302 usbhs_pipe_select_fifo(pipe, NULL); 303 usbhs_write(priv, fifo->sel, 0); 304 } 305 306 static int usbhsf_fifo_select(struct usbhs_pipe *pipe, 307 struct usbhs_fifo *fifo, 308 int write) 309 { 310 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 311 struct device *dev = usbhs_priv_to_dev(priv); 312 int timeout = 1024; 313 u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */ 314 u16 base = usbhs_pipe_number(pipe); /* CURPIPE */ 315 316 if (usbhs_pipe_is_busy(pipe) || 317 usbhsf_fifo_is_busy(fifo)) 318 return -EBUSY; 319 320 if (usbhs_pipe_is_dcp(pipe)) { 321 base |= (1 == write) << 5; /* ISEL */ 322 323 if (usbhs_mod_is_host(priv)) 324 usbhs_dcp_dir_for_host(pipe, write); 325 } 326 327 /* "base" will be used below */ 328 if (usbhs_get_dparam(priv, has_sudmac) && !usbhsf_is_cfifo(priv, fifo)) 329 usbhs_write(priv, fifo->sel, base); 330 else 331 usbhs_write(priv, fifo->sel, base | MBW_32); 332 333 /* check ISEL and CURPIPE value */ 334 while (timeout--) { 335 if (base == (mask & usbhs_read(priv, fifo->sel))) { 336 usbhs_pipe_select_fifo(pipe, fifo); 337 return 0; 338 } 339 udelay(10); 340 } 341 342 dev_err(dev, "fifo select error\n"); 343 344 return -EIO; 345 } 346 347 /* 348 * DCP status stage 349 */ 350 static int usbhs_dcp_dir_switch_to_write(struct usbhs_pkt *pkt, int *is_done) 351 { 352 struct usbhs_pipe *pipe = pkt->pipe; 353 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 354 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ 355 struct device *dev = usbhs_priv_to_dev(priv); 356 int ret; 357 358 usbhs_pipe_disable(pipe); 359 360 ret = usbhsf_fifo_select(pipe, fifo, 1); 361 if (ret < 0) { 362 dev_err(dev, "%s() faile\n", __func__); 363 return ret; 364 } 365 366 usbhs_pipe_sequence_data1(pipe); /* DATA1 */ 367 368 usbhsf_fifo_clear(pipe, fifo); 369 usbhsf_send_terminator(pipe, fifo); 370 371 usbhsf_fifo_unselect(pipe, fifo); 372 373 usbhsf_tx_irq_ctrl(pipe, 1); 374 usbhs_pipe_enable(pipe); 375 376 return ret; 377 } 378 379 static int usbhs_dcp_dir_switch_to_read(struct usbhs_pkt *pkt, int *is_done) 380 { 381 struct usbhs_pipe *pipe = pkt->pipe; 382 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 383 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ 384 struct device *dev = usbhs_priv_to_dev(priv); 385 int ret; 386 387 usbhs_pipe_disable(pipe); 388 389 ret = usbhsf_fifo_select(pipe, fifo, 0); 390 if (ret < 0) { 391 dev_err(dev, "%s() fail\n", __func__); 392 return ret; 393 } 394 395 usbhs_pipe_sequence_data1(pipe); /* DATA1 */ 396 usbhsf_fifo_clear(pipe, fifo); 397 398 usbhsf_fifo_unselect(pipe, fifo); 399 400 usbhsf_rx_irq_ctrl(pipe, 1); 401 usbhs_pipe_enable(pipe); 402 403 return ret; 404 405 } 406 407 static int usbhs_dcp_dir_switch_done(struct usbhs_pkt *pkt, int *is_done) 408 { 409 struct usbhs_pipe *pipe = pkt->pipe; 410 411 if (pkt->handler == &usbhs_dcp_status_stage_in_handler) 412 usbhsf_tx_irq_ctrl(pipe, 0); 413 else 414 usbhsf_rx_irq_ctrl(pipe, 0); 415 416 pkt->actual = pkt->length; 417 *is_done = 1; 418 419 return 0; 420 } 421 422 const struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler = { 423 .prepare = usbhs_dcp_dir_switch_to_write, 424 .try_run = usbhs_dcp_dir_switch_done, 425 }; 426 427 const struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler = { 428 .prepare = usbhs_dcp_dir_switch_to_read, 429 .try_run = usbhs_dcp_dir_switch_done, 430 }; 431 432 /* 433 * DCP data stage (push) 434 */ 435 static int usbhsf_dcp_data_stage_try_push(struct usbhs_pkt *pkt, int *is_done) 436 { 437 struct usbhs_pipe *pipe = pkt->pipe; 438 439 usbhs_pipe_sequence_data1(pipe); /* DATA1 */ 440 441 /* 442 * change handler to PIO push 443 */ 444 pkt->handler = &usbhs_fifo_pio_push_handler; 445 446 return pkt->handler->prepare(pkt, is_done); 447 } 448 449 const struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler = { 450 .prepare = usbhsf_dcp_data_stage_try_push, 451 }; 452 453 /* 454 * DCP data stage (pop) 455 */ 456 static int usbhsf_dcp_data_stage_prepare_pop(struct usbhs_pkt *pkt, 457 int *is_done) 458 { 459 struct usbhs_pipe *pipe = pkt->pipe; 460 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 461 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); 462 463 if (usbhs_pipe_is_busy(pipe)) 464 return 0; 465 466 /* 467 * prepare pop for DCP should 468 * - change DCP direction, 469 * - clear fifo 470 * - DATA1 471 */ 472 usbhs_pipe_disable(pipe); 473 474 usbhs_pipe_sequence_data1(pipe); /* DATA1 */ 475 476 usbhsf_fifo_select(pipe, fifo, 0); 477 usbhsf_fifo_clear(pipe, fifo); 478 usbhsf_fifo_unselect(pipe, fifo); 479 480 /* 481 * change handler to PIO pop 482 */ 483 pkt->handler = &usbhs_fifo_pio_pop_handler; 484 485 return pkt->handler->prepare(pkt, is_done); 486 } 487 488 const struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler = { 489 .prepare = usbhsf_dcp_data_stage_prepare_pop, 490 }; 491 492 /* 493 * PIO push handler 494 */ 495 static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done) 496 { 497 struct usbhs_pipe *pipe = pkt->pipe; 498 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 499 struct device *dev = usbhs_priv_to_dev(priv); 500 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ 501 void __iomem *addr = priv->base + fifo->port; 502 u8 *buf; 503 int maxp = usbhs_pipe_get_maxpacket(pipe); 504 int total_len; 505 int i, ret, len; 506 int is_short; 507 508 usbhs_pipe_data_sequence(pipe, pkt->sequence); 509 pkt->sequence = -1; /* -1 sequence will be ignored */ 510 511 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length); 512 513 ret = usbhsf_fifo_select(pipe, fifo, 1); 514 if (ret < 0) 515 return 0; 516 517 ret = usbhs_pipe_is_accessible(pipe); 518 if (ret < 0) { 519 /* inaccessible pipe is not an error */ 520 ret = 0; 521 goto usbhs_fifo_write_busy; 522 } 523 524 ret = usbhsf_fifo_barrier(priv, fifo); 525 if (ret < 0) 526 goto usbhs_fifo_write_busy; 527 528 buf = pkt->buf + pkt->actual; 529 len = pkt->length - pkt->actual; 530 len = min(len, maxp); 531 total_len = len; 532 is_short = total_len < maxp; 533 534 /* 535 * FIXME 536 * 537 * 32-bit access only 538 */ 539 if (len >= 4 && !((unsigned long)buf & 0x03)) { 540 iowrite32_rep(addr, buf, len / 4); 541 len %= 4; 542 buf += total_len - len; 543 } 544 545 /* the rest operation */ 546 for (i = 0; i < len; i++) 547 iowrite8(buf[i], addr + (0x03 - (i & 0x03))); 548 549 /* 550 * variable update 551 */ 552 pkt->actual += total_len; 553 554 if (pkt->actual < pkt->length) 555 *is_done = 0; /* there are remainder data */ 556 else if (is_short) 557 *is_done = 1; /* short packet */ 558 else 559 *is_done = !pkt->zero; /* send zero packet ? */ 560 561 /* 562 * pipe/irq handling 563 */ 564 if (is_short) 565 usbhsf_send_terminator(pipe, fifo); 566 567 usbhsf_tx_irq_ctrl(pipe, !*is_done); 568 usbhs_pipe_running(pipe, !*is_done); 569 usbhs_pipe_enable(pipe); 570 571 dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n", 572 usbhs_pipe_number(pipe), 573 pkt->length, pkt->actual, *is_done, pkt->zero); 574 575 usbhsf_fifo_unselect(pipe, fifo); 576 577 return 0; 578 579 usbhs_fifo_write_busy: 580 usbhsf_fifo_unselect(pipe, fifo); 581 582 /* 583 * pipe is busy. 584 * retry in interrupt 585 */ 586 usbhsf_tx_irq_ctrl(pipe, 1); 587 usbhs_pipe_running(pipe, 1); 588 589 return ret; 590 } 591 592 static int usbhsf_pio_prepare_push(struct usbhs_pkt *pkt, int *is_done) 593 { 594 if (usbhs_pipe_is_running(pkt->pipe)) 595 return 0; 596 597 return usbhsf_pio_try_push(pkt, is_done); 598 } 599 600 const struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = { 601 .prepare = usbhsf_pio_prepare_push, 602 .try_run = usbhsf_pio_try_push, 603 }; 604 605 /* 606 * PIO pop handler 607 */ 608 static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done) 609 { 610 struct usbhs_pipe *pipe = pkt->pipe; 611 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 612 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); 613 614 if (usbhs_pipe_is_busy(pipe)) 615 return 0; 616 617 if (usbhs_pipe_is_running(pipe)) 618 return 0; 619 620 /* 621 * pipe enable to prepare packet receive 622 */ 623 usbhs_pipe_data_sequence(pipe, pkt->sequence); 624 pkt->sequence = -1; /* -1 sequence will be ignored */ 625 626 if (usbhs_pipe_is_dcp(pipe)) 627 usbhsf_fifo_clear(pipe, fifo); 628 629 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length); 630 usbhs_pipe_enable(pipe); 631 usbhs_pipe_running(pipe, 1); 632 usbhsf_rx_irq_ctrl(pipe, 1); 633 634 return 0; 635 } 636 637 static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done) 638 { 639 struct usbhs_pipe *pipe = pkt->pipe; 640 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 641 struct device *dev = usbhs_priv_to_dev(priv); 642 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ 643 void __iomem *addr = priv->base + fifo->port; 644 u8 *buf; 645 u32 data = 0; 646 int maxp = usbhs_pipe_get_maxpacket(pipe); 647 int rcv_len, len; 648 int i, ret; 649 int total_len = 0; 650 651 ret = usbhsf_fifo_select(pipe, fifo, 0); 652 if (ret < 0) 653 return 0; 654 655 ret = usbhsf_fifo_barrier(priv, fifo); 656 if (ret < 0) 657 goto usbhs_fifo_read_busy; 658 659 rcv_len = usbhsf_fifo_rcv_len(priv, fifo); 660 661 buf = pkt->buf + pkt->actual; 662 len = pkt->length - pkt->actual; 663 len = min(len, rcv_len); 664 total_len = len; 665 666 /* 667 * update actual length first here to decide disable pipe. 668 * if this pipe keeps BUF status and all data were popped, 669 * then, next interrupt/token will be issued again 670 */ 671 pkt->actual += total_len; 672 673 if ((pkt->actual == pkt->length) || /* receive all data */ 674 (total_len < maxp)) { /* short packet */ 675 *is_done = 1; 676 usbhsf_rx_irq_ctrl(pipe, 0); 677 usbhs_pipe_running(pipe, 0); 678 /* 679 * If function mode, since this controller is possible to enter 680 * Control Write status stage at this timing, this driver 681 * should not disable the pipe. If such a case happens, this 682 * controller is not able to complete the status stage. 683 */ 684 if (!usbhs_mod_is_host(priv) && !usbhs_pipe_is_dcp(pipe)) 685 usbhs_pipe_disable(pipe); /* disable pipe first */ 686 } 687 688 /* 689 * Buffer clear if Zero-Length packet 690 * 691 * see 692 * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function" 693 */ 694 if (0 == rcv_len) { 695 pkt->zero = 1; 696 usbhsf_fifo_clear(pipe, fifo); 697 goto usbhs_fifo_read_end; 698 } 699 700 /* 701 * FIXME 702 * 703 * 32-bit access only 704 */ 705 if (len >= 4 && !((unsigned long)buf & 0x03)) { 706 ioread32_rep(addr, buf, len / 4); 707 len %= 4; 708 buf += total_len - len; 709 } 710 711 /* the rest operation */ 712 for (i = 0; i < len; i++) { 713 if (!(i & 0x03)) 714 data = ioread32(addr); 715 716 buf[i] = (data >> ((i & 0x03) * 8)) & 0xff; 717 } 718 719 usbhs_fifo_read_end: 720 dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n", 721 usbhs_pipe_number(pipe), 722 pkt->length, pkt->actual, *is_done, pkt->zero); 723 724 usbhs_fifo_read_busy: 725 usbhsf_fifo_unselect(pipe, fifo); 726 727 return ret; 728 } 729 730 const struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = { 731 .prepare = usbhsf_prepare_pop, 732 .try_run = usbhsf_pio_try_pop, 733 }; 734 735 /* 736 * DCP ctrol statge handler 737 */ 738 static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done) 739 { 740 usbhs_dcp_control_transfer_done(pkt->pipe); 741 742 *is_done = 1; 743 744 return 0; 745 } 746 747 const struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = { 748 .prepare = usbhsf_ctrl_stage_end, 749 .try_run = usbhsf_ctrl_stage_end, 750 }; 751 752 /* 753 * DMA fifo functions 754 */ 755 static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo, 756 struct usbhs_pkt *pkt) 757 { 758 if (&usbhs_fifo_dma_push_handler == pkt->handler) 759 return fifo->tx_chan; 760 761 if (&usbhs_fifo_dma_pop_handler == pkt->handler) 762 return fifo->rx_chan; 763 764 return NULL; 765 } 766 767 static struct usbhs_fifo *usbhsf_get_dma_fifo(struct usbhs_priv *priv, 768 struct usbhs_pkt *pkt) 769 { 770 struct usbhs_fifo *fifo; 771 int i; 772 773 usbhs_for_each_dfifo(priv, fifo, i) { 774 if (usbhsf_dma_chan_get(fifo, pkt) && 775 !usbhsf_fifo_is_busy(fifo)) 776 return fifo; 777 } 778 779 return NULL; 780 } 781 782 #define usbhsf_dma_start(p, f) __usbhsf_dma_ctrl(p, f, DREQE) 783 #define usbhsf_dma_stop(p, f) __usbhsf_dma_ctrl(p, f, 0) 784 static void __usbhsf_dma_ctrl(struct usbhs_pipe *pipe, 785 struct usbhs_fifo *fifo, 786 u16 dreqe) 787 { 788 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 789 790 usbhs_bset(priv, fifo->sel, DREQE, dreqe); 791 } 792 793 static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map) 794 { 795 struct usbhs_pipe *pipe = pkt->pipe; 796 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 797 struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); 798 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe); 799 struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt); 800 801 return info->dma_map_ctrl(chan->device->dev, pkt, map); 802 } 803 804 static void usbhsf_dma_complete(void *arg); 805 static void xfer_work(struct work_struct *work) 806 { 807 struct usbhs_pkt *pkt = container_of(work, struct usbhs_pkt, work); 808 struct usbhs_pipe *pipe = pkt->pipe; 809 struct usbhs_fifo *fifo; 810 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 811 struct dma_async_tx_descriptor *desc; 812 struct dma_chan *chan; 813 struct device *dev = usbhs_priv_to_dev(priv); 814 enum dma_transfer_direction dir; 815 unsigned long flags; 816 817 usbhs_lock(priv, flags); 818 fifo = usbhs_pipe_to_fifo(pipe); 819 if (!fifo) 820 goto xfer_work_end; 821 822 chan = usbhsf_dma_chan_get(fifo, pkt); 823 dir = usbhs_pipe_is_dir_in(pipe) ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV; 824 825 desc = dmaengine_prep_slave_single(chan, pkt->dma + pkt->actual, 826 pkt->trans, dir, 827 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 828 if (!desc) 829 goto xfer_work_end; 830 831 desc->callback = usbhsf_dma_complete; 832 desc->callback_param = pipe; 833 834 pkt->cookie = dmaengine_submit(desc); 835 if (pkt->cookie < 0) { 836 dev_err(dev, "Failed to submit dma descriptor\n"); 837 goto xfer_work_end; 838 } 839 840 dev_dbg(dev, " %s %d (%d/ %d)\n", 841 fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero); 842 843 usbhs_pipe_running(pipe, 1); 844 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->trans); 845 dma_async_issue_pending(chan); 846 usbhsf_dma_start(pipe, fifo); 847 usbhs_pipe_enable(pipe); 848 849 xfer_work_end: 850 usbhs_unlock(priv, flags); 851 } 852 853 /* 854 * DMA push handler 855 */ 856 static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done) 857 { 858 struct usbhs_pipe *pipe = pkt->pipe; 859 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 860 struct usbhs_fifo *fifo; 861 int len = pkt->length - pkt->actual; 862 int ret; 863 uintptr_t align_mask; 864 865 if (usbhs_pipe_is_busy(pipe)) 866 return 0; 867 868 /* use PIO if packet is less than pio_dma_border or pipe is DCP */ 869 if ((len < usbhs_get_dparam(priv, pio_dma_border)) || 870 usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC)) 871 goto usbhsf_pio_prepare_push; 872 873 /* check data length if this driver don't use USB-DMAC */ 874 if (!usbhs_get_dparam(priv, has_usb_dmac) && len & 0x7) 875 goto usbhsf_pio_prepare_push; 876 877 /* check buffer alignment */ 878 align_mask = usbhs_get_dparam(priv, has_usb_dmac) ? 879 USBHS_USB_DMAC_XFER_SIZE - 1 : 0x7; 880 if ((uintptr_t)(pkt->buf + pkt->actual) & align_mask) 881 goto usbhsf_pio_prepare_push; 882 883 /* return at this time if the pipe is running */ 884 if (usbhs_pipe_is_running(pipe)) 885 return 0; 886 887 /* get enable DMA fifo */ 888 fifo = usbhsf_get_dma_fifo(priv, pkt); 889 if (!fifo) 890 goto usbhsf_pio_prepare_push; 891 892 ret = usbhsf_fifo_select(pipe, fifo, 0); 893 if (ret < 0) 894 goto usbhsf_pio_prepare_push; 895 896 if (usbhsf_dma_map(pkt) < 0) 897 goto usbhsf_pio_prepare_push_unselect; 898 899 pkt->trans = len; 900 901 usbhsf_tx_irq_ctrl(pipe, 0); 902 INIT_WORK(&pkt->work, xfer_work); 903 schedule_work(&pkt->work); 904 905 return 0; 906 907 usbhsf_pio_prepare_push_unselect: 908 usbhsf_fifo_unselect(pipe, fifo); 909 usbhsf_pio_prepare_push: 910 /* 911 * change handler to PIO 912 */ 913 pkt->handler = &usbhs_fifo_pio_push_handler; 914 915 return pkt->handler->prepare(pkt, is_done); 916 } 917 918 static int usbhsf_dma_push_done(struct usbhs_pkt *pkt, int *is_done) 919 { 920 struct usbhs_pipe *pipe = pkt->pipe; 921 int is_short = pkt->trans % usbhs_pipe_get_maxpacket(pipe); 922 923 pkt->actual += pkt->trans; 924 925 if (pkt->actual < pkt->length) 926 *is_done = 0; /* there are remainder data */ 927 else if (is_short) 928 *is_done = 1; /* short packet */ 929 else 930 *is_done = !pkt->zero; /* send zero packet? */ 931 932 usbhs_pipe_running(pipe, !*is_done); 933 934 usbhsf_dma_stop(pipe, pipe->fifo); 935 usbhsf_dma_unmap(pkt); 936 usbhsf_fifo_unselect(pipe, pipe->fifo); 937 938 if (!*is_done) { 939 /* change handler to PIO */ 940 pkt->handler = &usbhs_fifo_pio_push_handler; 941 return pkt->handler->try_run(pkt, is_done); 942 } 943 944 return 0; 945 } 946 947 const struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = { 948 .prepare = usbhsf_dma_prepare_push, 949 .dma_done = usbhsf_dma_push_done, 950 }; 951 952 /* 953 * DMA pop handler 954 */ 955 956 static int usbhsf_dma_prepare_pop_with_rx_irq(struct usbhs_pkt *pkt, 957 int *is_done) 958 { 959 return usbhsf_prepare_pop(pkt, is_done); 960 } 961 962 static int usbhsf_dma_prepare_pop_with_usb_dmac(struct usbhs_pkt *pkt, 963 int *is_done) 964 { 965 struct usbhs_pipe *pipe = pkt->pipe; 966 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 967 struct usbhs_fifo *fifo; 968 int ret; 969 970 if (usbhs_pipe_is_busy(pipe)) 971 return 0; 972 973 /* use PIO if packet is less than pio_dma_border or pipe is DCP */ 974 if ((pkt->length < usbhs_get_dparam(priv, pio_dma_border)) || 975 usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC)) 976 goto usbhsf_pio_prepare_pop; 977 978 fifo = usbhsf_get_dma_fifo(priv, pkt); 979 if (!fifo) 980 goto usbhsf_pio_prepare_pop; 981 982 if ((uintptr_t)pkt->buf & (USBHS_USB_DMAC_XFER_SIZE - 1)) 983 goto usbhsf_pio_prepare_pop; 984 985 /* return at this time if the pipe is running */ 986 if (usbhs_pipe_is_running(pipe)) 987 return 0; 988 989 usbhs_pipe_config_change_bfre(pipe, 1); 990 991 ret = usbhsf_fifo_select(pipe, fifo, 0); 992 if (ret < 0) 993 goto usbhsf_pio_prepare_pop; 994 995 if (usbhsf_dma_map(pkt) < 0) 996 goto usbhsf_pio_prepare_pop_unselect; 997 998 /* DMA */ 999 1000 /* 1001 * usbhs_fifo_dma_pop_handler :: prepare 1002 * enabled irq to come here. 1003 * but it is no longer needed for DMA. disable it. 1004 */ 1005 usbhsf_rx_irq_ctrl(pipe, 0); 1006 1007 pkt->trans = pkt->length; 1008 1009 INIT_WORK(&pkt->work, xfer_work); 1010 schedule_work(&pkt->work); 1011 1012 return 0; 1013 1014 usbhsf_pio_prepare_pop_unselect: 1015 usbhsf_fifo_unselect(pipe, fifo); 1016 usbhsf_pio_prepare_pop: 1017 1018 /* 1019 * change handler to PIO 1020 */ 1021 pkt->handler = &usbhs_fifo_pio_pop_handler; 1022 usbhs_pipe_config_change_bfre(pipe, 0); 1023 1024 return pkt->handler->prepare(pkt, is_done); 1025 } 1026 1027 static int usbhsf_dma_prepare_pop(struct usbhs_pkt *pkt, int *is_done) 1028 { 1029 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); 1030 1031 if (usbhs_get_dparam(priv, has_usb_dmac)) 1032 return usbhsf_dma_prepare_pop_with_usb_dmac(pkt, is_done); 1033 else 1034 return usbhsf_dma_prepare_pop_with_rx_irq(pkt, is_done); 1035 } 1036 1037 static int usbhsf_dma_try_pop_with_rx_irq(struct usbhs_pkt *pkt, int *is_done) 1038 { 1039 struct usbhs_pipe *pipe = pkt->pipe; 1040 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 1041 struct usbhs_fifo *fifo; 1042 int len, ret; 1043 1044 if (usbhs_pipe_is_busy(pipe)) 1045 return 0; 1046 1047 if (usbhs_pipe_is_dcp(pipe)) 1048 goto usbhsf_pio_prepare_pop; 1049 1050 /* get enable DMA fifo */ 1051 fifo = usbhsf_get_dma_fifo(priv, pkt); 1052 if (!fifo) 1053 goto usbhsf_pio_prepare_pop; 1054 1055 if ((uintptr_t)(pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */ 1056 goto usbhsf_pio_prepare_pop; 1057 1058 ret = usbhsf_fifo_select(pipe, fifo, 0); 1059 if (ret < 0) 1060 goto usbhsf_pio_prepare_pop; 1061 1062 /* use PIO if packet is less than pio_dma_border */ 1063 len = usbhsf_fifo_rcv_len(priv, fifo); 1064 len = min(pkt->length - pkt->actual, len); 1065 if (len & 0x7) /* 8byte alignment */ 1066 goto usbhsf_pio_prepare_pop_unselect; 1067 1068 if (len < usbhs_get_dparam(priv, pio_dma_border)) 1069 goto usbhsf_pio_prepare_pop_unselect; 1070 1071 ret = usbhsf_fifo_barrier(priv, fifo); 1072 if (ret < 0) 1073 goto usbhsf_pio_prepare_pop_unselect; 1074 1075 if (usbhsf_dma_map(pkt) < 0) 1076 goto usbhsf_pio_prepare_pop_unselect; 1077 1078 /* DMA */ 1079 1080 /* 1081 * usbhs_fifo_dma_pop_handler :: prepare 1082 * enabled irq to come here. 1083 * but it is no longer needed for DMA. disable it. 1084 */ 1085 usbhsf_rx_irq_ctrl(pipe, 0); 1086 1087 pkt->trans = len; 1088 1089 INIT_WORK(&pkt->work, xfer_work); 1090 schedule_work(&pkt->work); 1091 1092 return 0; 1093 1094 usbhsf_pio_prepare_pop_unselect: 1095 usbhsf_fifo_unselect(pipe, fifo); 1096 usbhsf_pio_prepare_pop: 1097 1098 /* 1099 * change handler to PIO 1100 */ 1101 pkt->handler = &usbhs_fifo_pio_pop_handler; 1102 1103 return pkt->handler->try_run(pkt, is_done); 1104 } 1105 1106 static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done) 1107 { 1108 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); 1109 1110 BUG_ON(usbhs_get_dparam(priv, has_usb_dmac)); 1111 1112 return usbhsf_dma_try_pop_with_rx_irq(pkt, is_done); 1113 } 1114 1115 static int usbhsf_dma_pop_done_with_rx_irq(struct usbhs_pkt *pkt, int *is_done) 1116 { 1117 struct usbhs_pipe *pipe = pkt->pipe; 1118 int maxp = usbhs_pipe_get_maxpacket(pipe); 1119 1120 usbhsf_dma_stop(pipe, pipe->fifo); 1121 usbhsf_dma_unmap(pkt); 1122 usbhsf_fifo_unselect(pipe, pipe->fifo); 1123 1124 pkt->actual += pkt->trans; 1125 1126 if ((pkt->actual == pkt->length) || /* receive all data */ 1127 (pkt->trans < maxp)) { /* short packet */ 1128 *is_done = 1; 1129 usbhs_pipe_running(pipe, 0); 1130 } else { 1131 /* re-enable */ 1132 usbhs_pipe_running(pipe, 0); 1133 usbhsf_prepare_pop(pkt, is_done); 1134 } 1135 1136 return 0; 1137 } 1138 1139 static size_t usbhs_dma_calc_received_size(struct usbhs_pkt *pkt, 1140 struct dma_chan *chan, int dtln) 1141 { 1142 struct usbhs_pipe *pipe = pkt->pipe; 1143 struct dma_tx_state state; 1144 size_t received_size; 1145 int maxp = usbhs_pipe_get_maxpacket(pipe); 1146 1147 dmaengine_tx_status(chan, pkt->cookie, &state); 1148 received_size = pkt->length - state.residue; 1149 1150 if (dtln) { 1151 received_size -= USBHS_USB_DMAC_XFER_SIZE; 1152 received_size &= ~(maxp - 1); 1153 received_size += dtln; 1154 } 1155 1156 return received_size; 1157 } 1158 1159 static int usbhsf_dma_pop_done_with_usb_dmac(struct usbhs_pkt *pkt, 1160 int *is_done) 1161 { 1162 struct usbhs_pipe *pipe = pkt->pipe; 1163 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 1164 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe); 1165 struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt); 1166 int rcv_len; 1167 1168 /* 1169 * Since the driver disables rx_irq in DMA mode, the interrupt handler 1170 * cannot the BRDYSTS. So, the function clears it here because the 1171 * driver may use PIO mode next time. 1172 */ 1173 usbhs_xxxsts_clear(priv, BRDYSTS, usbhs_pipe_number(pipe)); 1174 1175 rcv_len = usbhsf_fifo_rcv_len(priv, fifo); 1176 usbhsf_fifo_clear(pipe, fifo); 1177 pkt->actual = usbhs_dma_calc_received_size(pkt, chan, rcv_len); 1178 1179 usbhs_pipe_running(pipe, 0); 1180 usbhsf_dma_stop(pipe, fifo); 1181 usbhsf_dma_unmap(pkt); 1182 usbhsf_fifo_unselect(pipe, pipe->fifo); 1183 1184 /* The driver can assume the rx transaction is always "done" */ 1185 *is_done = 1; 1186 1187 return 0; 1188 } 1189 1190 static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done) 1191 { 1192 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); 1193 1194 if (usbhs_get_dparam(priv, has_usb_dmac)) 1195 return usbhsf_dma_pop_done_with_usb_dmac(pkt, is_done); 1196 else 1197 return usbhsf_dma_pop_done_with_rx_irq(pkt, is_done); 1198 } 1199 1200 const struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = { 1201 .prepare = usbhsf_dma_prepare_pop, 1202 .try_run = usbhsf_dma_try_pop, 1203 .dma_done = usbhsf_dma_pop_done 1204 }; 1205 1206 /* 1207 * DMA setting 1208 */ 1209 static bool usbhsf_dma_filter(struct dma_chan *chan, void *param) 1210 { 1211 struct sh_dmae_slave *slave = param; 1212 1213 /* 1214 * FIXME 1215 * 1216 * usbhs doesn't recognize id = 0 as valid DMA 1217 */ 1218 if (0 == slave->shdma_slave.slave_id) 1219 return false; 1220 1221 chan->private = slave; 1222 1223 return true; 1224 } 1225 1226 static void usbhsf_dma_quit(struct usbhs_priv *priv, struct usbhs_fifo *fifo) 1227 { 1228 if (fifo->tx_chan) 1229 dma_release_channel(fifo->tx_chan); 1230 if (fifo->rx_chan) 1231 dma_release_channel(fifo->rx_chan); 1232 1233 fifo->tx_chan = NULL; 1234 fifo->rx_chan = NULL; 1235 } 1236 1237 static void usbhsf_dma_init_pdev(struct usbhs_fifo *fifo) 1238 { 1239 dma_cap_mask_t mask; 1240 1241 dma_cap_zero(mask); 1242 dma_cap_set(DMA_SLAVE, mask); 1243 fifo->tx_chan = dma_request_channel(mask, usbhsf_dma_filter, 1244 &fifo->tx_slave); 1245 1246 dma_cap_zero(mask); 1247 dma_cap_set(DMA_SLAVE, mask); 1248 fifo->rx_chan = dma_request_channel(mask, usbhsf_dma_filter, 1249 &fifo->rx_slave); 1250 } 1251 1252 static void usbhsf_dma_init_dt(struct device *dev, struct usbhs_fifo *fifo, 1253 int channel) 1254 { 1255 char name[16]; 1256 1257 /* 1258 * To avoid complex handing for DnFIFOs, the driver uses each 1259 * DnFIFO as TX or RX direction (not bi-direction). 1260 * So, the driver uses odd channels for TX, even channels for RX. 1261 */ 1262 snprintf(name, sizeof(name), "ch%d", channel); 1263 if (channel & 1) { 1264 fifo->tx_chan = dma_request_slave_channel_reason(dev, name); 1265 if (IS_ERR(fifo->tx_chan)) 1266 fifo->tx_chan = NULL; 1267 } else { 1268 fifo->rx_chan = dma_request_slave_channel_reason(dev, name); 1269 if (IS_ERR(fifo->rx_chan)) 1270 fifo->rx_chan = NULL; 1271 } 1272 } 1273 1274 static void usbhsf_dma_init(struct usbhs_priv *priv, struct usbhs_fifo *fifo, 1275 int channel) 1276 { 1277 struct device *dev = usbhs_priv_to_dev(priv); 1278 1279 if (dev->of_node) 1280 usbhsf_dma_init_dt(dev, fifo, channel); 1281 else 1282 usbhsf_dma_init_pdev(fifo); 1283 1284 if (fifo->tx_chan || fifo->rx_chan) 1285 dev_dbg(dev, "enable DMAEngine (%s%s%s)\n", 1286 fifo->name, 1287 fifo->tx_chan ? "[TX]" : " ", 1288 fifo->rx_chan ? "[RX]" : " "); 1289 } 1290 1291 /* 1292 * irq functions 1293 */ 1294 static int usbhsf_irq_empty(struct usbhs_priv *priv, 1295 struct usbhs_irq_state *irq_state) 1296 { 1297 struct usbhs_pipe *pipe; 1298 struct device *dev = usbhs_priv_to_dev(priv); 1299 int i, ret; 1300 1301 if (!irq_state->bempsts) { 1302 dev_err(dev, "debug %s !!\n", __func__); 1303 return -EIO; 1304 } 1305 1306 dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts); 1307 1308 /* 1309 * search interrupted "pipe" 1310 * not "uep". 1311 */ 1312 usbhs_for_each_pipe_with_dcp(pipe, priv, i) { 1313 if (!(irq_state->bempsts & (1 << i))) 1314 continue; 1315 1316 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN); 1317 if (ret < 0) 1318 dev_err(dev, "irq_empty run_error %d : %d\n", i, ret); 1319 } 1320 1321 return 0; 1322 } 1323 1324 static int usbhsf_irq_ready(struct usbhs_priv *priv, 1325 struct usbhs_irq_state *irq_state) 1326 { 1327 struct usbhs_pipe *pipe; 1328 struct device *dev = usbhs_priv_to_dev(priv); 1329 int i, ret; 1330 1331 if (!irq_state->brdysts) { 1332 dev_err(dev, "debug %s !!\n", __func__); 1333 return -EIO; 1334 } 1335 1336 dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts); 1337 1338 /* 1339 * search interrupted "pipe" 1340 * not "uep". 1341 */ 1342 usbhs_for_each_pipe_with_dcp(pipe, priv, i) { 1343 if (!(irq_state->brdysts & (1 << i))) 1344 continue; 1345 1346 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN); 1347 if (ret < 0) 1348 dev_err(dev, "irq_ready run_error %d : %d\n", i, ret); 1349 } 1350 1351 return 0; 1352 } 1353 1354 static void usbhsf_dma_complete(void *arg) 1355 { 1356 struct usbhs_pipe *pipe = arg; 1357 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 1358 struct device *dev = usbhs_priv_to_dev(priv); 1359 int ret; 1360 1361 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_DMA_DONE); 1362 if (ret < 0) 1363 dev_err(dev, "dma_complete run_error %d : %d\n", 1364 usbhs_pipe_number(pipe), ret); 1365 } 1366 1367 void usbhs_fifo_clear_dcp(struct usbhs_pipe *pipe) 1368 { 1369 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 1370 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ 1371 1372 /* clear DCP FIFO of transmission */ 1373 if (usbhsf_fifo_select(pipe, fifo, 1) < 0) 1374 return; 1375 usbhsf_fifo_clear(pipe, fifo); 1376 usbhsf_fifo_unselect(pipe, fifo); 1377 1378 /* clear DCP FIFO of reception */ 1379 if (usbhsf_fifo_select(pipe, fifo, 0) < 0) 1380 return; 1381 usbhsf_fifo_clear(pipe, fifo); 1382 usbhsf_fifo_unselect(pipe, fifo); 1383 } 1384 1385 /* 1386 * fifo init 1387 */ 1388 void usbhs_fifo_init(struct usbhs_priv *priv) 1389 { 1390 struct usbhs_mod *mod = usbhs_mod_get_current(priv); 1391 struct usbhs_fifo *cfifo = usbhsf_get_cfifo(priv); 1392 struct usbhs_fifo *dfifo; 1393 int i; 1394 1395 mod->irq_empty = usbhsf_irq_empty; 1396 mod->irq_ready = usbhsf_irq_ready; 1397 mod->irq_bempsts = 0; 1398 mod->irq_brdysts = 0; 1399 1400 cfifo->pipe = NULL; 1401 usbhs_for_each_dfifo(priv, dfifo, i) 1402 dfifo->pipe = NULL; 1403 } 1404 1405 void usbhs_fifo_quit(struct usbhs_priv *priv) 1406 { 1407 struct usbhs_mod *mod = usbhs_mod_get_current(priv); 1408 1409 mod->irq_empty = NULL; 1410 mod->irq_ready = NULL; 1411 mod->irq_bempsts = 0; 1412 mod->irq_brdysts = 0; 1413 } 1414 1415 #define __USBHS_DFIFO_INIT(priv, fifo, channel, fifo_port) \ 1416 do { \ 1417 fifo = usbhsf_get_dnfifo(priv, channel); \ 1418 fifo->name = "D"#channel"FIFO"; \ 1419 fifo->port = fifo_port; \ 1420 fifo->sel = D##channel##FIFOSEL; \ 1421 fifo->ctr = D##channel##FIFOCTR; \ 1422 fifo->tx_slave.shdma_slave.slave_id = \ 1423 usbhs_get_dparam(priv, d##channel##_tx_id); \ 1424 fifo->rx_slave.shdma_slave.slave_id = \ 1425 usbhs_get_dparam(priv, d##channel##_rx_id); \ 1426 usbhsf_dma_init(priv, fifo, channel); \ 1427 } while (0) 1428 1429 #define USBHS_DFIFO_INIT(priv, fifo, channel) \ 1430 __USBHS_DFIFO_INIT(priv, fifo, channel, D##channel##FIFO) 1431 #define USBHS_DFIFO_INIT_NO_PORT(priv, fifo, channel) \ 1432 __USBHS_DFIFO_INIT(priv, fifo, channel, 0) 1433 1434 int usbhs_fifo_probe(struct usbhs_priv *priv) 1435 { 1436 struct usbhs_fifo *fifo; 1437 1438 /* CFIFO */ 1439 fifo = usbhsf_get_cfifo(priv); 1440 fifo->name = "CFIFO"; 1441 fifo->port = CFIFO; 1442 fifo->sel = CFIFOSEL; 1443 fifo->ctr = CFIFOCTR; 1444 1445 /* DFIFO */ 1446 USBHS_DFIFO_INIT(priv, fifo, 0); 1447 USBHS_DFIFO_INIT(priv, fifo, 1); 1448 USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 2); 1449 USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 3); 1450 1451 return 0; 1452 } 1453 1454 void usbhs_fifo_remove(struct usbhs_priv *priv) 1455 { 1456 struct usbhs_fifo *fifo; 1457 int i; 1458 1459 usbhs_for_each_dfifo(priv, fifo, i) 1460 usbhsf_dma_quit(priv, fifo); 1461 } 1462