xref: /openbmc/linux/drivers/usb/phy/phy-fsl-usb.c (revision b34e08d5)
1 /*
2  * Copyright (C) 2007,2008 Freescale semiconductor, Inc.
3  *
4  * Author: Li Yang <LeoLi@freescale.com>
5  *         Jerry Huang <Chang-Ming.Huang@freescale.com>
6  *
7  * Initialization based on code from Shlomi Gridish.
8  *
9  * This program is free software; you can redistribute  it and/or modify it
10  * under  the terms of  the GNU General  Public License as published by the
11  * Free Software Foundation;  either version 2 of the  License, or (at your
12  * option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful, but
15  * WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17  * General Public License for more details.
18  *
19  * You should have received a copy of the  GNU General Public License along
20  * with this program; if not, write  to the Free Software Foundation, Inc.,
21  * 675 Mass Ave, Cambridge, MA 02139, USA.
22  */
23 
24 #include <linux/module.h>
25 #include <linux/kernel.h>
26 #include <linux/delay.h>
27 #include <linux/slab.h>
28 #include <linux/proc_fs.h>
29 #include <linux/errno.h>
30 #include <linux/interrupt.h>
31 #include <linux/io.h>
32 #include <linux/timer.h>
33 #include <linux/usb.h>
34 #include <linux/device.h>
35 #include <linux/usb/ch9.h>
36 #include <linux/usb/gadget.h>
37 #include <linux/workqueue.h>
38 #include <linux/time.h>
39 #include <linux/fsl_devices.h>
40 #include <linux/platform_device.h>
41 #include <linux/uaccess.h>
42 
43 #include <asm/unaligned.h>
44 
45 #include "phy-fsl-usb.h"
46 
47 #define DRIVER_VERSION "Rev. 1.55"
48 #define DRIVER_AUTHOR "Jerry Huang/Li Yang"
49 #define DRIVER_DESC "Freescale USB OTG Transceiver Driver"
50 #define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION
51 
52 static const char driver_name[] = "fsl-usb2-otg";
53 
54 const pm_message_t otg_suspend_state = {
55 	.event = 1,
56 };
57 
58 #define HA_DATA_PULSE
59 
60 static struct usb_dr_mmap *usb_dr_regs;
61 static struct fsl_otg *fsl_otg_dev;
62 static int srp_wait_done;
63 
64 /* FSM timers */
65 struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr,
66 	*b_ase0_brst_tmr, *b_se0_srp_tmr;
67 
68 /* Driver specific timers */
69 struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr,
70 	*b_srp_wait_tmr, *a_wait_enum_tmr;
71 
72 static struct list_head active_timers;
73 
74 static struct fsl_otg_config fsl_otg_initdata = {
75 	.otg_port = 1,
76 };
77 
78 #ifdef CONFIG_PPC32
79 static u32 _fsl_readl_be(const unsigned __iomem *p)
80 {
81 	return in_be32(p);
82 }
83 
84 static u32 _fsl_readl_le(const unsigned __iomem *p)
85 {
86 	return in_le32(p);
87 }
88 
89 static void _fsl_writel_be(u32 v, unsigned __iomem *p)
90 {
91 	out_be32(p, v);
92 }
93 
94 static void _fsl_writel_le(u32 v, unsigned __iomem *p)
95 {
96 	out_le32(p, v);
97 }
98 
99 static u32 (*_fsl_readl)(const unsigned __iomem *p);
100 static void (*_fsl_writel)(u32 v, unsigned __iomem *p);
101 
102 #define fsl_readl(p)		(*_fsl_readl)((p))
103 #define fsl_writel(v, p)	(*_fsl_writel)((v), (p))
104 
105 #else
106 #define fsl_readl(addr)		readl(addr)
107 #define fsl_writel(val, addr)	writel(val, addr)
108 #endif /* CONFIG_PPC32 */
109 
110 /* Routines to access transceiver ULPI registers */
111 u8 view_ulpi(u8 addr)
112 {
113 	u32 temp;
114 
115 	temp = 0x40000000 | (addr << 16);
116 	fsl_writel(temp, &usb_dr_regs->ulpiview);
117 	udelay(1000);
118 	while (temp & 0x40)
119 		temp = fsl_readl(&usb_dr_regs->ulpiview);
120 	return (le32_to_cpu(temp) & 0x0000ff00) >> 8;
121 }
122 
123 int write_ulpi(u8 addr, u8 data)
124 {
125 	u32 temp;
126 
127 	temp = 0x60000000 | (addr << 16) | data;
128 	fsl_writel(temp, &usb_dr_regs->ulpiview);
129 	return 0;
130 }
131 
132 /* -------------------------------------------------------------*/
133 /* Operations that will be called from OTG Finite State Machine */
134 
135 /* Charge vbus for vbus pulsing in SRP */
136 void fsl_otg_chrg_vbus(struct otg_fsm *fsm, int on)
137 {
138 	u32 tmp;
139 
140 	tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
141 
142 	if (on)
143 		/* stop discharging, start charging */
144 		tmp = (tmp & ~OTGSC_CTRL_VBUS_DISCHARGE) |
145 			OTGSC_CTRL_VBUS_CHARGE;
146 	else
147 		/* stop charging */
148 		tmp &= ~OTGSC_CTRL_VBUS_CHARGE;
149 
150 	fsl_writel(tmp, &usb_dr_regs->otgsc);
151 }
152 
153 /* Discharge vbus through a resistor to ground */
154 void fsl_otg_dischrg_vbus(int on)
155 {
156 	u32 tmp;
157 
158 	tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
159 
160 	if (on)
161 		/* stop charging, start discharging */
162 		tmp = (tmp & ~OTGSC_CTRL_VBUS_CHARGE) |
163 			OTGSC_CTRL_VBUS_DISCHARGE;
164 	else
165 		/* stop discharging */
166 		tmp &= ~OTGSC_CTRL_VBUS_DISCHARGE;
167 
168 	fsl_writel(tmp, &usb_dr_regs->otgsc);
169 }
170 
171 /* A-device driver vbus, controlled through PP bit in PORTSC */
172 void fsl_otg_drv_vbus(struct otg_fsm *fsm, int on)
173 {
174 	u32 tmp;
175 
176 	if (on) {
177 		tmp = fsl_readl(&usb_dr_regs->portsc) & ~PORTSC_W1C_BITS;
178 		fsl_writel(tmp | PORTSC_PORT_POWER, &usb_dr_regs->portsc);
179 	} else {
180 		tmp = fsl_readl(&usb_dr_regs->portsc) &
181 		      ~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER;
182 		fsl_writel(tmp, &usb_dr_regs->portsc);
183 	}
184 }
185 
186 /*
187  * Pull-up D+, signalling connect by periperal. Also used in
188  * data-line pulsing in SRP
189  */
190 void fsl_otg_loc_conn(struct otg_fsm *fsm, int on)
191 {
192 	u32 tmp;
193 
194 	tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
195 
196 	if (on)
197 		tmp |= OTGSC_CTRL_DATA_PULSING;
198 	else
199 		tmp &= ~OTGSC_CTRL_DATA_PULSING;
200 
201 	fsl_writel(tmp, &usb_dr_regs->otgsc);
202 }
203 
204 /*
205  * Generate SOF by host.  This is controlled through suspend/resume the
206  * port.  In host mode, controller will automatically send SOF.
207  * Suspend will block the data on the port.
208  */
209 void fsl_otg_loc_sof(struct otg_fsm *fsm, int on)
210 {
211 	u32 tmp;
212 
213 	tmp = fsl_readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS;
214 	if (on)
215 		tmp |= PORTSC_PORT_FORCE_RESUME;
216 	else
217 		tmp |= PORTSC_PORT_SUSPEND;
218 
219 	fsl_writel(tmp, &fsl_otg_dev->dr_mem_map->portsc);
220 
221 }
222 
223 /* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */
224 void fsl_otg_start_pulse(struct otg_fsm *fsm)
225 {
226 	u32 tmp;
227 
228 	srp_wait_done = 0;
229 #ifdef HA_DATA_PULSE
230 	tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
231 	tmp |= OTGSC_HA_DATA_PULSE;
232 	fsl_writel(tmp, &usb_dr_regs->otgsc);
233 #else
234 	fsl_otg_loc_conn(1);
235 #endif
236 
237 	fsl_otg_add_timer(fsm, b_data_pulse_tmr);
238 }
239 
240 void b_data_pulse_end(unsigned long foo)
241 {
242 #ifdef HA_DATA_PULSE
243 #else
244 	fsl_otg_loc_conn(0);
245 #endif
246 
247 	/* Do VBUS pulse after data pulse */
248 	fsl_otg_pulse_vbus();
249 }
250 
251 void fsl_otg_pulse_vbus(void)
252 {
253 	srp_wait_done = 0;
254 	fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 1);
255 	/* start the timer to end vbus charge */
256 	fsl_otg_add_timer(&fsl_otg_dev->fsm, b_vbus_pulse_tmr);
257 }
258 
259 void b_vbus_pulse_end(unsigned long foo)
260 {
261 	fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 0);
262 
263 	/*
264 	 * As USB3300 using the same a_sess_vld and b_sess_vld voltage
265 	 * we need to discharge the bus for a while to distinguish
266 	 * residual voltage of vbus pulsing and A device pull up
267 	 */
268 	fsl_otg_dischrg_vbus(1);
269 	fsl_otg_add_timer(&fsl_otg_dev->fsm, b_srp_wait_tmr);
270 }
271 
272 void b_srp_end(unsigned long foo)
273 {
274 	fsl_otg_dischrg_vbus(0);
275 	srp_wait_done = 1;
276 
277 	if ((fsl_otg_dev->phy.state == OTG_STATE_B_SRP_INIT) &&
278 	    fsl_otg_dev->fsm.b_sess_vld)
279 		fsl_otg_dev->fsm.b_srp_done = 1;
280 }
281 
282 /*
283  * Workaround for a_host suspending too fast.  When a_bus_req=0,
284  * a_host will start by SRP.  It needs to set b_hnp_enable before
285  * actually suspending to start HNP
286  */
287 void a_wait_enum(unsigned long foo)
288 {
289 	VDBG("a_wait_enum timeout\n");
290 	if (!fsl_otg_dev->phy.otg->host->b_hnp_enable)
291 		fsl_otg_add_timer(&fsl_otg_dev->fsm, a_wait_enum_tmr);
292 	else
293 		otg_statemachine(&fsl_otg_dev->fsm);
294 }
295 
296 /* The timeout callback function to set time out bit */
297 void set_tmout(unsigned long indicator)
298 {
299 	*(int *)indicator = 1;
300 }
301 
302 /* Initialize timers */
303 int fsl_otg_init_timers(struct otg_fsm *fsm)
304 {
305 	/* FSM used timers */
306 	a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE,
307 				(unsigned long)&fsm->a_wait_vrise_tmout);
308 	if (!a_wait_vrise_tmr)
309 		return -ENOMEM;
310 
311 	a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON,
312 				(unsigned long)&fsm->a_wait_bcon_tmout);
313 	if (!a_wait_bcon_tmr)
314 		return -ENOMEM;
315 
316 	a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS,
317 				(unsigned long)&fsm->a_aidl_bdis_tmout);
318 	if (!a_aidl_bdis_tmr)
319 		return -ENOMEM;
320 
321 	b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST,
322 				(unsigned long)&fsm->b_ase0_brst_tmout);
323 	if (!b_ase0_brst_tmr)
324 		return -ENOMEM;
325 
326 	b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP,
327 				(unsigned long)&fsm->b_se0_srp);
328 	if (!b_se0_srp_tmr)
329 		return -ENOMEM;
330 
331 	b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL,
332 				(unsigned long)&fsm->b_srp_done);
333 	if (!b_srp_fail_tmr)
334 		return -ENOMEM;
335 
336 	a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10,
337 				(unsigned long)&fsm);
338 	if (!a_wait_enum_tmr)
339 		return -ENOMEM;
340 
341 	/* device driver used timers */
342 	b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0);
343 	if (!b_srp_wait_tmr)
344 		return -ENOMEM;
345 
346 	b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end,
347 				TB_DATA_PLS, 0);
348 	if (!b_data_pulse_tmr)
349 		return -ENOMEM;
350 
351 	b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end,
352 				TB_VBUS_PLS, 0);
353 	if (!b_vbus_pulse_tmr)
354 		return -ENOMEM;
355 
356 	return 0;
357 }
358 
359 /* Uninitialize timers */
360 void fsl_otg_uninit_timers(void)
361 {
362 	/* FSM used timers */
363 	kfree(a_wait_vrise_tmr);
364 	kfree(a_wait_bcon_tmr);
365 	kfree(a_aidl_bdis_tmr);
366 	kfree(b_ase0_brst_tmr);
367 	kfree(b_se0_srp_tmr);
368 	kfree(b_srp_fail_tmr);
369 	kfree(a_wait_enum_tmr);
370 
371 	/* device driver used timers */
372 	kfree(b_srp_wait_tmr);
373 	kfree(b_data_pulse_tmr);
374 	kfree(b_vbus_pulse_tmr);
375 }
376 
377 static struct fsl_otg_timer *fsl_otg_get_timer(enum otg_fsm_timer t)
378 {
379 	struct fsl_otg_timer *timer;
380 
381 	/* REVISIT: use array of pointers to timers instead */
382 	switch (t) {
383 	case A_WAIT_VRISE:
384 		timer = a_wait_vrise_tmr;
385 		break;
386 	case A_WAIT_BCON:
387 		timer = a_wait_vrise_tmr;
388 		break;
389 	case A_AIDL_BDIS:
390 		timer = a_wait_vrise_tmr;
391 		break;
392 	case B_ASE0_BRST:
393 		timer = a_wait_vrise_tmr;
394 		break;
395 	case B_SE0_SRP:
396 		timer = a_wait_vrise_tmr;
397 		break;
398 	case B_SRP_FAIL:
399 		timer = a_wait_vrise_tmr;
400 		break;
401 	case A_WAIT_ENUM:
402 		timer = a_wait_vrise_tmr;
403 		break;
404 	default:
405 		timer = NULL;
406 	}
407 
408 	return timer;
409 }
410 
411 /* Add timer to timer list */
412 void fsl_otg_add_timer(struct otg_fsm *fsm, void *gtimer)
413 {
414 	struct fsl_otg_timer *timer = gtimer;
415 	struct fsl_otg_timer *tmp_timer;
416 
417 	/*
418 	 * Check if the timer is already in the active list,
419 	 * if so update timer count
420 	 */
421 	list_for_each_entry(tmp_timer, &active_timers, list)
422 	    if (tmp_timer == timer) {
423 		timer->count = timer->expires;
424 		return;
425 	}
426 	timer->count = timer->expires;
427 	list_add_tail(&timer->list, &active_timers);
428 }
429 
430 static void fsl_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
431 {
432 	struct fsl_otg_timer *timer;
433 
434 	timer = fsl_otg_get_timer(t);
435 	if (!timer)
436 		return;
437 
438 	fsl_otg_add_timer(fsm, timer);
439 }
440 
441 /* Remove timer from the timer list; clear timeout status */
442 void fsl_otg_del_timer(struct otg_fsm *fsm, void *gtimer)
443 {
444 	struct fsl_otg_timer *timer = gtimer;
445 	struct fsl_otg_timer *tmp_timer, *del_tmp;
446 
447 	list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
448 		if (tmp_timer == timer)
449 			list_del(&timer->list);
450 }
451 
452 static void fsl_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
453 {
454 	struct fsl_otg_timer *timer;
455 
456 	timer = fsl_otg_get_timer(t);
457 	if (!timer)
458 		return;
459 
460 	fsl_otg_del_timer(fsm, timer);
461 }
462 
463 /*
464  * Reduce timer count by 1, and find timeout conditions.
465  * Called by fsl_otg 1ms timer interrupt
466  */
467 int fsl_otg_tick_timer(void)
468 {
469 	struct fsl_otg_timer *tmp_timer, *del_tmp;
470 	int expired = 0;
471 
472 	list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) {
473 		tmp_timer->count--;
474 		/* check if timer expires */
475 		if (!tmp_timer->count) {
476 			list_del(&tmp_timer->list);
477 			tmp_timer->function(tmp_timer->data);
478 			expired = 1;
479 		}
480 	}
481 
482 	return expired;
483 }
484 
485 /* Reset controller, not reset the bus */
486 void otg_reset_controller(void)
487 {
488 	u32 command;
489 
490 	command = fsl_readl(&usb_dr_regs->usbcmd);
491 	command |= (1 << 1);
492 	fsl_writel(command, &usb_dr_regs->usbcmd);
493 	while (fsl_readl(&usb_dr_regs->usbcmd) & (1 << 1))
494 		;
495 }
496 
497 /* Call suspend/resume routines in host driver */
498 int fsl_otg_start_host(struct otg_fsm *fsm, int on)
499 {
500 	struct usb_otg *otg = fsm->otg;
501 	struct device *dev;
502 	struct fsl_otg *otg_dev = container_of(otg->phy, struct fsl_otg, phy);
503 	u32 retval = 0;
504 
505 	if (!otg->host)
506 		return -ENODEV;
507 	dev = otg->host->controller;
508 
509 	/*
510 	 * Update a_vbus_vld state as a_vbus_vld int is disabled
511 	 * in device mode
512 	 */
513 	fsm->a_vbus_vld =
514 		!!(fsl_readl(&usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID);
515 	if (on) {
516 		/* start fsl usb host controller */
517 		if (otg_dev->host_working)
518 			goto end;
519 		else {
520 			otg_reset_controller();
521 			VDBG("host on......\n");
522 			if (dev->driver->pm && dev->driver->pm->resume) {
523 				retval = dev->driver->pm->resume(dev);
524 				if (fsm->id) {
525 					/* default-b */
526 					fsl_otg_drv_vbus(fsm, 1);
527 					/*
528 					 * Workaround: b_host can't driver
529 					 * vbus, but PP in PORTSC needs to
530 					 * be 1 for host to work.
531 					 * So we set drv_vbus bit in
532 					 * transceiver to 0 thru ULPI.
533 					 */
534 					write_ulpi(0x0c, 0x20);
535 				}
536 			}
537 
538 			otg_dev->host_working = 1;
539 		}
540 	} else {
541 		/* stop fsl usb host controller */
542 		if (!otg_dev->host_working)
543 			goto end;
544 		else {
545 			VDBG("host off......\n");
546 			if (dev && dev->driver) {
547 				if (dev->driver->pm && dev->driver->pm->suspend)
548 					retval = dev->driver->pm->suspend(dev);
549 				if (fsm->id)
550 					/* default-b */
551 					fsl_otg_drv_vbus(fsm, 0);
552 			}
553 			otg_dev->host_working = 0;
554 		}
555 	}
556 end:
557 	return retval;
558 }
559 
560 /*
561  * Call suspend and resume function in udc driver
562  * to stop and start udc driver.
563  */
564 int fsl_otg_start_gadget(struct otg_fsm *fsm, int on)
565 {
566 	struct usb_otg *otg = fsm->otg;
567 	struct device *dev;
568 
569 	if (!otg->gadget || !otg->gadget->dev.parent)
570 		return -ENODEV;
571 
572 	VDBG("gadget %s\n", on ? "on" : "off");
573 	dev = otg->gadget->dev.parent;
574 
575 	if (on) {
576 		if (dev->driver->resume)
577 			dev->driver->resume(dev);
578 	} else {
579 		if (dev->driver->suspend)
580 			dev->driver->suspend(dev, otg_suspend_state);
581 	}
582 
583 	return 0;
584 }
585 
586 /*
587  * Called by initialization code of host driver.  Register host controller
588  * to the OTG.  Suspend host for OTG role detection.
589  */
590 static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host)
591 {
592 	struct fsl_otg *otg_dev;
593 
594 	if (!otg)
595 		return -ENODEV;
596 
597 	otg_dev = container_of(otg->phy, struct fsl_otg, phy);
598 	if (otg_dev != fsl_otg_dev)
599 		return -ENODEV;
600 
601 	otg->host = host;
602 
603 	otg_dev->fsm.a_bus_drop = 0;
604 	otg_dev->fsm.a_bus_req = 1;
605 
606 	if (host) {
607 		VDBG("host off......\n");
608 
609 		otg->host->otg_port = fsl_otg_initdata.otg_port;
610 		otg->host->is_b_host = otg_dev->fsm.id;
611 		/*
612 		 * must leave time for khubd to finish its thing
613 		 * before yanking the host driver out from under it,
614 		 * so suspend the host after a short delay.
615 		 */
616 		otg_dev->host_working = 1;
617 		schedule_delayed_work(&otg_dev->otg_event, 100);
618 		return 0;
619 	} else {
620 		/* host driver going away */
621 		if (!(fsl_readl(&otg_dev->dr_mem_map->otgsc) &
622 		      OTGSC_STS_USB_ID)) {
623 			/* Mini-A cable connected */
624 			struct otg_fsm *fsm = &otg_dev->fsm;
625 
626 			otg->phy->state = OTG_STATE_UNDEFINED;
627 			fsm->protocol = PROTO_UNDEF;
628 		}
629 	}
630 
631 	otg_dev->host_working = 0;
632 
633 	otg_statemachine(&otg_dev->fsm);
634 
635 	return 0;
636 }
637 
638 /* Called by initialization code of udc.  Register udc to OTG. */
639 static int fsl_otg_set_peripheral(struct usb_otg *otg,
640 					struct usb_gadget *gadget)
641 {
642 	struct fsl_otg *otg_dev;
643 
644 	if (!otg)
645 		return -ENODEV;
646 
647 	otg_dev = container_of(otg->phy, struct fsl_otg, phy);
648 	VDBG("otg_dev 0x%x\n", (int)otg_dev);
649 	VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev);
650 	if (otg_dev != fsl_otg_dev)
651 		return -ENODEV;
652 
653 	if (!gadget) {
654 		if (!otg->default_a)
655 			otg->gadget->ops->vbus_draw(otg->gadget, 0);
656 		usb_gadget_vbus_disconnect(otg->gadget);
657 		otg->gadget = 0;
658 		otg_dev->fsm.b_bus_req = 0;
659 		otg_statemachine(&otg_dev->fsm);
660 		return 0;
661 	}
662 
663 	otg->gadget = gadget;
664 	otg->gadget->is_a_peripheral = !otg_dev->fsm.id;
665 
666 	otg_dev->fsm.b_bus_req = 1;
667 
668 	/* start the gadget right away if the ID pin says Mini-B */
669 	pr_debug("ID pin=%d\n", otg_dev->fsm.id);
670 	if (otg_dev->fsm.id == 1) {
671 		fsl_otg_start_host(&otg_dev->fsm, 0);
672 		otg_drv_vbus(&otg_dev->fsm, 0);
673 		fsl_otg_start_gadget(&otg_dev->fsm, 1);
674 	}
675 
676 	return 0;
677 }
678 
679 /* Set OTG port power, only for B-device */
680 static int fsl_otg_set_power(struct usb_phy *phy, unsigned mA)
681 {
682 	if (!fsl_otg_dev)
683 		return -ENODEV;
684 	if (phy->state == OTG_STATE_B_PERIPHERAL)
685 		pr_info("FSL OTG: Draw %d mA\n", mA);
686 
687 	return 0;
688 }
689 
690 /*
691  * Delayed pin detect interrupt processing.
692  *
693  * When the Mini-A cable is disconnected from the board,
694  * the pin-detect interrupt happens before the disconnect
695  * interrupts for the connected device(s).  In order to
696  * process the disconnect interrupt(s) prior to switching
697  * roles, the pin-detect interrupts are delayed, and handled
698  * by this routine.
699  */
700 static void fsl_otg_event(struct work_struct *work)
701 {
702 	struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work);
703 	struct otg_fsm *fsm = &og->fsm;
704 
705 	if (fsm->id) {		/* switch to gadget */
706 		fsl_otg_start_host(fsm, 0);
707 		otg_drv_vbus(fsm, 0);
708 		fsl_otg_start_gadget(fsm, 1);
709 	}
710 }
711 
712 /* B-device start SRP */
713 static int fsl_otg_start_srp(struct usb_otg *otg)
714 {
715 	struct fsl_otg *otg_dev;
716 
717 	if (!otg || otg->phy->state != OTG_STATE_B_IDLE)
718 		return -ENODEV;
719 
720 	otg_dev = container_of(otg->phy, struct fsl_otg, phy);
721 	if (otg_dev != fsl_otg_dev)
722 		return -ENODEV;
723 
724 	otg_dev->fsm.b_bus_req = 1;
725 	otg_statemachine(&otg_dev->fsm);
726 
727 	return 0;
728 }
729 
730 /* A_host suspend will call this function to start hnp */
731 static int fsl_otg_start_hnp(struct usb_otg *otg)
732 {
733 	struct fsl_otg *otg_dev;
734 
735 	if (!otg)
736 		return -ENODEV;
737 
738 	otg_dev = container_of(otg->phy, struct fsl_otg, phy);
739 	if (otg_dev != fsl_otg_dev)
740 		return -ENODEV;
741 
742 	pr_debug("start_hnp...\n");
743 
744 	/* clear a_bus_req to enter a_suspend state */
745 	otg_dev->fsm.a_bus_req = 0;
746 	otg_statemachine(&otg_dev->fsm);
747 
748 	return 0;
749 }
750 
751 /*
752  * Interrupt handler.  OTG/host/peripheral share the same int line.
753  * OTG driver clears OTGSC interrupts and leaves USB interrupts
754  * intact.  It needs to have knowledge of some USB interrupts
755  * such as port change.
756  */
757 irqreturn_t fsl_otg_isr(int irq, void *dev_id)
758 {
759 	struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm;
760 	struct usb_otg *otg = ((struct fsl_otg *)dev_id)->phy.otg;
761 	u32 otg_int_src, otg_sc;
762 
763 	otg_sc = fsl_readl(&usb_dr_regs->otgsc);
764 	otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8);
765 
766 	/* Only clear otg interrupts */
767 	fsl_writel(otg_sc, &usb_dr_regs->otgsc);
768 
769 	/*FIXME: ID change not generate when init to 0 */
770 	fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
771 	otg->default_a = (fsm->id == 0);
772 
773 	/* process OTG interrupts */
774 	if (otg_int_src) {
775 		if (otg_int_src & OTGSC_INTSTS_USB_ID) {
776 			fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
777 			otg->default_a = (fsm->id == 0);
778 			/* clear conn information */
779 			if (fsm->id)
780 				fsm->b_conn = 0;
781 			else
782 				fsm->a_conn = 0;
783 
784 			if (otg->host)
785 				otg->host->is_b_host = fsm->id;
786 			if (otg->gadget)
787 				otg->gadget->is_a_peripheral = !fsm->id;
788 			VDBG("ID int (ID is %d)\n", fsm->id);
789 
790 			if (fsm->id) {	/* switch to gadget */
791 				schedule_delayed_work(
792 					&((struct fsl_otg *)dev_id)->otg_event,
793 					100);
794 			} else {	/* switch to host */
795 				cancel_delayed_work(&
796 						    ((struct fsl_otg *)dev_id)->
797 						    otg_event);
798 				fsl_otg_start_gadget(fsm, 0);
799 				otg_drv_vbus(fsm, 1);
800 				fsl_otg_start_host(fsm, 1);
801 			}
802 			return IRQ_HANDLED;
803 		}
804 	}
805 	return IRQ_NONE;
806 }
807 
808 static struct otg_fsm_ops fsl_otg_ops = {
809 	.chrg_vbus = fsl_otg_chrg_vbus,
810 	.drv_vbus = fsl_otg_drv_vbus,
811 	.loc_conn = fsl_otg_loc_conn,
812 	.loc_sof = fsl_otg_loc_sof,
813 	.start_pulse = fsl_otg_start_pulse,
814 
815 	.add_timer = fsl_otg_fsm_add_timer,
816 	.del_timer = fsl_otg_fsm_del_timer,
817 
818 	.start_host = fsl_otg_start_host,
819 	.start_gadget = fsl_otg_start_gadget,
820 };
821 
822 /* Initialize the global variable fsl_otg_dev and request IRQ for OTG */
823 static int fsl_otg_conf(struct platform_device *pdev)
824 {
825 	struct fsl_otg *fsl_otg_tc;
826 	int status;
827 
828 	if (fsl_otg_dev)
829 		return 0;
830 
831 	/* allocate space to fsl otg device */
832 	fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL);
833 	if (!fsl_otg_tc)
834 		return -ENOMEM;
835 
836 	fsl_otg_tc->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
837 	if (!fsl_otg_tc->phy.otg) {
838 		kfree(fsl_otg_tc);
839 		return -ENOMEM;
840 	}
841 
842 	INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event);
843 
844 	INIT_LIST_HEAD(&active_timers);
845 	status = fsl_otg_init_timers(&fsl_otg_tc->fsm);
846 	if (status) {
847 		pr_info("Couldn't init OTG timers\n");
848 		goto err;
849 	}
850 	mutex_init(&fsl_otg_tc->fsm.lock);
851 
852 	/* Set OTG state machine operations */
853 	fsl_otg_tc->fsm.ops = &fsl_otg_ops;
854 
855 	/* initialize the otg structure */
856 	fsl_otg_tc->phy.label = DRIVER_DESC;
857 	fsl_otg_tc->phy.dev = &pdev->dev;
858 	fsl_otg_tc->phy.set_power = fsl_otg_set_power;
859 
860 	fsl_otg_tc->phy.otg->phy = &fsl_otg_tc->phy;
861 	fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host;
862 	fsl_otg_tc->phy.otg->set_peripheral = fsl_otg_set_peripheral;
863 	fsl_otg_tc->phy.otg->start_hnp = fsl_otg_start_hnp;
864 	fsl_otg_tc->phy.otg->start_srp = fsl_otg_start_srp;
865 
866 	fsl_otg_dev = fsl_otg_tc;
867 
868 	/* Store the otg transceiver */
869 	status = usb_add_phy(&fsl_otg_tc->phy, USB_PHY_TYPE_USB2);
870 	if (status) {
871 		pr_warn(FSL_OTG_NAME ": unable to register OTG transceiver.\n");
872 		goto err;
873 	}
874 
875 	return 0;
876 err:
877 	fsl_otg_uninit_timers();
878 	kfree(fsl_otg_tc->phy.otg);
879 	kfree(fsl_otg_tc);
880 	return status;
881 }
882 
883 /* OTG Initialization */
884 int usb_otg_start(struct platform_device *pdev)
885 {
886 	struct fsl_otg *p_otg;
887 	struct usb_phy *otg_trans = usb_get_phy(USB_PHY_TYPE_USB2);
888 	struct otg_fsm *fsm;
889 	int status;
890 	struct resource *res;
891 	u32 temp;
892 	struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
893 
894 	p_otg = container_of(otg_trans, struct fsl_otg, phy);
895 	fsm = &p_otg->fsm;
896 
897 	/* Initialize the state machine structure with default values */
898 	SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED);
899 	fsm->otg = p_otg->phy.otg;
900 
901 	/* We don't require predefined MEM/IRQ resource index */
902 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
903 	if (!res)
904 		return -ENXIO;
905 
906 	/* We don't request_mem_region here to enable resource sharing
907 	 * with host/device */
908 
909 	usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap));
910 	p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs;
911 	pdata->regs = (void *)usb_dr_regs;
912 
913 	if (pdata->init && pdata->init(pdev) != 0)
914 		return -EINVAL;
915 
916 	if (pdata->big_endian_mmio) {
917 		_fsl_readl = _fsl_readl_be;
918 		_fsl_writel = _fsl_writel_be;
919 	} else {
920 		_fsl_readl = _fsl_readl_le;
921 		_fsl_writel = _fsl_writel_le;
922 	}
923 
924 	/* request irq */
925 	p_otg->irq = platform_get_irq(pdev, 0);
926 	status = request_irq(p_otg->irq, fsl_otg_isr,
927 				IRQF_SHARED, driver_name, p_otg);
928 	if (status) {
929 		dev_dbg(p_otg->phy.dev, "can't get IRQ %d, error %d\n",
930 			p_otg->irq, status);
931 		iounmap(p_otg->dr_mem_map);
932 		kfree(p_otg->phy.otg);
933 		kfree(p_otg);
934 		return status;
935 	}
936 
937 	/* stop the controller */
938 	temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
939 	temp &= ~USB_CMD_RUN_STOP;
940 	fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
941 
942 	/* reset the controller */
943 	temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
944 	temp |= USB_CMD_CTRL_RESET;
945 	fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
946 
947 	/* wait reset completed */
948 	while (fsl_readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET)
949 		;
950 
951 	/* configure the VBUSHS as IDLE(both host and device) */
952 	temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0);
953 	fsl_writel(temp, &p_otg->dr_mem_map->usbmode);
954 
955 	/* configure PHY interface */
956 	temp = fsl_readl(&p_otg->dr_mem_map->portsc);
957 	temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW);
958 	switch (pdata->phy_mode) {
959 	case FSL_USB2_PHY_ULPI:
960 		temp |= PORTSC_PTS_ULPI;
961 		break;
962 	case FSL_USB2_PHY_UTMI_WIDE:
963 		temp |= PORTSC_PTW_16BIT;
964 		/* fall through */
965 	case FSL_USB2_PHY_UTMI:
966 		temp |= PORTSC_PTS_UTMI;
967 		/* fall through */
968 	default:
969 		break;
970 	}
971 	fsl_writel(temp, &p_otg->dr_mem_map->portsc);
972 
973 	if (pdata->have_sysif_regs) {
974 		/* configure control enable IO output, big endian register */
975 		temp = __raw_readl(&p_otg->dr_mem_map->control);
976 		temp |= USB_CTRL_IOENB;
977 		__raw_writel(temp, &p_otg->dr_mem_map->control);
978 	}
979 
980 	/* disable all interrupt and clear all OTGSC status */
981 	temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
982 	temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK;
983 	temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE;
984 	fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
985 
986 	/*
987 	 * The identification (id) input is FALSE when a Mini-A plug is inserted
988 	 * in the devices Mini-AB receptacle. Otherwise, this input is TRUE.
989 	 * Also: record initial state of ID pin
990 	 */
991 	if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) {
992 		p_otg->phy.state = OTG_STATE_UNDEFINED;
993 		p_otg->fsm.id = 1;
994 	} else {
995 		p_otg->phy.state = OTG_STATE_A_IDLE;
996 		p_otg->fsm.id = 0;
997 	}
998 
999 	pr_debug("initial ID pin=%d\n", p_otg->fsm.id);
1000 
1001 	/* enable OTG ID pin interrupt */
1002 	temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
1003 	temp |= OTGSC_INTR_USB_ID_EN;
1004 	temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN);
1005 	fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
1006 
1007 	return 0;
1008 }
1009 
1010 /*
1011  * state file in sysfs
1012  */
1013 static int show_fsl_usb2_otg_state(struct device *dev,
1014 				   struct device_attribute *attr, char *buf)
1015 {
1016 	struct otg_fsm *fsm = &fsl_otg_dev->fsm;
1017 	char *next = buf;
1018 	unsigned size = PAGE_SIZE;
1019 	int t;
1020 
1021 	mutex_lock(&fsm->lock);
1022 
1023 	/* basic driver infomation */
1024 	t = scnprintf(next, size,
1025 			DRIVER_DESC "\n" "fsl_usb2_otg version: %s\n\n",
1026 			DRIVER_VERSION);
1027 	size -= t;
1028 	next += t;
1029 
1030 	/* Registers */
1031 	t = scnprintf(next, size,
1032 			"OTGSC:   0x%08x\n"
1033 			"PORTSC:  0x%08x\n"
1034 			"USBMODE: 0x%08x\n"
1035 			"USBCMD:  0x%08x\n"
1036 			"USBSTS:  0x%08x\n"
1037 			"USBINTR: 0x%08x\n",
1038 			fsl_readl(&usb_dr_regs->otgsc),
1039 			fsl_readl(&usb_dr_regs->portsc),
1040 			fsl_readl(&usb_dr_regs->usbmode),
1041 			fsl_readl(&usb_dr_regs->usbcmd),
1042 			fsl_readl(&usb_dr_regs->usbsts),
1043 			fsl_readl(&usb_dr_regs->usbintr));
1044 	size -= t;
1045 	next += t;
1046 
1047 	/* State */
1048 	t = scnprintf(next, size,
1049 		      "OTG state: %s\n\n",
1050 		      usb_otg_state_string(fsl_otg_dev->phy.state));
1051 	size -= t;
1052 	next += t;
1053 
1054 	/* State Machine Variables */
1055 	t = scnprintf(next, size,
1056 			"a_bus_req: %d\n"
1057 			"b_bus_req: %d\n"
1058 			"a_bus_resume: %d\n"
1059 			"a_bus_suspend: %d\n"
1060 			"a_conn: %d\n"
1061 			"a_sess_vld: %d\n"
1062 			"a_srp_det: %d\n"
1063 			"a_vbus_vld: %d\n"
1064 			"b_bus_resume: %d\n"
1065 			"b_bus_suspend: %d\n"
1066 			"b_conn: %d\n"
1067 			"b_se0_srp: %d\n"
1068 			"b_ssend_srp: %d\n"
1069 			"b_sess_vld: %d\n"
1070 			"id: %d\n",
1071 			fsm->a_bus_req,
1072 			fsm->b_bus_req,
1073 			fsm->a_bus_resume,
1074 			fsm->a_bus_suspend,
1075 			fsm->a_conn,
1076 			fsm->a_sess_vld,
1077 			fsm->a_srp_det,
1078 			fsm->a_vbus_vld,
1079 			fsm->b_bus_resume,
1080 			fsm->b_bus_suspend,
1081 			fsm->b_conn,
1082 			fsm->b_se0_srp,
1083 			fsm->b_ssend_srp,
1084 			fsm->b_sess_vld,
1085 			fsm->id);
1086 	size -= t;
1087 	next += t;
1088 
1089 	mutex_unlock(&fsm->lock);
1090 
1091 	return PAGE_SIZE - size;
1092 }
1093 
1094 static DEVICE_ATTR(fsl_usb2_otg_state, S_IRUGO, show_fsl_usb2_otg_state, NULL);
1095 
1096 
1097 /* Char driver interface to control some OTG input */
1098 
1099 /*
1100  * Handle some ioctl command, such as get otg
1101  * status and set host suspend
1102  */
1103 static long fsl_otg_ioctl(struct file *file, unsigned int cmd,
1104 			  unsigned long arg)
1105 {
1106 	u32 retval = 0;
1107 
1108 	switch (cmd) {
1109 	case GET_OTG_STATUS:
1110 		retval = fsl_otg_dev->host_working;
1111 		break;
1112 
1113 	case SET_A_SUSPEND_REQ:
1114 		fsl_otg_dev->fsm.a_suspend_req_inf = arg;
1115 		break;
1116 
1117 	case SET_A_BUS_DROP:
1118 		fsl_otg_dev->fsm.a_bus_drop = arg;
1119 		break;
1120 
1121 	case SET_A_BUS_REQ:
1122 		fsl_otg_dev->fsm.a_bus_req = arg;
1123 		break;
1124 
1125 	case SET_B_BUS_REQ:
1126 		fsl_otg_dev->fsm.b_bus_req = arg;
1127 		break;
1128 
1129 	default:
1130 		break;
1131 	}
1132 
1133 	otg_statemachine(&fsl_otg_dev->fsm);
1134 
1135 	return retval;
1136 }
1137 
1138 static int fsl_otg_open(struct inode *inode, struct file *file)
1139 {
1140 	return 0;
1141 }
1142 
1143 static int fsl_otg_release(struct inode *inode, struct file *file)
1144 {
1145 	return 0;
1146 }
1147 
1148 static const struct file_operations otg_fops = {
1149 	.owner = THIS_MODULE,
1150 	.llseek = NULL,
1151 	.read = NULL,
1152 	.write = NULL,
1153 	.unlocked_ioctl = fsl_otg_ioctl,
1154 	.open = fsl_otg_open,
1155 	.release = fsl_otg_release,
1156 };
1157 
1158 static int fsl_otg_probe(struct platform_device *pdev)
1159 {
1160 	int ret;
1161 
1162 	if (!dev_get_platdata(&pdev->dev))
1163 		return -ENODEV;
1164 
1165 	/* configure the OTG */
1166 	ret = fsl_otg_conf(pdev);
1167 	if (ret) {
1168 		dev_err(&pdev->dev, "Couldn't configure OTG module\n");
1169 		return ret;
1170 	}
1171 
1172 	/* start OTG */
1173 	ret = usb_otg_start(pdev);
1174 	if (ret) {
1175 		dev_err(&pdev->dev, "Can't init FSL OTG device\n");
1176 		return ret;
1177 	}
1178 
1179 	ret = register_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME, &otg_fops);
1180 	if (ret) {
1181 		dev_err(&pdev->dev, "unable to register FSL OTG device\n");
1182 		return ret;
1183 	}
1184 
1185 	ret = device_create_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
1186 	if (ret)
1187 		dev_warn(&pdev->dev, "Can't register sysfs attribute\n");
1188 
1189 	return ret;
1190 }
1191 
1192 static int fsl_otg_remove(struct platform_device *pdev)
1193 {
1194 	struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
1195 
1196 	usb_remove_phy(&fsl_otg_dev->phy);
1197 	free_irq(fsl_otg_dev->irq, fsl_otg_dev);
1198 
1199 	iounmap((void *)usb_dr_regs);
1200 
1201 	fsl_otg_uninit_timers();
1202 	kfree(fsl_otg_dev->phy.otg);
1203 	kfree(fsl_otg_dev);
1204 
1205 	device_remove_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
1206 
1207 	unregister_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME);
1208 
1209 	if (pdata->exit)
1210 		pdata->exit(pdev);
1211 
1212 	return 0;
1213 }
1214 
1215 struct platform_driver fsl_otg_driver = {
1216 	.probe = fsl_otg_probe,
1217 	.remove = fsl_otg_remove,
1218 	.driver = {
1219 		.name = driver_name,
1220 		.owner = THIS_MODULE,
1221 	},
1222 };
1223 
1224 module_platform_driver(fsl_otg_driver);
1225 
1226 MODULE_DESCRIPTION(DRIVER_INFO);
1227 MODULE_AUTHOR(DRIVER_AUTHOR);
1228 MODULE_LICENSE("GPL");
1229