1 /* 2 * Copyright (C) 2007,2008 Freescale semiconductor, Inc. 3 * 4 * Author: Li Yang <LeoLi@freescale.com> 5 * Jerry Huang <Chang-Ming.Huang@freescale.com> 6 * 7 * Initialization based on code from Shlomi Gridish. 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, but 15 * WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 17 * General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License along 20 * with this program; if not, write to the Free Software Foundation, Inc., 21 * 675 Mass Ave, Cambridge, MA 02139, USA. 22 */ 23 24 #include <linux/module.h> 25 #include <linux/kernel.h> 26 #include <linux/delay.h> 27 #include <linux/slab.h> 28 #include <linux/proc_fs.h> 29 #include <linux/errno.h> 30 #include <linux/interrupt.h> 31 #include <linux/io.h> 32 #include <linux/timer.h> 33 #include <linux/usb.h> 34 #include <linux/device.h> 35 #include <linux/usb/ch9.h> 36 #include <linux/usb/gadget.h> 37 #include <linux/workqueue.h> 38 #include <linux/time.h> 39 #include <linux/fsl_devices.h> 40 #include <linux/platform_device.h> 41 #include <linux/uaccess.h> 42 43 #include <asm/unaligned.h> 44 45 #include "phy-fsl-usb.h" 46 47 #define DRIVER_VERSION "Rev. 1.55" 48 #define DRIVER_AUTHOR "Jerry Huang/Li Yang" 49 #define DRIVER_DESC "Freescale USB OTG Transceiver Driver" 50 #define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION 51 52 static const char driver_name[] = "fsl-usb2-otg"; 53 54 const pm_message_t otg_suspend_state = { 55 .event = 1, 56 }; 57 58 #define HA_DATA_PULSE 59 60 static struct usb_dr_mmap *usb_dr_regs; 61 static struct fsl_otg *fsl_otg_dev; 62 static int srp_wait_done; 63 64 /* FSM timers */ 65 struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr, 66 *b_ase0_brst_tmr, *b_se0_srp_tmr; 67 68 /* Driver specific timers */ 69 struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr, 70 *b_srp_wait_tmr, *a_wait_enum_tmr; 71 72 static struct list_head active_timers; 73 74 static struct fsl_otg_config fsl_otg_initdata = { 75 .otg_port = 1, 76 }; 77 78 #ifdef CONFIG_PPC32 79 static u32 _fsl_readl_be(const unsigned __iomem *p) 80 { 81 return in_be32(p); 82 } 83 84 static u32 _fsl_readl_le(const unsigned __iomem *p) 85 { 86 return in_le32(p); 87 } 88 89 static void _fsl_writel_be(u32 v, unsigned __iomem *p) 90 { 91 out_be32(p, v); 92 } 93 94 static void _fsl_writel_le(u32 v, unsigned __iomem *p) 95 { 96 out_le32(p, v); 97 } 98 99 static u32 (*_fsl_readl)(const unsigned __iomem *p); 100 static void (*_fsl_writel)(u32 v, unsigned __iomem *p); 101 102 #define fsl_readl(p) (*_fsl_readl)((p)) 103 #define fsl_writel(v, p) (*_fsl_writel)((v), (p)) 104 105 #else 106 #define fsl_readl(addr) readl(addr) 107 #define fsl_writel(val, addr) writel(val, addr) 108 #endif /* CONFIG_PPC32 */ 109 110 int write_ulpi(u8 addr, u8 data) 111 { 112 u32 temp; 113 114 temp = 0x60000000 | (addr << 16) | data; 115 fsl_writel(temp, &usb_dr_regs->ulpiview); 116 return 0; 117 } 118 119 /* -------------------------------------------------------------*/ 120 /* Operations that will be called from OTG Finite State Machine */ 121 122 /* Charge vbus for vbus pulsing in SRP */ 123 void fsl_otg_chrg_vbus(struct otg_fsm *fsm, int on) 124 { 125 u32 tmp; 126 127 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK; 128 129 if (on) 130 /* stop discharging, start charging */ 131 tmp = (tmp & ~OTGSC_CTRL_VBUS_DISCHARGE) | 132 OTGSC_CTRL_VBUS_CHARGE; 133 else 134 /* stop charging */ 135 tmp &= ~OTGSC_CTRL_VBUS_CHARGE; 136 137 fsl_writel(tmp, &usb_dr_regs->otgsc); 138 } 139 140 /* Discharge vbus through a resistor to ground */ 141 void fsl_otg_dischrg_vbus(int on) 142 { 143 u32 tmp; 144 145 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK; 146 147 if (on) 148 /* stop charging, start discharging */ 149 tmp = (tmp & ~OTGSC_CTRL_VBUS_CHARGE) | 150 OTGSC_CTRL_VBUS_DISCHARGE; 151 else 152 /* stop discharging */ 153 tmp &= ~OTGSC_CTRL_VBUS_DISCHARGE; 154 155 fsl_writel(tmp, &usb_dr_regs->otgsc); 156 } 157 158 /* A-device driver vbus, controlled through PP bit in PORTSC */ 159 void fsl_otg_drv_vbus(struct otg_fsm *fsm, int on) 160 { 161 u32 tmp; 162 163 if (on) { 164 tmp = fsl_readl(&usb_dr_regs->portsc) & ~PORTSC_W1C_BITS; 165 fsl_writel(tmp | PORTSC_PORT_POWER, &usb_dr_regs->portsc); 166 } else { 167 tmp = fsl_readl(&usb_dr_regs->portsc) & 168 ~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER; 169 fsl_writel(tmp, &usb_dr_regs->portsc); 170 } 171 } 172 173 /* 174 * Pull-up D+, signalling connect by periperal. Also used in 175 * data-line pulsing in SRP 176 */ 177 void fsl_otg_loc_conn(struct otg_fsm *fsm, int on) 178 { 179 u32 tmp; 180 181 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK; 182 183 if (on) 184 tmp |= OTGSC_CTRL_DATA_PULSING; 185 else 186 tmp &= ~OTGSC_CTRL_DATA_PULSING; 187 188 fsl_writel(tmp, &usb_dr_regs->otgsc); 189 } 190 191 /* 192 * Generate SOF by host. This is controlled through suspend/resume the 193 * port. In host mode, controller will automatically send SOF. 194 * Suspend will block the data on the port. 195 */ 196 void fsl_otg_loc_sof(struct otg_fsm *fsm, int on) 197 { 198 u32 tmp; 199 200 tmp = fsl_readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS; 201 if (on) 202 tmp |= PORTSC_PORT_FORCE_RESUME; 203 else 204 tmp |= PORTSC_PORT_SUSPEND; 205 206 fsl_writel(tmp, &fsl_otg_dev->dr_mem_map->portsc); 207 208 } 209 210 /* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */ 211 void fsl_otg_start_pulse(struct otg_fsm *fsm) 212 { 213 u32 tmp; 214 215 srp_wait_done = 0; 216 #ifdef HA_DATA_PULSE 217 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK; 218 tmp |= OTGSC_HA_DATA_PULSE; 219 fsl_writel(tmp, &usb_dr_regs->otgsc); 220 #else 221 fsl_otg_loc_conn(1); 222 #endif 223 224 fsl_otg_add_timer(fsm, b_data_pulse_tmr); 225 } 226 227 void b_data_pulse_end(unsigned long foo) 228 { 229 #ifdef HA_DATA_PULSE 230 #else 231 fsl_otg_loc_conn(0); 232 #endif 233 234 /* Do VBUS pulse after data pulse */ 235 fsl_otg_pulse_vbus(); 236 } 237 238 void fsl_otg_pulse_vbus(void) 239 { 240 srp_wait_done = 0; 241 fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 1); 242 /* start the timer to end vbus charge */ 243 fsl_otg_add_timer(&fsl_otg_dev->fsm, b_vbus_pulse_tmr); 244 } 245 246 void b_vbus_pulse_end(unsigned long foo) 247 { 248 fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 0); 249 250 /* 251 * As USB3300 using the same a_sess_vld and b_sess_vld voltage 252 * we need to discharge the bus for a while to distinguish 253 * residual voltage of vbus pulsing and A device pull up 254 */ 255 fsl_otg_dischrg_vbus(1); 256 fsl_otg_add_timer(&fsl_otg_dev->fsm, b_srp_wait_tmr); 257 } 258 259 void b_srp_end(unsigned long foo) 260 { 261 fsl_otg_dischrg_vbus(0); 262 srp_wait_done = 1; 263 264 if ((fsl_otg_dev->phy.otg->state == OTG_STATE_B_SRP_INIT) && 265 fsl_otg_dev->fsm.b_sess_vld) 266 fsl_otg_dev->fsm.b_srp_done = 1; 267 } 268 269 /* 270 * Workaround for a_host suspending too fast. When a_bus_req=0, 271 * a_host will start by SRP. It needs to set b_hnp_enable before 272 * actually suspending to start HNP 273 */ 274 void a_wait_enum(unsigned long foo) 275 { 276 VDBG("a_wait_enum timeout\n"); 277 if (!fsl_otg_dev->phy.otg->host->b_hnp_enable) 278 fsl_otg_add_timer(&fsl_otg_dev->fsm, a_wait_enum_tmr); 279 else 280 otg_statemachine(&fsl_otg_dev->fsm); 281 } 282 283 /* The timeout callback function to set time out bit */ 284 void set_tmout(unsigned long indicator) 285 { 286 *(int *)indicator = 1; 287 } 288 289 /* Initialize timers */ 290 int fsl_otg_init_timers(struct otg_fsm *fsm) 291 { 292 /* FSM used timers */ 293 a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE, 294 (unsigned long)&fsm->a_wait_vrise_tmout); 295 if (!a_wait_vrise_tmr) 296 return -ENOMEM; 297 298 a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON, 299 (unsigned long)&fsm->a_wait_bcon_tmout); 300 if (!a_wait_bcon_tmr) 301 return -ENOMEM; 302 303 a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS, 304 (unsigned long)&fsm->a_aidl_bdis_tmout); 305 if (!a_aidl_bdis_tmr) 306 return -ENOMEM; 307 308 b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST, 309 (unsigned long)&fsm->b_ase0_brst_tmout); 310 if (!b_ase0_brst_tmr) 311 return -ENOMEM; 312 313 b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP, 314 (unsigned long)&fsm->b_se0_srp); 315 if (!b_se0_srp_tmr) 316 return -ENOMEM; 317 318 b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL, 319 (unsigned long)&fsm->b_srp_done); 320 if (!b_srp_fail_tmr) 321 return -ENOMEM; 322 323 a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10, 324 (unsigned long)&fsm); 325 if (!a_wait_enum_tmr) 326 return -ENOMEM; 327 328 /* device driver used timers */ 329 b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0); 330 if (!b_srp_wait_tmr) 331 return -ENOMEM; 332 333 b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end, 334 TB_DATA_PLS, 0); 335 if (!b_data_pulse_tmr) 336 return -ENOMEM; 337 338 b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end, 339 TB_VBUS_PLS, 0); 340 if (!b_vbus_pulse_tmr) 341 return -ENOMEM; 342 343 return 0; 344 } 345 346 /* Uninitialize timers */ 347 void fsl_otg_uninit_timers(void) 348 { 349 /* FSM used timers */ 350 kfree(a_wait_vrise_tmr); 351 kfree(a_wait_bcon_tmr); 352 kfree(a_aidl_bdis_tmr); 353 kfree(b_ase0_brst_tmr); 354 kfree(b_se0_srp_tmr); 355 kfree(b_srp_fail_tmr); 356 kfree(a_wait_enum_tmr); 357 358 /* device driver used timers */ 359 kfree(b_srp_wait_tmr); 360 kfree(b_data_pulse_tmr); 361 kfree(b_vbus_pulse_tmr); 362 } 363 364 static struct fsl_otg_timer *fsl_otg_get_timer(enum otg_fsm_timer t) 365 { 366 struct fsl_otg_timer *timer; 367 368 /* REVISIT: use array of pointers to timers instead */ 369 switch (t) { 370 case A_WAIT_VRISE: 371 timer = a_wait_vrise_tmr; 372 break; 373 case A_WAIT_BCON: 374 timer = a_wait_vrise_tmr; 375 break; 376 case A_AIDL_BDIS: 377 timer = a_wait_vrise_tmr; 378 break; 379 case B_ASE0_BRST: 380 timer = a_wait_vrise_tmr; 381 break; 382 case B_SE0_SRP: 383 timer = a_wait_vrise_tmr; 384 break; 385 case B_SRP_FAIL: 386 timer = a_wait_vrise_tmr; 387 break; 388 case A_WAIT_ENUM: 389 timer = a_wait_vrise_tmr; 390 break; 391 default: 392 timer = NULL; 393 } 394 395 return timer; 396 } 397 398 /* Add timer to timer list */ 399 void fsl_otg_add_timer(struct otg_fsm *fsm, void *gtimer) 400 { 401 struct fsl_otg_timer *timer = gtimer; 402 struct fsl_otg_timer *tmp_timer; 403 404 /* 405 * Check if the timer is already in the active list, 406 * if so update timer count 407 */ 408 list_for_each_entry(tmp_timer, &active_timers, list) 409 if (tmp_timer == timer) { 410 timer->count = timer->expires; 411 return; 412 } 413 timer->count = timer->expires; 414 list_add_tail(&timer->list, &active_timers); 415 } 416 417 static void fsl_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t) 418 { 419 struct fsl_otg_timer *timer; 420 421 timer = fsl_otg_get_timer(t); 422 if (!timer) 423 return; 424 425 fsl_otg_add_timer(fsm, timer); 426 } 427 428 /* Remove timer from the timer list; clear timeout status */ 429 void fsl_otg_del_timer(struct otg_fsm *fsm, void *gtimer) 430 { 431 struct fsl_otg_timer *timer = gtimer; 432 struct fsl_otg_timer *tmp_timer, *del_tmp; 433 434 list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) 435 if (tmp_timer == timer) 436 list_del(&timer->list); 437 } 438 439 static void fsl_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t) 440 { 441 struct fsl_otg_timer *timer; 442 443 timer = fsl_otg_get_timer(t); 444 if (!timer) 445 return; 446 447 fsl_otg_del_timer(fsm, timer); 448 } 449 450 /* Reset controller, not reset the bus */ 451 void otg_reset_controller(void) 452 { 453 u32 command; 454 455 command = fsl_readl(&usb_dr_regs->usbcmd); 456 command |= (1 << 1); 457 fsl_writel(command, &usb_dr_regs->usbcmd); 458 while (fsl_readl(&usb_dr_regs->usbcmd) & (1 << 1)) 459 ; 460 } 461 462 /* Call suspend/resume routines in host driver */ 463 int fsl_otg_start_host(struct otg_fsm *fsm, int on) 464 { 465 struct usb_otg *otg = fsm->otg; 466 struct device *dev; 467 struct fsl_otg *otg_dev = 468 container_of(otg->usb_phy, struct fsl_otg, phy); 469 u32 retval = 0; 470 471 if (!otg->host) 472 return -ENODEV; 473 dev = otg->host->controller; 474 475 /* 476 * Update a_vbus_vld state as a_vbus_vld int is disabled 477 * in device mode 478 */ 479 fsm->a_vbus_vld = 480 !!(fsl_readl(&usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID); 481 if (on) { 482 /* start fsl usb host controller */ 483 if (otg_dev->host_working) 484 goto end; 485 else { 486 otg_reset_controller(); 487 VDBG("host on......\n"); 488 if (dev->driver->pm && dev->driver->pm->resume) { 489 retval = dev->driver->pm->resume(dev); 490 if (fsm->id) { 491 /* default-b */ 492 fsl_otg_drv_vbus(fsm, 1); 493 /* 494 * Workaround: b_host can't driver 495 * vbus, but PP in PORTSC needs to 496 * be 1 for host to work. 497 * So we set drv_vbus bit in 498 * transceiver to 0 thru ULPI. 499 */ 500 write_ulpi(0x0c, 0x20); 501 } 502 } 503 504 otg_dev->host_working = 1; 505 } 506 } else { 507 /* stop fsl usb host controller */ 508 if (!otg_dev->host_working) 509 goto end; 510 else { 511 VDBG("host off......\n"); 512 if (dev && dev->driver) { 513 if (dev->driver->pm && dev->driver->pm->suspend) 514 retval = dev->driver->pm->suspend(dev); 515 if (fsm->id) 516 /* default-b */ 517 fsl_otg_drv_vbus(fsm, 0); 518 } 519 otg_dev->host_working = 0; 520 } 521 } 522 end: 523 return retval; 524 } 525 526 /* 527 * Call suspend and resume function in udc driver 528 * to stop and start udc driver. 529 */ 530 int fsl_otg_start_gadget(struct otg_fsm *fsm, int on) 531 { 532 struct usb_otg *otg = fsm->otg; 533 struct device *dev; 534 535 if (!otg->gadget || !otg->gadget->dev.parent) 536 return -ENODEV; 537 538 VDBG("gadget %s\n", on ? "on" : "off"); 539 dev = otg->gadget->dev.parent; 540 541 if (on) { 542 if (dev->driver->resume) 543 dev->driver->resume(dev); 544 } else { 545 if (dev->driver->suspend) 546 dev->driver->suspend(dev, otg_suspend_state); 547 } 548 549 return 0; 550 } 551 552 /* 553 * Called by initialization code of host driver. Register host controller 554 * to the OTG. Suspend host for OTG role detection. 555 */ 556 static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host) 557 { 558 struct fsl_otg *otg_dev; 559 560 if (!otg) 561 return -ENODEV; 562 563 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); 564 if (otg_dev != fsl_otg_dev) 565 return -ENODEV; 566 567 otg->host = host; 568 569 otg_dev->fsm.a_bus_drop = 0; 570 otg_dev->fsm.a_bus_req = 1; 571 572 if (host) { 573 VDBG("host off......\n"); 574 575 otg->host->otg_port = fsl_otg_initdata.otg_port; 576 otg->host->is_b_host = otg_dev->fsm.id; 577 /* 578 * must leave time for hub_wq to finish its thing 579 * before yanking the host driver out from under it, 580 * so suspend the host after a short delay. 581 */ 582 otg_dev->host_working = 1; 583 schedule_delayed_work(&otg_dev->otg_event, 100); 584 return 0; 585 } else { 586 /* host driver going away */ 587 if (!(fsl_readl(&otg_dev->dr_mem_map->otgsc) & 588 OTGSC_STS_USB_ID)) { 589 /* Mini-A cable connected */ 590 struct otg_fsm *fsm = &otg_dev->fsm; 591 592 otg->state = OTG_STATE_UNDEFINED; 593 fsm->protocol = PROTO_UNDEF; 594 } 595 } 596 597 otg_dev->host_working = 0; 598 599 otg_statemachine(&otg_dev->fsm); 600 601 return 0; 602 } 603 604 /* Called by initialization code of udc. Register udc to OTG. */ 605 static int fsl_otg_set_peripheral(struct usb_otg *otg, 606 struct usb_gadget *gadget) 607 { 608 struct fsl_otg *otg_dev; 609 610 if (!otg) 611 return -ENODEV; 612 613 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); 614 VDBG("otg_dev 0x%x\n", (int)otg_dev); 615 VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev); 616 if (otg_dev != fsl_otg_dev) 617 return -ENODEV; 618 619 if (!gadget) { 620 if (!otg->default_a) 621 otg->gadget->ops->vbus_draw(otg->gadget, 0); 622 usb_gadget_vbus_disconnect(otg->gadget); 623 otg->gadget = 0; 624 otg_dev->fsm.b_bus_req = 0; 625 otg_statemachine(&otg_dev->fsm); 626 return 0; 627 } 628 629 otg->gadget = gadget; 630 otg->gadget->is_a_peripheral = !otg_dev->fsm.id; 631 632 otg_dev->fsm.b_bus_req = 1; 633 634 /* start the gadget right away if the ID pin says Mini-B */ 635 pr_debug("ID pin=%d\n", otg_dev->fsm.id); 636 if (otg_dev->fsm.id == 1) { 637 fsl_otg_start_host(&otg_dev->fsm, 0); 638 otg_drv_vbus(&otg_dev->fsm, 0); 639 fsl_otg_start_gadget(&otg_dev->fsm, 1); 640 } 641 642 return 0; 643 } 644 645 /* 646 * Delayed pin detect interrupt processing. 647 * 648 * When the Mini-A cable is disconnected from the board, 649 * the pin-detect interrupt happens before the disconnect 650 * interrupts for the connected device(s). In order to 651 * process the disconnect interrupt(s) prior to switching 652 * roles, the pin-detect interrupts are delayed, and handled 653 * by this routine. 654 */ 655 static void fsl_otg_event(struct work_struct *work) 656 { 657 struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work); 658 struct otg_fsm *fsm = &og->fsm; 659 660 if (fsm->id) { /* switch to gadget */ 661 fsl_otg_start_host(fsm, 0); 662 otg_drv_vbus(fsm, 0); 663 fsl_otg_start_gadget(fsm, 1); 664 } 665 } 666 667 /* B-device start SRP */ 668 static int fsl_otg_start_srp(struct usb_otg *otg) 669 { 670 struct fsl_otg *otg_dev; 671 672 if (!otg || otg->state != OTG_STATE_B_IDLE) 673 return -ENODEV; 674 675 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); 676 if (otg_dev != fsl_otg_dev) 677 return -ENODEV; 678 679 otg_dev->fsm.b_bus_req = 1; 680 otg_statemachine(&otg_dev->fsm); 681 682 return 0; 683 } 684 685 /* A_host suspend will call this function to start hnp */ 686 static int fsl_otg_start_hnp(struct usb_otg *otg) 687 { 688 struct fsl_otg *otg_dev; 689 690 if (!otg) 691 return -ENODEV; 692 693 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); 694 if (otg_dev != fsl_otg_dev) 695 return -ENODEV; 696 697 pr_debug("start_hnp...\n"); 698 699 /* clear a_bus_req to enter a_suspend state */ 700 otg_dev->fsm.a_bus_req = 0; 701 otg_statemachine(&otg_dev->fsm); 702 703 return 0; 704 } 705 706 /* 707 * Interrupt handler. OTG/host/peripheral share the same int line. 708 * OTG driver clears OTGSC interrupts and leaves USB interrupts 709 * intact. It needs to have knowledge of some USB interrupts 710 * such as port change. 711 */ 712 irqreturn_t fsl_otg_isr(int irq, void *dev_id) 713 { 714 struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm; 715 struct usb_otg *otg = ((struct fsl_otg *)dev_id)->phy.otg; 716 u32 otg_int_src, otg_sc; 717 718 otg_sc = fsl_readl(&usb_dr_regs->otgsc); 719 otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8); 720 721 /* Only clear otg interrupts */ 722 fsl_writel(otg_sc, &usb_dr_regs->otgsc); 723 724 /*FIXME: ID change not generate when init to 0 */ 725 fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0; 726 otg->default_a = (fsm->id == 0); 727 728 /* process OTG interrupts */ 729 if (otg_int_src) { 730 if (otg_int_src & OTGSC_INTSTS_USB_ID) { 731 fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0; 732 otg->default_a = (fsm->id == 0); 733 /* clear conn information */ 734 if (fsm->id) 735 fsm->b_conn = 0; 736 else 737 fsm->a_conn = 0; 738 739 if (otg->host) 740 otg->host->is_b_host = fsm->id; 741 if (otg->gadget) 742 otg->gadget->is_a_peripheral = !fsm->id; 743 VDBG("ID int (ID is %d)\n", fsm->id); 744 745 if (fsm->id) { /* switch to gadget */ 746 schedule_delayed_work( 747 &((struct fsl_otg *)dev_id)->otg_event, 748 100); 749 } else { /* switch to host */ 750 cancel_delayed_work(& 751 ((struct fsl_otg *)dev_id)-> 752 otg_event); 753 fsl_otg_start_gadget(fsm, 0); 754 otg_drv_vbus(fsm, 1); 755 fsl_otg_start_host(fsm, 1); 756 } 757 return IRQ_HANDLED; 758 } 759 } 760 return IRQ_NONE; 761 } 762 763 static struct otg_fsm_ops fsl_otg_ops = { 764 .chrg_vbus = fsl_otg_chrg_vbus, 765 .drv_vbus = fsl_otg_drv_vbus, 766 .loc_conn = fsl_otg_loc_conn, 767 .loc_sof = fsl_otg_loc_sof, 768 .start_pulse = fsl_otg_start_pulse, 769 770 .add_timer = fsl_otg_fsm_add_timer, 771 .del_timer = fsl_otg_fsm_del_timer, 772 773 .start_host = fsl_otg_start_host, 774 .start_gadget = fsl_otg_start_gadget, 775 }; 776 777 /* Initialize the global variable fsl_otg_dev and request IRQ for OTG */ 778 static int fsl_otg_conf(struct platform_device *pdev) 779 { 780 struct fsl_otg *fsl_otg_tc; 781 int status; 782 783 if (fsl_otg_dev) 784 return 0; 785 786 /* allocate space to fsl otg device */ 787 fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL); 788 if (!fsl_otg_tc) 789 return -ENOMEM; 790 791 fsl_otg_tc->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL); 792 if (!fsl_otg_tc->phy.otg) { 793 kfree(fsl_otg_tc); 794 return -ENOMEM; 795 } 796 797 INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event); 798 799 INIT_LIST_HEAD(&active_timers); 800 status = fsl_otg_init_timers(&fsl_otg_tc->fsm); 801 if (status) { 802 pr_info("Couldn't init OTG timers\n"); 803 goto err; 804 } 805 mutex_init(&fsl_otg_tc->fsm.lock); 806 807 /* Set OTG state machine operations */ 808 fsl_otg_tc->fsm.ops = &fsl_otg_ops; 809 810 /* initialize the otg structure */ 811 fsl_otg_tc->phy.label = DRIVER_DESC; 812 fsl_otg_tc->phy.dev = &pdev->dev; 813 814 fsl_otg_tc->phy.otg->usb_phy = &fsl_otg_tc->phy; 815 fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host; 816 fsl_otg_tc->phy.otg->set_peripheral = fsl_otg_set_peripheral; 817 fsl_otg_tc->phy.otg->start_hnp = fsl_otg_start_hnp; 818 fsl_otg_tc->phy.otg->start_srp = fsl_otg_start_srp; 819 820 fsl_otg_dev = fsl_otg_tc; 821 822 /* Store the otg transceiver */ 823 status = usb_add_phy(&fsl_otg_tc->phy, USB_PHY_TYPE_USB2); 824 if (status) { 825 pr_warn(FSL_OTG_NAME ": unable to register OTG transceiver.\n"); 826 goto err; 827 } 828 829 return 0; 830 err: 831 fsl_otg_uninit_timers(); 832 kfree(fsl_otg_tc->phy.otg); 833 kfree(fsl_otg_tc); 834 return status; 835 } 836 837 /* OTG Initialization */ 838 int usb_otg_start(struct platform_device *pdev) 839 { 840 struct fsl_otg *p_otg; 841 struct usb_phy *otg_trans = usb_get_phy(USB_PHY_TYPE_USB2); 842 struct otg_fsm *fsm; 843 int status; 844 struct resource *res; 845 u32 temp; 846 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev); 847 848 p_otg = container_of(otg_trans, struct fsl_otg, phy); 849 fsm = &p_otg->fsm; 850 851 /* Initialize the state machine structure with default values */ 852 SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED); 853 fsm->otg = p_otg->phy.otg; 854 855 /* We don't require predefined MEM/IRQ resource index */ 856 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 857 if (!res) 858 return -ENXIO; 859 860 /* We don't request_mem_region here to enable resource sharing 861 * with host/device */ 862 863 usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap)); 864 p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs; 865 pdata->regs = (void *)usb_dr_regs; 866 867 if (pdata->init && pdata->init(pdev) != 0) 868 return -EINVAL; 869 870 if (pdata->big_endian_mmio) { 871 _fsl_readl = _fsl_readl_be; 872 _fsl_writel = _fsl_writel_be; 873 } else { 874 _fsl_readl = _fsl_readl_le; 875 _fsl_writel = _fsl_writel_le; 876 } 877 878 /* request irq */ 879 p_otg->irq = platform_get_irq(pdev, 0); 880 status = request_irq(p_otg->irq, fsl_otg_isr, 881 IRQF_SHARED, driver_name, p_otg); 882 if (status) { 883 dev_dbg(p_otg->phy.dev, "can't get IRQ %d, error %d\n", 884 p_otg->irq, status); 885 iounmap(p_otg->dr_mem_map); 886 kfree(p_otg->phy.otg); 887 kfree(p_otg); 888 return status; 889 } 890 891 /* stop the controller */ 892 temp = fsl_readl(&p_otg->dr_mem_map->usbcmd); 893 temp &= ~USB_CMD_RUN_STOP; 894 fsl_writel(temp, &p_otg->dr_mem_map->usbcmd); 895 896 /* reset the controller */ 897 temp = fsl_readl(&p_otg->dr_mem_map->usbcmd); 898 temp |= USB_CMD_CTRL_RESET; 899 fsl_writel(temp, &p_otg->dr_mem_map->usbcmd); 900 901 /* wait reset completed */ 902 while (fsl_readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET) 903 ; 904 905 /* configure the VBUSHS as IDLE(both host and device) */ 906 temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0); 907 fsl_writel(temp, &p_otg->dr_mem_map->usbmode); 908 909 /* configure PHY interface */ 910 temp = fsl_readl(&p_otg->dr_mem_map->portsc); 911 temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW); 912 switch (pdata->phy_mode) { 913 case FSL_USB2_PHY_ULPI: 914 temp |= PORTSC_PTS_ULPI; 915 break; 916 case FSL_USB2_PHY_UTMI_WIDE: 917 temp |= PORTSC_PTW_16BIT; 918 /* fall through */ 919 case FSL_USB2_PHY_UTMI: 920 temp |= PORTSC_PTS_UTMI; 921 /* fall through */ 922 default: 923 break; 924 } 925 fsl_writel(temp, &p_otg->dr_mem_map->portsc); 926 927 if (pdata->have_sysif_regs) { 928 /* configure control enable IO output, big endian register */ 929 temp = __raw_readl(&p_otg->dr_mem_map->control); 930 temp |= USB_CTRL_IOENB; 931 __raw_writel(temp, &p_otg->dr_mem_map->control); 932 } 933 934 /* disable all interrupt and clear all OTGSC status */ 935 temp = fsl_readl(&p_otg->dr_mem_map->otgsc); 936 temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK; 937 temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE; 938 fsl_writel(temp, &p_otg->dr_mem_map->otgsc); 939 940 /* 941 * The identification (id) input is FALSE when a Mini-A plug is inserted 942 * in the devices Mini-AB receptacle. Otherwise, this input is TRUE. 943 * Also: record initial state of ID pin 944 */ 945 if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) { 946 p_otg->phy.otg->state = OTG_STATE_UNDEFINED; 947 p_otg->fsm.id = 1; 948 } else { 949 p_otg->phy.otg->state = OTG_STATE_A_IDLE; 950 p_otg->fsm.id = 0; 951 } 952 953 pr_debug("initial ID pin=%d\n", p_otg->fsm.id); 954 955 /* enable OTG ID pin interrupt */ 956 temp = fsl_readl(&p_otg->dr_mem_map->otgsc); 957 temp |= OTGSC_INTR_USB_ID_EN; 958 temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN); 959 fsl_writel(temp, &p_otg->dr_mem_map->otgsc); 960 961 return 0; 962 } 963 964 /* 965 * state file in sysfs 966 */ 967 static int show_fsl_usb2_otg_state(struct device *dev, 968 struct device_attribute *attr, char *buf) 969 { 970 struct otg_fsm *fsm = &fsl_otg_dev->fsm; 971 char *next = buf; 972 unsigned size = PAGE_SIZE; 973 int t; 974 975 mutex_lock(&fsm->lock); 976 977 /* basic driver infomation */ 978 t = scnprintf(next, size, 979 DRIVER_DESC "\n" "fsl_usb2_otg version: %s\n\n", 980 DRIVER_VERSION); 981 size -= t; 982 next += t; 983 984 /* Registers */ 985 t = scnprintf(next, size, 986 "OTGSC: 0x%08x\n" 987 "PORTSC: 0x%08x\n" 988 "USBMODE: 0x%08x\n" 989 "USBCMD: 0x%08x\n" 990 "USBSTS: 0x%08x\n" 991 "USBINTR: 0x%08x\n", 992 fsl_readl(&usb_dr_regs->otgsc), 993 fsl_readl(&usb_dr_regs->portsc), 994 fsl_readl(&usb_dr_regs->usbmode), 995 fsl_readl(&usb_dr_regs->usbcmd), 996 fsl_readl(&usb_dr_regs->usbsts), 997 fsl_readl(&usb_dr_regs->usbintr)); 998 size -= t; 999 next += t; 1000 1001 /* State */ 1002 t = scnprintf(next, size, 1003 "OTG state: %s\n\n", 1004 usb_otg_state_string(fsl_otg_dev->phy.otg->state)); 1005 size -= t; 1006 next += t; 1007 1008 /* State Machine Variables */ 1009 t = scnprintf(next, size, 1010 "a_bus_req: %d\n" 1011 "b_bus_req: %d\n" 1012 "a_bus_resume: %d\n" 1013 "a_bus_suspend: %d\n" 1014 "a_conn: %d\n" 1015 "a_sess_vld: %d\n" 1016 "a_srp_det: %d\n" 1017 "a_vbus_vld: %d\n" 1018 "b_bus_resume: %d\n" 1019 "b_bus_suspend: %d\n" 1020 "b_conn: %d\n" 1021 "b_se0_srp: %d\n" 1022 "b_ssend_srp: %d\n" 1023 "b_sess_vld: %d\n" 1024 "id: %d\n", 1025 fsm->a_bus_req, 1026 fsm->b_bus_req, 1027 fsm->a_bus_resume, 1028 fsm->a_bus_suspend, 1029 fsm->a_conn, 1030 fsm->a_sess_vld, 1031 fsm->a_srp_det, 1032 fsm->a_vbus_vld, 1033 fsm->b_bus_resume, 1034 fsm->b_bus_suspend, 1035 fsm->b_conn, 1036 fsm->b_se0_srp, 1037 fsm->b_ssend_srp, 1038 fsm->b_sess_vld, 1039 fsm->id); 1040 size -= t; 1041 next += t; 1042 1043 mutex_unlock(&fsm->lock); 1044 1045 return PAGE_SIZE - size; 1046 } 1047 1048 static DEVICE_ATTR(fsl_usb2_otg_state, S_IRUGO, show_fsl_usb2_otg_state, NULL); 1049 1050 1051 /* Char driver interface to control some OTG input */ 1052 1053 /* 1054 * Handle some ioctl command, such as get otg 1055 * status and set host suspend 1056 */ 1057 static long fsl_otg_ioctl(struct file *file, unsigned int cmd, 1058 unsigned long arg) 1059 { 1060 u32 retval = 0; 1061 1062 switch (cmd) { 1063 case GET_OTG_STATUS: 1064 retval = fsl_otg_dev->host_working; 1065 break; 1066 1067 case SET_A_SUSPEND_REQ: 1068 fsl_otg_dev->fsm.a_suspend_req_inf = arg; 1069 break; 1070 1071 case SET_A_BUS_DROP: 1072 fsl_otg_dev->fsm.a_bus_drop = arg; 1073 break; 1074 1075 case SET_A_BUS_REQ: 1076 fsl_otg_dev->fsm.a_bus_req = arg; 1077 break; 1078 1079 case SET_B_BUS_REQ: 1080 fsl_otg_dev->fsm.b_bus_req = arg; 1081 break; 1082 1083 default: 1084 break; 1085 } 1086 1087 otg_statemachine(&fsl_otg_dev->fsm); 1088 1089 return retval; 1090 } 1091 1092 static int fsl_otg_open(struct inode *inode, struct file *file) 1093 { 1094 return 0; 1095 } 1096 1097 static int fsl_otg_release(struct inode *inode, struct file *file) 1098 { 1099 return 0; 1100 } 1101 1102 static const struct file_operations otg_fops = { 1103 .owner = THIS_MODULE, 1104 .llseek = NULL, 1105 .read = NULL, 1106 .write = NULL, 1107 .unlocked_ioctl = fsl_otg_ioctl, 1108 .open = fsl_otg_open, 1109 .release = fsl_otg_release, 1110 }; 1111 1112 static int fsl_otg_probe(struct platform_device *pdev) 1113 { 1114 int ret; 1115 1116 if (!dev_get_platdata(&pdev->dev)) 1117 return -ENODEV; 1118 1119 /* configure the OTG */ 1120 ret = fsl_otg_conf(pdev); 1121 if (ret) { 1122 dev_err(&pdev->dev, "Couldn't configure OTG module\n"); 1123 return ret; 1124 } 1125 1126 /* start OTG */ 1127 ret = usb_otg_start(pdev); 1128 if (ret) { 1129 dev_err(&pdev->dev, "Can't init FSL OTG device\n"); 1130 return ret; 1131 } 1132 1133 ret = register_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME, &otg_fops); 1134 if (ret) { 1135 dev_err(&pdev->dev, "unable to register FSL OTG device\n"); 1136 return ret; 1137 } 1138 1139 ret = device_create_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state); 1140 if (ret) 1141 dev_warn(&pdev->dev, "Can't register sysfs attribute\n"); 1142 1143 return ret; 1144 } 1145 1146 static int fsl_otg_remove(struct platform_device *pdev) 1147 { 1148 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev); 1149 1150 usb_remove_phy(&fsl_otg_dev->phy); 1151 free_irq(fsl_otg_dev->irq, fsl_otg_dev); 1152 1153 iounmap((void *)usb_dr_regs); 1154 1155 fsl_otg_uninit_timers(); 1156 kfree(fsl_otg_dev->phy.otg); 1157 kfree(fsl_otg_dev); 1158 1159 device_remove_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state); 1160 1161 unregister_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME); 1162 1163 if (pdata->exit) 1164 pdata->exit(pdev); 1165 1166 return 0; 1167 } 1168 1169 struct platform_driver fsl_otg_driver = { 1170 .probe = fsl_otg_probe, 1171 .remove = fsl_otg_remove, 1172 .driver = { 1173 .name = driver_name, 1174 .owner = THIS_MODULE, 1175 }, 1176 }; 1177 1178 module_platform_driver(fsl_otg_driver); 1179 1180 MODULE_DESCRIPTION(DRIVER_INFO); 1181 MODULE_AUTHOR(DRIVER_AUTHOR); 1182 MODULE_LICENSE("GPL"); 1183