18dcc8f72SMian Yousaf Kaukab /* 28dcc8f72SMian Yousaf Kaukab * drivers/usb/musb/ux500_dma.c 38dcc8f72SMian Yousaf Kaukab * 48dcc8f72SMian Yousaf Kaukab * U8500 and U5500 DMA support code 58dcc8f72SMian Yousaf Kaukab * 68dcc8f72SMian Yousaf Kaukab * Copyright (C) 2009 STMicroelectronics 78dcc8f72SMian Yousaf Kaukab * Copyright (C) 2011 ST-Ericsson SA 88dcc8f72SMian Yousaf Kaukab * Authors: 98dcc8f72SMian Yousaf Kaukab * Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com> 108dcc8f72SMian Yousaf Kaukab * Praveena Nadahally <praveen.nadahally@stericsson.com> 118dcc8f72SMian Yousaf Kaukab * Rajaram Regupathy <ragupathy.rajaram@stericsson.com> 128dcc8f72SMian Yousaf Kaukab * 138dcc8f72SMian Yousaf Kaukab * This program is free software: you can redistribute it and/or modify 148dcc8f72SMian Yousaf Kaukab * it under the terms of the GNU General Public License as published by 158dcc8f72SMian Yousaf Kaukab * the Free Software Foundation, either version 2 of the License, or 168dcc8f72SMian Yousaf Kaukab * (at your option) any later version. 178dcc8f72SMian Yousaf Kaukab * 188dcc8f72SMian Yousaf Kaukab * This program is distributed in the hope that it will be useful, 198dcc8f72SMian Yousaf Kaukab * but WITHOUT ANY WARRANTY; without even the implied warranty of 208dcc8f72SMian Yousaf Kaukab * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 218dcc8f72SMian Yousaf Kaukab * GNU General Public License for more details. 228dcc8f72SMian Yousaf Kaukab * 238dcc8f72SMian Yousaf Kaukab * You should have received a copy of the GNU General Public License 248dcc8f72SMian Yousaf Kaukab * along with this program. If not, see <http://www.gnu.org/licenses/>. 258dcc8f72SMian Yousaf Kaukab */ 268dcc8f72SMian Yousaf Kaukab 278dcc8f72SMian Yousaf Kaukab #include <linux/device.h> 288dcc8f72SMian Yousaf Kaukab #include <linux/interrupt.h> 298dcc8f72SMian Yousaf Kaukab #include <linux/platform_device.h> 308dcc8f72SMian Yousaf Kaukab #include <linux/dma-mapping.h> 318dcc8f72SMian Yousaf Kaukab #include <linux/dmaengine.h> 328dcc8f72SMian Yousaf Kaukab #include <linux/pfn.h> 330f53e481SFelipe Balbi #include <linux/sizes.h> 34db298da2SArnd Bergmann #include <linux/platform_data/usb-musb-ux500.h> 358dcc8f72SMian Yousaf Kaukab #include "musb_core.h" 368dcc8f72SMian Yousaf Kaukab 378dcc8f72SMian Yousaf Kaukab struct ux500_dma_channel { 388dcc8f72SMian Yousaf Kaukab struct dma_channel channel; 398dcc8f72SMian Yousaf Kaukab struct ux500_dma_controller *controller; 408dcc8f72SMian Yousaf Kaukab struct musb_hw_ep *hw_ep; 418dcc8f72SMian Yousaf Kaukab struct dma_chan *dma_chan; 428dcc8f72SMian Yousaf Kaukab unsigned int cur_len; 438dcc8f72SMian Yousaf Kaukab dma_cookie_t cookie; 448dcc8f72SMian Yousaf Kaukab u8 ch_num; 458dcc8f72SMian Yousaf Kaukab u8 is_tx; 468dcc8f72SMian Yousaf Kaukab u8 is_allocated; 478dcc8f72SMian Yousaf Kaukab }; 488dcc8f72SMian Yousaf Kaukab 498dcc8f72SMian Yousaf Kaukab struct ux500_dma_controller { 508dcc8f72SMian Yousaf Kaukab struct dma_controller controller; 518dcc8f72SMian Yousaf Kaukab struct ux500_dma_channel rx_channel[UX500_MUSB_DMA_NUM_RX_CHANNELS]; 528dcc8f72SMian Yousaf Kaukab struct ux500_dma_channel tx_channel[UX500_MUSB_DMA_NUM_TX_CHANNELS]; 538dcc8f72SMian Yousaf Kaukab u32 num_rx_channels; 548dcc8f72SMian Yousaf Kaukab u32 num_tx_channels; 558dcc8f72SMian Yousaf Kaukab void *private_data; 568dcc8f72SMian Yousaf Kaukab dma_addr_t phy_base; 578dcc8f72SMian Yousaf Kaukab }; 588dcc8f72SMian Yousaf Kaukab 598dcc8f72SMian Yousaf Kaukab /* Work function invoked from DMA callback to handle rx transfers. */ 60be18a251SPer Forlin void ux500_dma_callback(void *private_data) 618dcc8f72SMian Yousaf Kaukab { 62be18a251SPer Forlin struct dma_channel *channel = private_data; 63be18a251SPer Forlin struct ux500_dma_channel *ux500_channel = channel->private_data; 648dcc8f72SMian Yousaf Kaukab struct musb_hw_ep *hw_ep = ux500_channel->hw_ep; 658dcc8f72SMian Yousaf Kaukab struct musb *musb = hw_ep->musb; 668dcc8f72SMian Yousaf Kaukab unsigned long flags; 678dcc8f72SMian Yousaf Kaukab 68afbd0749SPer Forlin dev_dbg(musb->controller, "DMA rx transfer done on hw_ep=%d\n", 69afbd0749SPer Forlin hw_ep->epnum); 708dcc8f72SMian Yousaf Kaukab 718dcc8f72SMian Yousaf Kaukab spin_lock_irqsave(&musb->lock, flags); 728dcc8f72SMian Yousaf Kaukab ux500_channel->channel.actual_len = ux500_channel->cur_len; 738dcc8f72SMian Yousaf Kaukab ux500_channel->channel.status = MUSB_DMA_STATUS_FREE; 748dcc8f72SMian Yousaf Kaukab musb_dma_completion(musb, hw_ep->epnum, 758dcc8f72SMian Yousaf Kaukab ux500_channel->is_tx); 768dcc8f72SMian Yousaf Kaukab spin_unlock_irqrestore(&musb->lock, flags); 778dcc8f72SMian Yousaf Kaukab 788dcc8f72SMian Yousaf Kaukab } 798dcc8f72SMian Yousaf Kaukab 808dcc8f72SMian Yousaf Kaukab static bool ux500_configure_channel(struct dma_channel *channel, 818dcc8f72SMian Yousaf Kaukab u16 packet_sz, u8 mode, 828dcc8f72SMian Yousaf Kaukab dma_addr_t dma_addr, u32 len) 838dcc8f72SMian Yousaf Kaukab { 848dcc8f72SMian Yousaf Kaukab struct ux500_dma_channel *ux500_channel = channel->private_data; 858dcc8f72SMian Yousaf Kaukab struct musb_hw_ep *hw_ep = ux500_channel->hw_ep; 868dcc8f72SMian Yousaf Kaukab struct dma_chan *dma_chan = ux500_channel->dma_chan; 878dcc8f72SMian Yousaf Kaukab struct dma_async_tx_descriptor *dma_desc; 888341544cSVinod Koul enum dma_transfer_direction direction; 898dcc8f72SMian Yousaf Kaukab struct scatterlist sg; 908dcc8f72SMian Yousaf Kaukab struct dma_slave_config slave_conf; 918dcc8f72SMian Yousaf Kaukab enum dma_slave_buswidth addr_width; 928dcc8f72SMian Yousaf Kaukab dma_addr_t usb_fifo_addr = (MUSB_FIFO_OFFSET(hw_ep->epnum) + 938dcc8f72SMian Yousaf Kaukab ux500_channel->controller->phy_base); 94afbd0749SPer Forlin struct musb *musb = ux500_channel->controller->private_data; 958dcc8f72SMian Yousaf Kaukab 96afbd0749SPer Forlin dev_dbg(musb->controller, 976a3b0036SFelipe Balbi "packet_sz=%d, mode=%d, dma_addr=0x%llu, len=%d is_tx=%d\n", 986a3b0036SFelipe Balbi packet_sz, mode, (unsigned long long) dma_addr, 996a3b0036SFelipe Balbi len, ux500_channel->is_tx); 1008dcc8f72SMian Yousaf Kaukab 1018dcc8f72SMian Yousaf Kaukab ux500_channel->cur_len = len; 1028dcc8f72SMian Yousaf Kaukab 1038dcc8f72SMian Yousaf Kaukab sg_init_table(&sg, 1); 1048dcc8f72SMian Yousaf Kaukab sg_set_page(&sg, pfn_to_page(PFN_DOWN(dma_addr)), len, 1058dcc8f72SMian Yousaf Kaukab offset_in_page(dma_addr)); 1068dcc8f72SMian Yousaf Kaukab sg_dma_address(&sg) = dma_addr; 1078dcc8f72SMian Yousaf Kaukab sg_dma_len(&sg) = len; 1088dcc8f72SMian Yousaf Kaukab 1098341544cSVinod Koul direction = ux500_channel->is_tx ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM; 1108dcc8f72SMian Yousaf Kaukab addr_width = (len & 0x3) ? DMA_SLAVE_BUSWIDTH_1_BYTE : 1118dcc8f72SMian Yousaf Kaukab DMA_SLAVE_BUSWIDTH_4_BYTES; 1128dcc8f72SMian Yousaf Kaukab 1138dcc8f72SMian Yousaf Kaukab slave_conf.direction = direction; 1148dcc8f72SMian Yousaf Kaukab slave_conf.src_addr = usb_fifo_addr; 1158dcc8f72SMian Yousaf Kaukab slave_conf.src_addr_width = addr_width; 1168dcc8f72SMian Yousaf Kaukab slave_conf.src_maxburst = 16; 1178dcc8f72SMian Yousaf Kaukab slave_conf.dst_addr = usb_fifo_addr; 1188dcc8f72SMian Yousaf Kaukab slave_conf.dst_addr_width = addr_width; 1198dcc8f72SMian Yousaf Kaukab slave_conf.dst_maxburst = 16; 120258aea76SViresh Kumar slave_conf.device_fc = false; 121d366d39bSPer Forlin 1228dcc8f72SMian Yousaf Kaukab dma_chan->device->device_control(dma_chan, DMA_SLAVE_CONFIG, 1238dcc8f72SMian Yousaf Kaukab (unsigned long) &slave_conf); 1248dcc8f72SMian Yousaf Kaukab 12516052827SAlexandre Bounine dma_desc = dmaengine_prep_slave_sg(dma_chan, &sg, 1, direction, 1268dcc8f72SMian Yousaf Kaukab DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 1278dcc8f72SMian Yousaf Kaukab if (!dma_desc) 1288dcc8f72SMian Yousaf Kaukab return false; 1298dcc8f72SMian Yousaf Kaukab 1308dcc8f72SMian Yousaf Kaukab dma_desc->callback = ux500_dma_callback; 1318dcc8f72SMian Yousaf Kaukab dma_desc->callback_param = channel; 1328dcc8f72SMian Yousaf Kaukab ux500_channel->cookie = dma_desc->tx_submit(dma_desc); 1338dcc8f72SMian Yousaf Kaukab 1348dcc8f72SMian Yousaf Kaukab dma_async_issue_pending(dma_chan); 1358dcc8f72SMian Yousaf Kaukab 1368dcc8f72SMian Yousaf Kaukab return true; 1378dcc8f72SMian Yousaf Kaukab } 1388dcc8f72SMian Yousaf Kaukab 1398dcc8f72SMian Yousaf Kaukab static struct dma_channel *ux500_dma_channel_allocate(struct dma_controller *c, 1408dcc8f72SMian Yousaf Kaukab struct musb_hw_ep *hw_ep, u8 is_tx) 1418dcc8f72SMian Yousaf Kaukab { 1428dcc8f72SMian Yousaf Kaukab struct ux500_dma_controller *controller = container_of(c, 1438dcc8f72SMian Yousaf Kaukab struct ux500_dma_controller, controller); 1448dcc8f72SMian Yousaf Kaukab struct ux500_dma_channel *ux500_channel = NULL; 145afbd0749SPer Forlin struct musb *musb = controller->private_data; 1468dcc8f72SMian Yousaf Kaukab u8 ch_num = hw_ep->epnum - 1; 1478dcc8f72SMian Yousaf Kaukab u32 max_ch; 1488dcc8f72SMian Yousaf Kaukab 1498dcc8f72SMian Yousaf Kaukab /* Max 8 DMA channels (0 - 7). Each DMA channel can only be allocated 1508dcc8f72SMian Yousaf Kaukab * to specified hw_ep. For example DMA channel 0 can only be allocated 1518dcc8f72SMian Yousaf Kaukab * to hw_ep 1 and 9. 1528dcc8f72SMian Yousaf Kaukab */ 1538dcc8f72SMian Yousaf Kaukab if (ch_num > 7) 1548dcc8f72SMian Yousaf Kaukab ch_num -= 8; 1558dcc8f72SMian Yousaf Kaukab 1568dcc8f72SMian Yousaf Kaukab max_ch = is_tx ? controller->num_tx_channels : 1578dcc8f72SMian Yousaf Kaukab controller->num_rx_channels; 1588dcc8f72SMian Yousaf Kaukab 1598dcc8f72SMian Yousaf Kaukab if (ch_num >= max_ch) 1608dcc8f72SMian Yousaf Kaukab return NULL; 1618dcc8f72SMian Yousaf Kaukab 1628dcc8f72SMian Yousaf Kaukab ux500_channel = is_tx ? &(controller->tx_channel[ch_num]) : 1638dcc8f72SMian Yousaf Kaukab &(controller->rx_channel[ch_num]) ; 1648dcc8f72SMian Yousaf Kaukab 1658dcc8f72SMian Yousaf Kaukab /* Check if channel is already used. */ 1668dcc8f72SMian Yousaf Kaukab if (ux500_channel->is_allocated) 1678dcc8f72SMian Yousaf Kaukab return NULL; 1688dcc8f72SMian Yousaf Kaukab 1698dcc8f72SMian Yousaf Kaukab ux500_channel->hw_ep = hw_ep; 1708dcc8f72SMian Yousaf Kaukab ux500_channel->is_allocated = 1; 1718dcc8f72SMian Yousaf Kaukab 172afbd0749SPer Forlin dev_dbg(musb->controller, "hw_ep=%d, is_tx=0x%x, channel=%d\n", 1738dcc8f72SMian Yousaf Kaukab hw_ep->epnum, is_tx, ch_num); 1748dcc8f72SMian Yousaf Kaukab 1758dcc8f72SMian Yousaf Kaukab return &(ux500_channel->channel); 1768dcc8f72SMian Yousaf Kaukab } 1778dcc8f72SMian Yousaf Kaukab 1788dcc8f72SMian Yousaf Kaukab static void ux500_dma_channel_release(struct dma_channel *channel) 1798dcc8f72SMian Yousaf Kaukab { 1808dcc8f72SMian Yousaf Kaukab struct ux500_dma_channel *ux500_channel = channel->private_data; 181afbd0749SPer Forlin struct musb *musb = ux500_channel->controller->private_data; 1828dcc8f72SMian Yousaf Kaukab 183afbd0749SPer Forlin dev_dbg(musb->controller, "channel=%d\n", ux500_channel->ch_num); 1848dcc8f72SMian Yousaf Kaukab 1858dcc8f72SMian Yousaf Kaukab if (ux500_channel->is_allocated) { 1868dcc8f72SMian Yousaf Kaukab ux500_channel->is_allocated = 0; 1878dcc8f72SMian Yousaf Kaukab channel->status = MUSB_DMA_STATUS_FREE; 1888dcc8f72SMian Yousaf Kaukab channel->actual_len = 0; 1898dcc8f72SMian Yousaf Kaukab } 1908dcc8f72SMian Yousaf Kaukab } 1918dcc8f72SMian Yousaf Kaukab 1928dcc8f72SMian Yousaf Kaukab static int ux500_dma_is_compatible(struct dma_channel *channel, 1938dcc8f72SMian Yousaf Kaukab u16 maxpacket, void *buf, u32 length) 1948dcc8f72SMian Yousaf Kaukab { 1958dcc8f72SMian Yousaf Kaukab if ((maxpacket & 0x3) || 1966a3b0036SFelipe Balbi ((unsigned long int) buf & 0x3) || 1978dcc8f72SMian Yousaf Kaukab (length < 512) || 1988dcc8f72SMian Yousaf Kaukab (length & 0x3)) 1998dcc8f72SMian Yousaf Kaukab return false; 2008dcc8f72SMian Yousaf Kaukab else 2018dcc8f72SMian Yousaf Kaukab return true; 2028dcc8f72SMian Yousaf Kaukab } 2038dcc8f72SMian Yousaf Kaukab 2048dcc8f72SMian Yousaf Kaukab static int ux500_dma_channel_program(struct dma_channel *channel, 2058dcc8f72SMian Yousaf Kaukab u16 packet_sz, u8 mode, 2068dcc8f72SMian Yousaf Kaukab dma_addr_t dma_addr, u32 len) 2078dcc8f72SMian Yousaf Kaukab { 2088dcc8f72SMian Yousaf Kaukab int ret; 2098dcc8f72SMian Yousaf Kaukab 2108dcc8f72SMian Yousaf Kaukab BUG_ON(channel->status == MUSB_DMA_STATUS_UNKNOWN || 2118dcc8f72SMian Yousaf Kaukab channel->status == MUSB_DMA_STATUS_BUSY); 2128dcc8f72SMian Yousaf Kaukab 2138dcc8f72SMian Yousaf Kaukab if (!ux500_dma_is_compatible(channel, packet_sz, (void *)dma_addr, len)) 2148dcc8f72SMian Yousaf Kaukab return false; 2158dcc8f72SMian Yousaf Kaukab 2168dcc8f72SMian Yousaf Kaukab channel->status = MUSB_DMA_STATUS_BUSY; 2178dcc8f72SMian Yousaf Kaukab channel->actual_len = 0; 2188dcc8f72SMian Yousaf Kaukab ret = ux500_configure_channel(channel, packet_sz, mode, dma_addr, len); 2198dcc8f72SMian Yousaf Kaukab if (!ret) 2208dcc8f72SMian Yousaf Kaukab channel->status = MUSB_DMA_STATUS_FREE; 2218dcc8f72SMian Yousaf Kaukab 2228dcc8f72SMian Yousaf Kaukab return ret; 2238dcc8f72SMian Yousaf Kaukab } 2248dcc8f72SMian Yousaf Kaukab 2258dcc8f72SMian Yousaf Kaukab static int ux500_dma_channel_abort(struct dma_channel *channel) 2268dcc8f72SMian Yousaf Kaukab { 2278dcc8f72SMian Yousaf Kaukab struct ux500_dma_channel *ux500_channel = channel->private_data; 2288dcc8f72SMian Yousaf Kaukab struct ux500_dma_controller *controller = ux500_channel->controller; 2298dcc8f72SMian Yousaf Kaukab struct musb *musb = controller->private_data; 2308dcc8f72SMian Yousaf Kaukab void __iomem *epio = musb->endpoints[ux500_channel->hw_ep->epnum].regs; 2318dcc8f72SMian Yousaf Kaukab u16 csr; 2328dcc8f72SMian Yousaf Kaukab 233afbd0749SPer Forlin dev_dbg(musb->controller, "channel=%d, is_tx=%d\n", 234afbd0749SPer Forlin ux500_channel->ch_num, ux500_channel->is_tx); 2358dcc8f72SMian Yousaf Kaukab 2368dcc8f72SMian Yousaf Kaukab if (channel->status == MUSB_DMA_STATUS_BUSY) { 2378dcc8f72SMian Yousaf Kaukab if (ux500_channel->is_tx) { 2388dcc8f72SMian Yousaf Kaukab csr = musb_readw(epio, MUSB_TXCSR); 2398dcc8f72SMian Yousaf Kaukab csr &= ~(MUSB_TXCSR_AUTOSET | 2408dcc8f72SMian Yousaf Kaukab MUSB_TXCSR_DMAENAB | 2418dcc8f72SMian Yousaf Kaukab MUSB_TXCSR_DMAMODE); 2428dcc8f72SMian Yousaf Kaukab musb_writew(epio, MUSB_TXCSR, csr); 2438dcc8f72SMian Yousaf Kaukab } else { 2448dcc8f72SMian Yousaf Kaukab csr = musb_readw(epio, MUSB_RXCSR); 2458dcc8f72SMian Yousaf Kaukab csr &= ~(MUSB_RXCSR_AUTOCLEAR | 2468dcc8f72SMian Yousaf Kaukab MUSB_RXCSR_DMAENAB | 2478dcc8f72SMian Yousaf Kaukab MUSB_RXCSR_DMAMODE); 2488dcc8f72SMian Yousaf Kaukab musb_writew(epio, MUSB_RXCSR, csr); 2498dcc8f72SMian Yousaf Kaukab } 2508dcc8f72SMian Yousaf Kaukab 2518dcc8f72SMian Yousaf Kaukab ux500_channel->dma_chan->device-> 2528dcc8f72SMian Yousaf Kaukab device_control(ux500_channel->dma_chan, 2538dcc8f72SMian Yousaf Kaukab DMA_TERMINATE_ALL, 0); 2548dcc8f72SMian Yousaf Kaukab channel->status = MUSB_DMA_STATUS_FREE; 2558dcc8f72SMian Yousaf Kaukab } 2568dcc8f72SMian Yousaf Kaukab return 0; 2578dcc8f72SMian Yousaf Kaukab } 2588dcc8f72SMian Yousaf Kaukab 2598dcc8f72SMian Yousaf Kaukab static int ux500_dma_controller_stop(struct dma_controller *c) 2608dcc8f72SMian Yousaf Kaukab { 2618dcc8f72SMian Yousaf Kaukab struct ux500_dma_controller *controller = container_of(c, 2628dcc8f72SMian Yousaf Kaukab struct ux500_dma_controller, controller); 2638dcc8f72SMian Yousaf Kaukab struct ux500_dma_channel *ux500_channel; 2648dcc8f72SMian Yousaf Kaukab struct dma_channel *channel; 2658dcc8f72SMian Yousaf Kaukab u8 ch_num; 2668dcc8f72SMian Yousaf Kaukab 2678dcc8f72SMian Yousaf Kaukab for (ch_num = 0; ch_num < controller->num_rx_channels; ch_num++) { 2688dcc8f72SMian Yousaf Kaukab channel = &controller->rx_channel[ch_num].channel; 2698dcc8f72SMian Yousaf Kaukab ux500_channel = channel->private_data; 2708dcc8f72SMian Yousaf Kaukab 2718dcc8f72SMian Yousaf Kaukab ux500_dma_channel_release(channel); 2728dcc8f72SMian Yousaf Kaukab 2738dcc8f72SMian Yousaf Kaukab if (ux500_channel->dma_chan) 2748dcc8f72SMian Yousaf Kaukab dma_release_channel(ux500_channel->dma_chan); 2758dcc8f72SMian Yousaf Kaukab } 2768dcc8f72SMian Yousaf Kaukab 2778dcc8f72SMian Yousaf Kaukab for (ch_num = 0; ch_num < controller->num_tx_channels; ch_num++) { 2788dcc8f72SMian Yousaf Kaukab channel = &controller->tx_channel[ch_num].channel; 2798dcc8f72SMian Yousaf Kaukab ux500_channel = channel->private_data; 2808dcc8f72SMian Yousaf Kaukab 2818dcc8f72SMian Yousaf Kaukab ux500_dma_channel_release(channel); 2828dcc8f72SMian Yousaf Kaukab 2838dcc8f72SMian Yousaf Kaukab if (ux500_channel->dma_chan) 2848dcc8f72SMian Yousaf Kaukab dma_release_channel(ux500_channel->dma_chan); 2858dcc8f72SMian Yousaf Kaukab } 2868dcc8f72SMian Yousaf Kaukab 2878dcc8f72SMian Yousaf Kaukab return 0; 2888dcc8f72SMian Yousaf Kaukab } 2898dcc8f72SMian Yousaf Kaukab 2908dcc8f72SMian Yousaf Kaukab static int ux500_dma_controller_start(struct dma_controller *c) 2918dcc8f72SMian Yousaf Kaukab { 2928dcc8f72SMian Yousaf Kaukab struct ux500_dma_controller *controller = container_of(c, 2938dcc8f72SMian Yousaf Kaukab struct ux500_dma_controller, controller); 2948dcc8f72SMian Yousaf Kaukab struct ux500_dma_channel *ux500_channel = NULL; 2958dcc8f72SMian Yousaf Kaukab struct musb *musb = controller->private_data; 2968dcc8f72SMian Yousaf Kaukab struct device *dev = musb->controller; 2978dcc8f72SMian Yousaf Kaukab struct musb_hdrc_platform_data *plat = dev->platform_data; 2988dcc8f72SMian Yousaf Kaukab struct ux500_musb_board_data *data = plat->board_data; 2998dcc8f72SMian Yousaf Kaukab struct dma_channel *dma_channel = NULL; 3008dcc8f72SMian Yousaf Kaukab u32 ch_num; 3018dcc8f72SMian Yousaf Kaukab u8 dir; 3028dcc8f72SMian Yousaf Kaukab u8 is_tx = 0; 3038dcc8f72SMian Yousaf Kaukab 3048dcc8f72SMian Yousaf Kaukab void **param_array; 3058dcc8f72SMian Yousaf Kaukab struct ux500_dma_channel *channel_array; 3068dcc8f72SMian Yousaf Kaukab u32 ch_count; 3078dcc8f72SMian Yousaf Kaukab dma_cap_mask_t mask; 3088dcc8f72SMian Yousaf Kaukab 3098dcc8f72SMian Yousaf Kaukab if ((data->num_rx_channels > UX500_MUSB_DMA_NUM_RX_CHANNELS) || 3108dcc8f72SMian Yousaf Kaukab (data->num_tx_channels > UX500_MUSB_DMA_NUM_TX_CHANNELS)) 3118dcc8f72SMian Yousaf Kaukab return -EINVAL; 3128dcc8f72SMian Yousaf Kaukab 3138dcc8f72SMian Yousaf Kaukab controller->num_rx_channels = data->num_rx_channels; 3148dcc8f72SMian Yousaf Kaukab controller->num_tx_channels = data->num_tx_channels; 3158dcc8f72SMian Yousaf Kaukab 3168dcc8f72SMian Yousaf Kaukab dma_cap_zero(mask); 3178dcc8f72SMian Yousaf Kaukab dma_cap_set(DMA_SLAVE, mask); 3188dcc8f72SMian Yousaf Kaukab 3198dcc8f72SMian Yousaf Kaukab /* Prepare the loop for RX channels */ 3208dcc8f72SMian Yousaf Kaukab channel_array = controller->rx_channel; 3218dcc8f72SMian Yousaf Kaukab ch_count = data->num_rx_channels; 3228dcc8f72SMian Yousaf Kaukab param_array = data->dma_rx_param_array; 3238dcc8f72SMian Yousaf Kaukab 3248dcc8f72SMian Yousaf Kaukab for (dir = 0; dir < 2; dir++) { 3258dcc8f72SMian Yousaf Kaukab for (ch_num = 0; ch_num < ch_count; ch_num++) { 3268dcc8f72SMian Yousaf Kaukab ux500_channel = &channel_array[ch_num]; 3278dcc8f72SMian Yousaf Kaukab ux500_channel->controller = controller; 3288dcc8f72SMian Yousaf Kaukab ux500_channel->ch_num = ch_num; 3298dcc8f72SMian Yousaf Kaukab ux500_channel->is_tx = is_tx; 3308dcc8f72SMian Yousaf Kaukab 3318dcc8f72SMian Yousaf Kaukab dma_channel = &(ux500_channel->channel); 3328dcc8f72SMian Yousaf Kaukab dma_channel->private_data = ux500_channel; 3338dcc8f72SMian Yousaf Kaukab dma_channel->status = MUSB_DMA_STATUS_FREE; 3348dcc8f72SMian Yousaf Kaukab dma_channel->max_len = SZ_16M; 3358dcc8f72SMian Yousaf Kaukab 3368dcc8f72SMian Yousaf Kaukab ux500_channel->dma_chan = dma_request_channel(mask, 3378dcc8f72SMian Yousaf Kaukab data->dma_filter, 3388dcc8f72SMian Yousaf Kaukab param_array[ch_num]); 3398dcc8f72SMian Yousaf Kaukab if (!ux500_channel->dma_chan) { 3408dcc8f72SMian Yousaf Kaukab ERR("Dma pipe allocation error dir=%d ch=%d\n", 3418dcc8f72SMian Yousaf Kaukab dir, ch_num); 3428dcc8f72SMian Yousaf Kaukab 3438dcc8f72SMian Yousaf Kaukab /* Release already allocated channels */ 3448dcc8f72SMian Yousaf Kaukab ux500_dma_controller_stop(c); 3458dcc8f72SMian Yousaf Kaukab 3468dcc8f72SMian Yousaf Kaukab return -EBUSY; 3478dcc8f72SMian Yousaf Kaukab } 3488dcc8f72SMian Yousaf Kaukab 3498dcc8f72SMian Yousaf Kaukab } 3508dcc8f72SMian Yousaf Kaukab 3518dcc8f72SMian Yousaf Kaukab /* Prepare the loop for TX channels */ 3528dcc8f72SMian Yousaf Kaukab channel_array = controller->tx_channel; 3538dcc8f72SMian Yousaf Kaukab ch_count = data->num_tx_channels; 3548dcc8f72SMian Yousaf Kaukab param_array = data->dma_tx_param_array; 3558dcc8f72SMian Yousaf Kaukab is_tx = 1; 3568dcc8f72SMian Yousaf Kaukab } 3578dcc8f72SMian Yousaf Kaukab 3588dcc8f72SMian Yousaf Kaukab return 0; 3598dcc8f72SMian Yousaf Kaukab } 3608dcc8f72SMian Yousaf Kaukab 3618dcc8f72SMian Yousaf Kaukab void dma_controller_destroy(struct dma_controller *c) 3628dcc8f72SMian Yousaf Kaukab { 3638dcc8f72SMian Yousaf Kaukab struct ux500_dma_controller *controller = container_of(c, 3648dcc8f72SMian Yousaf Kaukab struct ux500_dma_controller, controller); 3658dcc8f72SMian Yousaf Kaukab 3668dcc8f72SMian Yousaf Kaukab kfree(controller); 3678dcc8f72SMian Yousaf Kaukab } 3688dcc8f72SMian Yousaf Kaukab 36941ac7b3aSBill Pemberton struct dma_controller *dma_controller_create(struct musb *musb, void __iomem *base) 3708dcc8f72SMian Yousaf Kaukab { 3718dcc8f72SMian Yousaf Kaukab struct ux500_dma_controller *controller; 3728dcc8f72SMian Yousaf Kaukab struct platform_device *pdev = to_platform_device(musb->controller); 3738dcc8f72SMian Yousaf Kaukab struct resource *iomem; 3748dcc8f72SMian Yousaf Kaukab 3758dcc8f72SMian Yousaf Kaukab controller = kzalloc(sizeof(*controller), GFP_KERNEL); 3768dcc8f72SMian Yousaf Kaukab if (!controller) 377399e0f4fSVirupax Sadashivpetimath goto kzalloc_fail; 3788dcc8f72SMian Yousaf Kaukab 3798dcc8f72SMian Yousaf Kaukab controller->private_data = musb; 3808dcc8f72SMian Yousaf Kaukab 3818dcc8f72SMian Yousaf Kaukab /* Save physical address for DMA controller. */ 3828dcc8f72SMian Yousaf Kaukab iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 383399e0f4fSVirupax Sadashivpetimath if (!iomem) { 384399e0f4fSVirupax Sadashivpetimath dev_err(musb->controller, "no memory resource defined\n"); 385399e0f4fSVirupax Sadashivpetimath goto plat_get_fail; 386399e0f4fSVirupax Sadashivpetimath } 387399e0f4fSVirupax Sadashivpetimath 3888dcc8f72SMian Yousaf Kaukab controller->phy_base = (dma_addr_t) iomem->start; 3898dcc8f72SMian Yousaf Kaukab 3908dcc8f72SMian Yousaf Kaukab controller->controller.start = ux500_dma_controller_start; 3918dcc8f72SMian Yousaf Kaukab controller->controller.stop = ux500_dma_controller_stop; 3928dcc8f72SMian Yousaf Kaukab controller->controller.channel_alloc = ux500_dma_channel_allocate; 3938dcc8f72SMian Yousaf Kaukab controller->controller.channel_release = ux500_dma_channel_release; 3948dcc8f72SMian Yousaf Kaukab controller->controller.channel_program = ux500_dma_channel_program; 3958dcc8f72SMian Yousaf Kaukab controller->controller.channel_abort = ux500_dma_channel_abort; 3968dcc8f72SMian Yousaf Kaukab controller->controller.is_compatible = ux500_dma_is_compatible; 3978dcc8f72SMian Yousaf Kaukab 3988dcc8f72SMian Yousaf Kaukab return &controller->controller; 399399e0f4fSVirupax Sadashivpetimath 400399e0f4fSVirupax Sadashivpetimath plat_get_fail: 401399e0f4fSVirupax Sadashivpetimath kfree(controller); 402399e0f4fSVirupax Sadashivpetimath kzalloc_fail: 403399e0f4fSVirupax Sadashivpetimath return NULL; 4048dcc8f72SMian Yousaf Kaukab } 405