1 /* 2 * Texas Instruments DSPS platforms "glue layer" 3 * 4 * Copyright (C) 2012, by Texas Instruments 5 * 6 * Based on the am35x "glue layer" code. 7 * 8 * This file is part of the Inventra Controller Driver for Linux. 9 * 10 * The Inventra Controller Driver for Linux is free software; you 11 * can redistribute it and/or modify it under the terms of the GNU 12 * General Public License version 2 as published by the Free Software 13 * Foundation. 14 * 15 * The Inventra Controller Driver for Linux is distributed in 16 * the hope that it will be useful, but WITHOUT ANY WARRANTY; 17 * without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 * License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with The Inventra Controller Driver for Linux ; if not, 23 * write to the Free Software Foundation, Inc., 59 Temple Place, 24 * Suite 330, Boston, MA 02111-1307 USA 25 * 26 * musb_dsps.c will be a common file for all the TI DSPS platforms 27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. 28 * For now only ti81x is using this and in future davinci.c, am35x.c 29 * da8xx.c would be merged to this file after testing. 30 */ 31 32 #include <linux/io.h> 33 #include <linux/err.h> 34 #include <linux/platform_device.h> 35 #include <linux/dma-mapping.h> 36 #include <linux/pm_runtime.h> 37 #include <linux/module.h> 38 #include <linux/usb/usb_phy_generic.h> 39 #include <linux/platform_data/usb-omap.h> 40 #include <linux/sizes.h> 41 42 #include <linux/of.h> 43 #include <linux/of_device.h> 44 #include <linux/of_address.h> 45 #include <linux/of_irq.h> 46 #include <linux/usb/of.h> 47 48 #include <linux/debugfs.h> 49 50 #include "musb_core.h" 51 52 static const struct of_device_id musb_dsps_of_match[]; 53 54 /** 55 * DSPS musb wrapper register offset. 56 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS 57 * musb ips. 58 */ 59 struct dsps_musb_wrapper { 60 u16 revision; 61 u16 control; 62 u16 status; 63 u16 epintr_set; 64 u16 epintr_clear; 65 u16 epintr_status; 66 u16 coreintr_set; 67 u16 coreintr_clear; 68 u16 coreintr_status; 69 u16 phy_utmi; 70 u16 mode; 71 u16 tx_mode; 72 u16 rx_mode; 73 74 /* bit positions for control */ 75 unsigned reset:5; 76 77 /* bit positions for interrupt */ 78 unsigned usb_shift:5; 79 u32 usb_mask; 80 u32 usb_bitmap; 81 unsigned drvvbus:5; 82 83 unsigned txep_shift:5; 84 u32 txep_mask; 85 u32 txep_bitmap; 86 87 unsigned rxep_shift:5; 88 u32 rxep_mask; 89 u32 rxep_bitmap; 90 91 /* bit positions for phy_utmi */ 92 unsigned otg_disable:5; 93 94 /* bit positions for mode */ 95 unsigned iddig:5; 96 unsigned iddig_mux:5; 97 /* miscellaneous stuff */ 98 unsigned poll_timeout; 99 }; 100 101 /* 102 * register shadow for suspend 103 */ 104 struct dsps_context { 105 u32 control; 106 u32 epintr; 107 u32 coreintr; 108 u32 phy_utmi; 109 u32 mode; 110 u32 tx_mode; 111 u32 rx_mode; 112 }; 113 114 /** 115 * DSPS glue structure. 116 */ 117 struct dsps_glue { 118 struct device *dev; 119 struct platform_device *musb; /* child musb pdev */ 120 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ 121 int vbus_irq; /* optional vbus irq */ 122 struct timer_list timer; /* otg_workaround timer */ 123 unsigned long last_timer; /* last timer data for each instance */ 124 bool sw_babble_enabled; 125 void __iomem *usbss_base; 126 127 struct dsps_context context; 128 struct debugfs_regset32 regset; 129 struct dentry *dbgfs_root; 130 }; 131 132 static const struct debugfs_reg32 dsps_musb_regs[] = { 133 { "revision", 0x00 }, 134 { "control", 0x14 }, 135 { "status", 0x18 }, 136 { "eoi", 0x24 }, 137 { "intr0_stat", 0x30 }, 138 { "intr1_stat", 0x34 }, 139 { "intr0_set", 0x38 }, 140 { "intr1_set", 0x3c }, 141 { "txmode", 0x70 }, 142 { "rxmode", 0x74 }, 143 { "autoreq", 0xd0 }, 144 { "srpfixtime", 0xd4 }, 145 { "tdown", 0xd8 }, 146 { "phy_utmi", 0xe0 }, 147 { "mode", 0xe8 }, 148 }; 149 150 static void dsps_mod_timer(struct dsps_glue *glue, int wait_ms) 151 { 152 int wait; 153 154 if (wait_ms < 0) 155 wait = msecs_to_jiffies(glue->wrp->poll_timeout); 156 else 157 wait = msecs_to_jiffies(wait_ms); 158 159 mod_timer(&glue->timer, jiffies + wait); 160 } 161 162 /* 163 * If no vbus irq from the PMIC is configured, we need to poll VBUS status. 164 */ 165 static void dsps_mod_timer_optional(struct dsps_glue *glue) 166 { 167 if (glue->vbus_irq) 168 return; 169 170 dsps_mod_timer(glue, -1); 171 } 172 173 /* USBSS / USB AM335x */ 174 #define USBSS_IRQ_STATUS 0x28 175 #define USBSS_IRQ_ENABLER 0x2c 176 #define USBSS_IRQ_CLEARR 0x30 177 178 #define USBSS_IRQ_PD_COMP (1 << 2) 179 180 /** 181 * dsps_musb_enable - enable interrupts 182 */ 183 static void dsps_musb_enable(struct musb *musb) 184 { 185 struct device *dev = musb->controller; 186 struct platform_device *pdev = to_platform_device(dev->parent); 187 struct dsps_glue *glue = platform_get_drvdata(pdev); 188 const struct dsps_musb_wrapper *wrp = glue->wrp; 189 void __iomem *reg_base = musb->ctrl_base; 190 u32 epmask, coremask; 191 192 /* Workaround: setup IRQs through both register sets. */ 193 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | 194 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); 195 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); 196 197 musb_writel(reg_base, wrp->epintr_set, epmask); 198 musb_writel(reg_base, wrp->coreintr_set, coremask); 199 /* start polling for ID change in dual-role idle mode */ 200 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE && 201 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) 202 dsps_mod_timer(glue, -1); 203 } 204 205 /** 206 * dsps_musb_disable - disable HDRC and flush interrupts 207 */ 208 static void dsps_musb_disable(struct musb *musb) 209 { 210 struct device *dev = musb->controller; 211 struct platform_device *pdev = to_platform_device(dev->parent); 212 struct dsps_glue *glue = platform_get_drvdata(pdev); 213 const struct dsps_musb_wrapper *wrp = glue->wrp; 214 void __iomem *reg_base = musb->ctrl_base; 215 216 musb_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); 217 musb_writel(reg_base, wrp->epintr_clear, 218 wrp->txep_bitmap | wrp->rxep_bitmap); 219 del_timer_sync(&glue->timer); 220 } 221 222 /* Caller must take musb->lock */ 223 static int dsps_check_status(struct musb *musb, void *unused) 224 { 225 void __iomem *mregs = musb->mregs; 226 struct device *dev = musb->controller; 227 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 228 const struct dsps_musb_wrapper *wrp = glue->wrp; 229 u8 devctl; 230 int skip_session = 0; 231 232 if (glue->vbus_irq) 233 del_timer(&glue->timer); 234 235 /* 236 * We poll because DSPS IP's won't expose several OTG-critical 237 * status change events (from the transceiver) otherwise. 238 */ 239 devctl = musb_readb(mregs, MUSB_DEVCTL); 240 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 241 usb_otg_state_string(musb->xceiv->otg->state)); 242 243 switch (musb->xceiv->otg->state) { 244 case OTG_STATE_A_WAIT_VRISE: 245 dsps_mod_timer_optional(glue); 246 break; 247 case OTG_STATE_A_WAIT_BCON: 248 /* keep VBUS on for host-only mode */ 249 if (musb->port_mode == MUSB_PORT_MODE_HOST) { 250 dsps_mod_timer_optional(glue); 251 break; 252 } 253 musb_writeb(musb->mregs, MUSB_DEVCTL, 0); 254 skip_session = 1; 255 /* fall */ 256 257 case OTG_STATE_A_IDLE: 258 case OTG_STATE_B_IDLE: 259 if (!glue->vbus_irq) { 260 if (devctl & MUSB_DEVCTL_BDEVICE) { 261 musb->xceiv->otg->state = OTG_STATE_B_IDLE; 262 MUSB_DEV_MODE(musb); 263 } else { 264 musb->xceiv->otg->state = OTG_STATE_A_IDLE; 265 MUSB_HST_MODE(musb); 266 } 267 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session) 268 musb_writeb(mregs, MUSB_DEVCTL, 269 MUSB_DEVCTL_SESSION); 270 } 271 dsps_mod_timer_optional(glue); 272 break; 273 case OTG_STATE_A_WAIT_VFALL: 274 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; 275 musb_writel(musb->ctrl_base, wrp->coreintr_set, 276 MUSB_INTR_VBUSERROR << wrp->usb_shift); 277 break; 278 default: 279 break; 280 } 281 282 return 0; 283 } 284 285 static void otg_timer(unsigned long _musb) 286 { 287 struct musb *musb = (void *)_musb; 288 struct device *dev = musb->controller; 289 unsigned long flags; 290 int err; 291 292 err = pm_runtime_get(dev); 293 if ((err != -EINPROGRESS) && err < 0) { 294 dev_err(dev, "Poll could not pm_runtime_get: %i\n", err); 295 pm_runtime_put_noidle(dev); 296 297 return; 298 } 299 300 spin_lock_irqsave(&musb->lock, flags); 301 err = musb_queue_resume_work(musb, dsps_check_status, NULL); 302 if (err < 0) 303 dev_err(dev, "%s resume work: %i\n", __func__, err); 304 spin_unlock_irqrestore(&musb->lock, flags); 305 pm_runtime_mark_last_busy(dev); 306 pm_runtime_put_autosuspend(dev); 307 } 308 309 static void dsps_musb_clear_ep_rxintr(struct musb *musb, int epnum) 310 { 311 u32 epintr; 312 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent); 313 const struct dsps_musb_wrapper *wrp = glue->wrp; 314 315 /* musb->lock might already been held */ 316 epintr = (1 << epnum) << wrp->rxep_shift; 317 musb_writel(musb->ctrl_base, wrp->epintr_status, epintr); 318 } 319 320 static irqreturn_t dsps_interrupt(int irq, void *hci) 321 { 322 struct musb *musb = hci; 323 void __iomem *reg_base = musb->ctrl_base; 324 struct device *dev = musb->controller; 325 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 326 const struct dsps_musb_wrapper *wrp = glue->wrp; 327 unsigned long flags; 328 irqreturn_t ret = IRQ_NONE; 329 u32 epintr, usbintr; 330 331 spin_lock_irqsave(&musb->lock, flags); 332 333 /* Get endpoint interrupts */ 334 epintr = musb_readl(reg_base, wrp->epintr_status); 335 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; 336 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; 337 338 if (epintr) 339 musb_writel(reg_base, wrp->epintr_status, epintr); 340 341 /* Get usb core interrupts */ 342 usbintr = musb_readl(reg_base, wrp->coreintr_status); 343 if (!usbintr && !epintr) 344 goto out; 345 346 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; 347 if (usbintr) 348 musb_writel(reg_base, wrp->coreintr_status, usbintr); 349 350 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", 351 usbintr, epintr); 352 353 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { 354 int drvvbus = musb_readl(reg_base, wrp->status); 355 void __iomem *mregs = musb->mregs; 356 u8 devctl = musb_readb(mregs, MUSB_DEVCTL); 357 int err; 358 359 err = musb->int_usb & MUSB_INTR_VBUSERROR; 360 if (err) { 361 /* 362 * The Mentor core doesn't debounce VBUS as needed 363 * to cope with device connect current spikes. This 364 * means it's not uncommon for bus-powered devices 365 * to get VBUS errors during enumeration. 366 * 367 * This is a workaround, but newer RTL from Mentor 368 * seems to allow a better one: "re"-starting sessions 369 * without waiting for VBUS to stop registering in 370 * devctl. 371 */ 372 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 373 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL; 374 dsps_mod_timer_optional(glue); 375 WARNING("VBUS error workaround (delay coming)\n"); 376 } else if (drvvbus) { 377 MUSB_HST_MODE(musb); 378 musb->xceiv->otg->default_a = 1; 379 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; 380 dsps_mod_timer_optional(glue); 381 } else { 382 musb->is_active = 0; 383 MUSB_DEV_MODE(musb); 384 musb->xceiv->otg->default_a = 0; 385 musb->xceiv->otg->state = OTG_STATE_B_IDLE; 386 } 387 388 /* NOTE: this must complete power-on within 100 ms. */ 389 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 390 drvvbus ? "on" : "off", 391 usb_otg_state_string(musb->xceiv->otg->state), 392 err ? " ERROR" : "", 393 devctl); 394 ret = IRQ_HANDLED; 395 } 396 397 if (musb->int_tx || musb->int_rx || musb->int_usb) 398 ret |= musb_interrupt(musb); 399 400 /* Poll for ID change and connect */ 401 switch (musb->xceiv->otg->state) { 402 case OTG_STATE_B_IDLE: 403 case OTG_STATE_A_WAIT_BCON: 404 dsps_mod_timer_optional(glue); 405 break; 406 default: 407 break; 408 } 409 410 out: 411 spin_unlock_irqrestore(&musb->lock, flags); 412 413 return ret; 414 } 415 416 static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue) 417 { 418 struct dentry *root; 419 struct dentry *file; 420 char buf[128]; 421 422 sprintf(buf, "%s.dsps", dev_name(musb->controller)); 423 root = debugfs_create_dir(buf, NULL); 424 if (!root) 425 return -ENOMEM; 426 glue->dbgfs_root = root; 427 428 glue->regset.regs = dsps_musb_regs; 429 glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs); 430 glue->regset.base = musb->ctrl_base; 431 432 file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset); 433 if (!file) { 434 debugfs_remove_recursive(root); 435 return -ENOMEM; 436 } 437 return 0; 438 } 439 440 static int dsps_musb_init(struct musb *musb) 441 { 442 struct device *dev = musb->controller; 443 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 444 struct platform_device *parent = to_platform_device(dev->parent); 445 const struct dsps_musb_wrapper *wrp = glue->wrp; 446 void __iomem *reg_base; 447 struct resource *r; 448 u32 rev, val; 449 int ret; 450 451 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control"); 452 reg_base = devm_ioremap_resource(dev, r); 453 if (IS_ERR(reg_base)) 454 return PTR_ERR(reg_base); 455 musb->ctrl_base = reg_base; 456 457 /* NOP driver needs change if supporting dual instance */ 458 musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent, "phys", 0); 459 if (IS_ERR(musb->xceiv)) 460 return PTR_ERR(musb->xceiv); 461 462 musb->phy = devm_phy_get(dev->parent, "usb2-phy"); 463 464 /* Returns zero if e.g. not clocked */ 465 rev = musb_readl(reg_base, wrp->revision); 466 if (!rev) 467 return -ENODEV; 468 469 usb_phy_init(musb->xceiv); 470 if (IS_ERR(musb->phy)) { 471 musb->phy = NULL; 472 } else { 473 ret = phy_init(musb->phy); 474 if (ret < 0) 475 return ret; 476 ret = phy_power_on(musb->phy); 477 if (ret) { 478 phy_exit(musb->phy); 479 return ret; 480 } 481 } 482 483 setup_timer(&glue->timer, otg_timer, (unsigned long) musb); 484 485 /* Reset the musb */ 486 musb_writel(reg_base, wrp->control, (1 << wrp->reset)); 487 488 musb->isr = dsps_interrupt; 489 490 /* reset the otgdisable bit, needed for host mode to work */ 491 val = musb_readl(reg_base, wrp->phy_utmi); 492 val &= ~(1 << wrp->otg_disable); 493 musb_writel(musb->ctrl_base, wrp->phy_utmi, val); 494 495 /* 496 * Check whether the dsps version has babble control enabled. 497 * In latest silicon revision the babble control logic is enabled. 498 * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control 499 * logic enabled. 500 */ 501 val = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 502 if (val & MUSB_BABBLE_RCV_DISABLE) { 503 glue->sw_babble_enabled = true; 504 val |= MUSB_BABBLE_SW_SESSION_CTRL; 505 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, val); 506 } 507 508 dsps_mod_timer(glue, -1); 509 510 return dsps_musb_dbg_init(musb, glue); 511 } 512 513 static int dsps_musb_exit(struct musb *musb) 514 { 515 struct device *dev = musb->controller; 516 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 517 518 del_timer_sync(&glue->timer); 519 usb_phy_shutdown(musb->xceiv); 520 phy_power_off(musb->phy); 521 phy_exit(musb->phy); 522 debugfs_remove_recursive(glue->dbgfs_root); 523 524 return 0; 525 } 526 527 static int dsps_musb_set_mode(struct musb *musb, u8 mode) 528 { 529 struct device *dev = musb->controller; 530 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 531 const struct dsps_musb_wrapper *wrp = glue->wrp; 532 void __iomem *ctrl_base = musb->ctrl_base; 533 u32 reg; 534 535 reg = musb_readl(ctrl_base, wrp->mode); 536 537 switch (mode) { 538 case MUSB_HOST: 539 reg &= ~(1 << wrp->iddig); 540 541 /* 542 * if we're setting mode to host-only or device-only, we're 543 * going to ignore whatever the PHY sends us and just force 544 * ID pin status by SW 545 */ 546 reg |= (1 << wrp->iddig_mux); 547 548 musb_writel(ctrl_base, wrp->mode, reg); 549 musb_writel(ctrl_base, wrp->phy_utmi, 0x02); 550 break; 551 case MUSB_PERIPHERAL: 552 reg |= (1 << wrp->iddig); 553 554 /* 555 * if we're setting mode to host-only or device-only, we're 556 * going to ignore whatever the PHY sends us and just force 557 * ID pin status by SW 558 */ 559 reg |= (1 << wrp->iddig_mux); 560 561 musb_writel(ctrl_base, wrp->mode, reg); 562 break; 563 case MUSB_OTG: 564 musb_writel(ctrl_base, wrp->phy_utmi, 0x02); 565 break; 566 default: 567 dev_err(glue->dev, "unsupported mode %d\n", mode); 568 return -EINVAL; 569 } 570 571 return 0; 572 } 573 574 static bool dsps_sw_babble_control(struct musb *musb) 575 { 576 u8 babble_ctl; 577 bool session_restart = false; 578 579 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 580 dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n", 581 babble_ctl); 582 /* 583 * check line monitor flag to check whether babble is 584 * due to noise 585 */ 586 dev_dbg(musb->controller, "STUCK_J is %s\n", 587 babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset"); 588 589 if (babble_ctl & MUSB_BABBLE_STUCK_J) { 590 int timeout = 10; 591 592 /* 593 * babble is due to noise, then set transmit idle (d7 bit) 594 * to resume normal operation 595 */ 596 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 597 babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE; 598 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl); 599 600 /* wait till line monitor flag cleared */ 601 dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n"); 602 do { 603 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 604 udelay(1); 605 } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--); 606 607 /* check whether stuck_at_j bit cleared */ 608 if (babble_ctl & MUSB_BABBLE_STUCK_J) { 609 /* 610 * real babble condition has occurred 611 * restart the controller to start the 612 * session again 613 */ 614 dev_dbg(musb->controller, "J not cleared, misc (%x)\n", 615 babble_ctl); 616 session_restart = true; 617 } 618 } else { 619 session_restart = true; 620 } 621 622 return session_restart; 623 } 624 625 static int dsps_musb_recover(struct musb *musb) 626 { 627 struct device *dev = musb->controller; 628 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 629 int session_restart = 0; 630 631 if (glue->sw_babble_enabled) 632 session_restart = dsps_sw_babble_control(musb); 633 else 634 session_restart = 1; 635 636 return session_restart ? 0 : -EPIPE; 637 } 638 639 /* Similar to am35x, dm81xx support only 32-bit read operation */ 640 static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst) 641 { 642 void __iomem *fifo = hw_ep->fifo; 643 644 if (len >= 4) { 645 ioread32_rep(fifo, dst, len >> 2); 646 dst += len & ~0x03; 647 len &= 0x03; 648 } 649 650 /* Read any remaining 1 to 3 bytes */ 651 if (len > 0) { 652 u32 val = musb_readl(fifo, 0); 653 memcpy(dst, &val, len); 654 } 655 } 656 657 #ifdef CONFIG_USB_TI_CPPI41_DMA 658 static void dsps_dma_controller_callback(struct dma_controller *c) 659 { 660 struct musb *musb = c->musb; 661 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent); 662 void __iomem *usbss_base = glue->usbss_base; 663 u32 status; 664 665 status = musb_readl(usbss_base, USBSS_IRQ_STATUS); 666 if (status & USBSS_IRQ_PD_COMP) 667 musb_writel(usbss_base, USBSS_IRQ_STATUS, USBSS_IRQ_PD_COMP); 668 } 669 670 static struct dma_controller * 671 dsps_dma_controller_create(struct musb *musb, void __iomem *base) 672 { 673 struct dma_controller *controller; 674 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent); 675 void __iomem *usbss_base = glue->usbss_base; 676 677 controller = cppi41_dma_controller_create(musb, base); 678 if (IS_ERR_OR_NULL(controller)) 679 return controller; 680 681 musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP); 682 controller->dma_callback = dsps_dma_controller_callback; 683 684 return controller; 685 } 686 687 static void dsps_dma_controller_destroy(struct dma_controller *c) 688 { 689 struct musb *musb = c->musb; 690 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent); 691 void __iomem *usbss_base = glue->usbss_base; 692 693 musb_writel(usbss_base, USBSS_IRQ_CLEARR, USBSS_IRQ_PD_COMP); 694 cppi41_dma_controller_destroy(c); 695 } 696 697 #ifdef CONFIG_PM_SLEEP 698 static void dsps_dma_controller_suspend(struct dsps_glue *glue) 699 { 700 void __iomem *usbss_base = glue->usbss_base; 701 702 musb_writel(usbss_base, USBSS_IRQ_CLEARR, USBSS_IRQ_PD_COMP); 703 } 704 705 static void dsps_dma_controller_resume(struct dsps_glue *glue) 706 { 707 void __iomem *usbss_base = glue->usbss_base; 708 709 musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP); 710 } 711 #endif 712 #else /* CONFIG_USB_TI_CPPI41_DMA */ 713 #ifdef CONFIG_PM_SLEEP 714 static void dsps_dma_controller_suspend(struct dsps_glue *glue) {} 715 static void dsps_dma_controller_resume(struct dsps_glue *glue) {} 716 #endif 717 #endif /* CONFIG_USB_TI_CPPI41_DMA */ 718 719 static struct musb_platform_ops dsps_ops = { 720 .quirks = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP, 721 .init = dsps_musb_init, 722 .exit = dsps_musb_exit, 723 724 #ifdef CONFIG_USB_TI_CPPI41_DMA 725 .dma_init = dsps_dma_controller_create, 726 .dma_exit = dsps_dma_controller_destroy, 727 #endif 728 .enable = dsps_musb_enable, 729 .disable = dsps_musb_disable, 730 731 .set_mode = dsps_musb_set_mode, 732 .recover = dsps_musb_recover, 733 .clear_ep_rxintr = dsps_musb_clear_ep_rxintr, 734 }; 735 736 static u64 musb_dmamask = DMA_BIT_MASK(32); 737 738 static int get_int_prop(struct device_node *dn, const char *s) 739 { 740 int ret; 741 u32 val; 742 743 ret = of_property_read_u32(dn, s, &val); 744 if (ret) 745 return 0; 746 return val; 747 } 748 749 static int get_musb_port_mode(struct device *dev) 750 { 751 enum usb_dr_mode mode; 752 753 mode = usb_get_dr_mode(dev); 754 switch (mode) { 755 case USB_DR_MODE_HOST: 756 return MUSB_PORT_MODE_HOST; 757 758 case USB_DR_MODE_PERIPHERAL: 759 return MUSB_PORT_MODE_GADGET; 760 761 case USB_DR_MODE_UNKNOWN: 762 case USB_DR_MODE_OTG: 763 default: 764 return MUSB_PORT_MODE_DUAL_ROLE; 765 } 766 } 767 768 static int dsps_create_musb_pdev(struct dsps_glue *glue, 769 struct platform_device *parent) 770 { 771 struct musb_hdrc_platform_data pdata; 772 struct resource resources[2]; 773 struct resource *res; 774 struct device *dev = &parent->dev; 775 struct musb_hdrc_config *config; 776 struct platform_device *musb; 777 struct device_node *dn = parent->dev.of_node; 778 int ret, val; 779 780 memset(resources, 0, sizeof(resources)); 781 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc"); 782 if (!res) { 783 dev_err(dev, "failed to get memory.\n"); 784 return -EINVAL; 785 } 786 resources[0] = *res; 787 788 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc"); 789 if (!res) { 790 dev_err(dev, "failed to get irq.\n"); 791 return -EINVAL; 792 } 793 resources[1] = *res; 794 795 /* allocate the child platform device */ 796 musb = platform_device_alloc("musb-hdrc", 797 (resources[0].start & 0xFFF) == 0x400 ? 0 : 1); 798 if (!musb) { 799 dev_err(dev, "failed to allocate musb device\n"); 800 return -ENOMEM; 801 } 802 803 musb->dev.parent = dev; 804 musb->dev.dma_mask = &musb_dmamask; 805 musb->dev.coherent_dma_mask = musb_dmamask; 806 807 glue->musb = musb; 808 809 ret = platform_device_add_resources(musb, resources, 810 ARRAY_SIZE(resources)); 811 if (ret) { 812 dev_err(dev, "failed to add resources\n"); 813 goto err; 814 } 815 816 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL); 817 if (!config) { 818 ret = -ENOMEM; 819 goto err; 820 } 821 pdata.config = config; 822 pdata.platform_ops = &dsps_ops; 823 824 config->num_eps = get_int_prop(dn, "mentor,num-eps"); 825 config->ram_bits = get_int_prop(dn, "mentor,ram-bits"); 826 config->host_port_deassert_reset_at_resume = 1; 827 pdata.mode = get_musb_port_mode(dev); 828 /* DT keeps this entry in mA, musb expects it as per USB spec */ 829 pdata.power = get_int_prop(dn, "mentor,power") / 2; 830 831 ret = of_property_read_u32(dn, "mentor,multipoint", &val); 832 if (!ret && val) 833 config->multipoint = true; 834 835 config->maximum_speed = usb_get_maximum_speed(&parent->dev); 836 switch (config->maximum_speed) { 837 case USB_SPEED_LOW: 838 case USB_SPEED_FULL: 839 break; 840 case USB_SPEED_SUPER: 841 dev_warn(dev, "ignore incorrect maximum_speed " 842 "(super-speed) setting in dts"); 843 /* fall through */ 844 default: 845 config->maximum_speed = USB_SPEED_HIGH; 846 } 847 848 ret = platform_device_add_data(musb, &pdata, sizeof(pdata)); 849 if (ret) { 850 dev_err(dev, "failed to add platform_data\n"); 851 goto err; 852 } 853 854 ret = platform_device_add(musb); 855 if (ret) { 856 dev_err(dev, "failed to register musb device\n"); 857 goto err; 858 } 859 return 0; 860 861 err: 862 platform_device_put(musb); 863 return ret; 864 } 865 866 static irqreturn_t dsps_vbus_threaded_irq(int irq, void *priv) 867 { 868 struct dsps_glue *glue = priv; 869 struct musb *musb = platform_get_drvdata(glue->musb); 870 871 if (!musb) 872 return IRQ_NONE; 873 874 dev_dbg(glue->dev, "VBUS interrupt\n"); 875 dsps_mod_timer(glue, 0); 876 877 return IRQ_HANDLED; 878 } 879 880 static int dsps_setup_optional_vbus_irq(struct platform_device *pdev, 881 struct dsps_glue *glue) 882 { 883 int error; 884 885 glue->vbus_irq = platform_get_irq_byname(pdev, "vbus"); 886 if (glue->vbus_irq == -EPROBE_DEFER) 887 return -EPROBE_DEFER; 888 889 if (glue->vbus_irq <= 0) { 890 glue->vbus_irq = 0; 891 return 0; 892 } 893 894 error = devm_request_threaded_irq(glue->dev, glue->vbus_irq, 895 NULL, dsps_vbus_threaded_irq, 896 IRQF_ONESHOT, 897 "vbus", glue); 898 if (error) { 899 glue->vbus_irq = 0; 900 return error; 901 } 902 dev_dbg(glue->dev, "VBUS irq %i configured\n", glue->vbus_irq); 903 904 return 0; 905 } 906 907 static int dsps_probe(struct platform_device *pdev) 908 { 909 const struct of_device_id *match; 910 const struct dsps_musb_wrapper *wrp; 911 struct dsps_glue *glue; 912 int ret; 913 914 if (!strcmp(pdev->name, "musb-hdrc")) 915 return -ENODEV; 916 917 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node); 918 if (!match) { 919 dev_err(&pdev->dev, "fail to get matching of_match struct\n"); 920 return -EINVAL; 921 } 922 wrp = match->data; 923 924 if (of_device_is_compatible(pdev->dev.of_node, "ti,musb-dm816")) 925 dsps_ops.read_fifo = dsps_read_fifo32; 926 927 /* allocate glue */ 928 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); 929 if (!glue) 930 return -ENOMEM; 931 932 glue->dev = &pdev->dev; 933 glue->wrp = wrp; 934 glue->usbss_base = of_iomap(pdev->dev.parent->of_node, 0); 935 if (!glue->usbss_base) 936 return -ENXIO; 937 938 if (usb_get_dr_mode(&pdev->dev) == USB_DR_MODE_PERIPHERAL) { 939 ret = dsps_setup_optional_vbus_irq(pdev, glue); 940 if (ret) 941 goto err_iounmap; 942 } 943 944 platform_set_drvdata(pdev, glue); 945 pm_runtime_enable(&pdev->dev); 946 ret = dsps_create_musb_pdev(glue, pdev); 947 if (ret) 948 goto err; 949 950 return 0; 951 952 err: 953 pm_runtime_disable(&pdev->dev); 954 err_iounmap: 955 iounmap(glue->usbss_base); 956 return ret; 957 } 958 959 static int dsps_remove(struct platform_device *pdev) 960 { 961 struct dsps_glue *glue = platform_get_drvdata(pdev); 962 963 platform_device_unregister(glue->musb); 964 965 pm_runtime_disable(&pdev->dev); 966 iounmap(glue->usbss_base); 967 968 return 0; 969 } 970 971 static const struct dsps_musb_wrapper am33xx_driver_data = { 972 .revision = 0x00, 973 .control = 0x14, 974 .status = 0x18, 975 .epintr_set = 0x38, 976 .epintr_clear = 0x40, 977 .epintr_status = 0x30, 978 .coreintr_set = 0x3c, 979 .coreintr_clear = 0x44, 980 .coreintr_status = 0x34, 981 .phy_utmi = 0xe0, 982 .mode = 0xe8, 983 .tx_mode = 0x70, 984 .rx_mode = 0x74, 985 .reset = 0, 986 .otg_disable = 21, 987 .iddig = 8, 988 .iddig_mux = 7, 989 .usb_shift = 0, 990 .usb_mask = 0x1ff, 991 .usb_bitmap = (0x1ff << 0), 992 .drvvbus = 8, 993 .txep_shift = 0, 994 .txep_mask = 0xffff, 995 .txep_bitmap = (0xffff << 0), 996 .rxep_shift = 16, 997 .rxep_mask = 0xfffe, 998 .rxep_bitmap = (0xfffe << 16), 999 .poll_timeout = 2000, /* ms */ 1000 }; 1001 1002 static const struct of_device_id musb_dsps_of_match[] = { 1003 { .compatible = "ti,musb-am33xx", 1004 .data = &am33xx_driver_data, }, 1005 { .compatible = "ti,musb-dm816", 1006 .data = &am33xx_driver_data, }, 1007 { }, 1008 }; 1009 MODULE_DEVICE_TABLE(of, musb_dsps_of_match); 1010 1011 #ifdef CONFIG_PM_SLEEP 1012 static int dsps_suspend(struct device *dev) 1013 { 1014 struct dsps_glue *glue = dev_get_drvdata(dev); 1015 const struct dsps_musb_wrapper *wrp = glue->wrp; 1016 struct musb *musb = platform_get_drvdata(glue->musb); 1017 void __iomem *mbase; 1018 1019 del_timer_sync(&glue->timer); 1020 1021 if (!musb) 1022 /* This can happen if the musb device is in -EPROBE_DEFER */ 1023 return 0; 1024 1025 mbase = musb->ctrl_base; 1026 glue->context.control = musb_readl(mbase, wrp->control); 1027 glue->context.epintr = musb_readl(mbase, wrp->epintr_set); 1028 glue->context.coreintr = musb_readl(mbase, wrp->coreintr_set); 1029 glue->context.phy_utmi = musb_readl(mbase, wrp->phy_utmi); 1030 glue->context.mode = musb_readl(mbase, wrp->mode); 1031 glue->context.tx_mode = musb_readl(mbase, wrp->tx_mode); 1032 glue->context.rx_mode = musb_readl(mbase, wrp->rx_mode); 1033 1034 dsps_dma_controller_suspend(glue); 1035 1036 return 0; 1037 } 1038 1039 static int dsps_resume(struct device *dev) 1040 { 1041 struct dsps_glue *glue = dev_get_drvdata(dev); 1042 const struct dsps_musb_wrapper *wrp = glue->wrp; 1043 struct musb *musb = platform_get_drvdata(glue->musb); 1044 void __iomem *mbase; 1045 1046 if (!musb) 1047 return 0; 1048 1049 dsps_dma_controller_resume(glue); 1050 1051 mbase = musb->ctrl_base; 1052 musb_writel(mbase, wrp->control, glue->context.control); 1053 musb_writel(mbase, wrp->epintr_set, glue->context.epintr); 1054 musb_writel(mbase, wrp->coreintr_set, glue->context.coreintr); 1055 musb_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi); 1056 musb_writel(mbase, wrp->mode, glue->context.mode); 1057 musb_writel(mbase, wrp->tx_mode, glue->context.tx_mode); 1058 musb_writel(mbase, wrp->rx_mode, glue->context.rx_mode); 1059 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE && 1060 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) 1061 dsps_mod_timer(glue, -1); 1062 1063 return 0; 1064 } 1065 #endif 1066 1067 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); 1068 1069 static struct platform_driver dsps_usbss_driver = { 1070 .probe = dsps_probe, 1071 .remove = dsps_remove, 1072 .driver = { 1073 .name = "musb-dsps", 1074 .pm = &dsps_pm_ops, 1075 .of_match_table = musb_dsps_of_match, 1076 }, 1077 }; 1078 1079 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); 1080 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); 1081 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); 1082 MODULE_LICENSE("GPL v2"); 1083 1084 module_platform_driver(dsps_usbss_driver); 1085