1 /* 2 * Texas Instruments DSPS platforms "glue layer" 3 * 4 * Copyright (C) 2012, by Texas Instruments 5 * 6 * Based on the am35x "glue layer" code. 7 * 8 * This file is part of the Inventra Controller Driver for Linux. 9 * 10 * The Inventra Controller Driver for Linux is free software; you 11 * can redistribute it and/or modify it under the terms of the GNU 12 * General Public License version 2 as published by the Free Software 13 * Foundation. 14 * 15 * The Inventra Controller Driver for Linux is distributed in 16 * the hope that it will be useful, but WITHOUT ANY WARRANTY; 17 * without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 * License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with The Inventra Controller Driver for Linux ; if not, 23 * write to the Free Software Foundation, Inc., 59 Temple Place, 24 * Suite 330, Boston, MA 02111-1307 USA 25 * 26 * musb_dsps.c will be a common file for all the TI DSPS platforms 27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. 28 * For now only ti81x is using this and in future davinci.c, am35x.c 29 * da8xx.c would be merged to this file after testing. 30 */ 31 32 #include <linux/io.h> 33 #include <linux/err.h> 34 #include <linux/platform_device.h> 35 #include <linux/dma-mapping.h> 36 #include <linux/pm_runtime.h> 37 #include <linux/module.h> 38 #include <linux/usb/usb_phy_gen_xceiv.h> 39 #include <linux/platform_data/usb-omap.h> 40 #include <linux/sizes.h> 41 42 #include <linux/of.h> 43 #include <linux/of_device.h> 44 #include <linux/of_address.h> 45 #include <linux/of_irq.h> 46 #include <linux/usb/of.h> 47 48 #include <linux/debugfs.h> 49 50 #include "musb_core.h" 51 52 static const struct of_device_id musb_dsps_of_match[]; 53 54 /** 55 * avoid using musb_readx()/musb_writex() as glue layer should not be 56 * dependent on musb core layer symbols. 57 */ 58 static inline u8 dsps_readb(const void __iomem *addr, unsigned offset) 59 { return __raw_readb(addr + offset); } 60 61 static inline u32 dsps_readl(const void __iomem *addr, unsigned offset) 62 { return __raw_readl(addr + offset); } 63 64 static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data) 65 { __raw_writeb(data, addr + offset); } 66 67 static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data) 68 { __raw_writel(data, addr + offset); } 69 70 /** 71 * DSPS musb wrapper register offset. 72 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS 73 * musb ips. 74 */ 75 struct dsps_musb_wrapper { 76 u16 revision; 77 u16 control; 78 u16 status; 79 u16 epintr_set; 80 u16 epintr_clear; 81 u16 epintr_status; 82 u16 coreintr_set; 83 u16 coreintr_clear; 84 u16 coreintr_status; 85 u16 phy_utmi; 86 u16 mode; 87 u16 tx_mode; 88 u16 rx_mode; 89 90 /* bit positions for control */ 91 unsigned reset:5; 92 93 /* bit positions for interrupt */ 94 unsigned usb_shift:5; 95 u32 usb_mask; 96 u32 usb_bitmap; 97 unsigned drvvbus:5; 98 99 unsigned txep_shift:5; 100 u32 txep_mask; 101 u32 txep_bitmap; 102 103 unsigned rxep_shift:5; 104 u32 rxep_mask; 105 u32 rxep_bitmap; 106 107 /* bit positions for phy_utmi */ 108 unsigned otg_disable:5; 109 110 /* bit positions for mode */ 111 unsigned iddig:5; 112 unsigned iddig_mux:5; 113 /* miscellaneous stuff */ 114 u8 poll_seconds; 115 }; 116 117 /* 118 * register shadow for suspend 119 */ 120 struct dsps_context { 121 u32 control; 122 u32 epintr; 123 u32 coreintr; 124 u32 phy_utmi; 125 u32 mode; 126 u32 tx_mode; 127 u32 rx_mode; 128 }; 129 130 /** 131 * DSPS glue structure. 132 */ 133 struct dsps_glue { 134 struct device *dev; 135 struct platform_device *musb; /* child musb pdev */ 136 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ 137 struct timer_list timer; /* otg_workaround timer */ 138 unsigned long last_timer; /* last timer data for each instance */ 139 140 struct dsps_context context; 141 struct debugfs_regset32 regset; 142 struct dentry *dbgfs_root; 143 }; 144 145 static const struct debugfs_reg32 dsps_musb_regs[] = { 146 { "revision", 0x00 }, 147 { "control", 0x14 }, 148 { "status", 0x18 }, 149 { "eoi", 0x24 }, 150 { "intr0_stat", 0x30 }, 151 { "intr1_stat", 0x34 }, 152 { "intr0_set", 0x38 }, 153 { "intr1_set", 0x3c }, 154 { "txmode", 0x70 }, 155 { "rxmode", 0x74 }, 156 { "autoreq", 0xd0 }, 157 { "srpfixtime", 0xd4 }, 158 { "tdown", 0xd8 }, 159 { "phy_utmi", 0xe0 }, 160 { "mode", 0xe8 }, 161 }; 162 163 static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) 164 { 165 struct device *dev = musb->controller; 166 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 167 168 if (timeout == 0) 169 timeout = jiffies + msecs_to_jiffies(3); 170 171 /* Never idle if active, or when VBUS timeout is not set as host */ 172 if (musb->is_active || (musb->a_wait_bcon == 0 && 173 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { 174 dev_dbg(musb->controller, "%s active, deleting timer\n", 175 usb_otg_state_string(musb->xceiv->state)); 176 del_timer(&glue->timer); 177 glue->last_timer = jiffies; 178 return; 179 } 180 if (musb->port_mode != MUSB_PORT_MODE_DUAL_ROLE) 181 return; 182 183 if (!musb->g.dev.driver) 184 return; 185 186 if (time_after(glue->last_timer, timeout) && 187 timer_pending(&glue->timer)) { 188 dev_dbg(musb->controller, 189 "Longer idle timer already pending, ignoring...\n"); 190 return; 191 } 192 glue->last_timer = timeout; 193 194 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", 195 usb_otg_state_string(musb->xceiv->state), 196 jiffies_to_msecs(timeout - jiffies)); 197 mod_timer(&glue->timer, timeout); 198 } 199 200 /** 201 * dsps_musb_enable - enable interrupts 202 */ 203 static void dsps_musb_enable(struct musb *musb) 204 { 205 struct device *dev = musb->controller; 206 struct platform_device *pdev = to_platform_device(dev->parent); 207 struct dsps_glue *glue = platform_get_drvdata(pdev); 208 const struct dsps_musb_wrapper *wrp = glue->wrp; 209 void __iomem *reg_base = musb->ctrl_base; 210 u32 epmask, coremask; 211 212 /* Workaround: setup IRQs through both register sets. */ 213 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | 214 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); 215 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); 216 217 dsps_writel(reg_base, wrp->epintr_set, epmask); 218 dsps_writel(reg_base, wrp->coreintr_set, coremask); 219 /* Force the DRVVBUS IRQ so we can start polling for ID change. */ 220 dsps_writel(reg_base, wrp->coreintr_set, 221 (1 << wrp->drvvbus) << wrp->usb_shift); 222 dsps_musb_try_idle(musb, 0); 223 } 224 225 /** 226 * dsps_musb_disable - disable HDRC and flush interrupts 227 */ 228 static void dsps_musb_disable(struct musb *musb) 229 { 230 struct device *dev = musb->controller; 231 struct platform_device *pdev = to_platform_device(dev->parent); 232 struct dsps_glue *glue = platform_get_drvdata(pdev); 233 const struct dsps_musb_wrapper *wrp = glue->wrp; 234 void __iomem *reg_base = musb->ctrl_base; 235 236 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); 237 dsps_writel(reg_base, wrp->epintr_clear, 238 wrp->txep_bitmap | wrp->rxep_bitmap); 239 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); 240 } 241 242 static void otg_timer(unsigned long _musb) 243 { 244 struct musb *musb = (void *)_musb; 245 void __iomem *mregs = musb->mregs; 246 struct device *dev = musb->controller; 247 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 248 const struct dsps_musb_wrapper *wrp = glue->wrp; 249 u8 devctl; 250 unsigned long flags; 251 int skip_session = 0; 252 253 /* 254 * We poll because DSPS IP's won't expose several OTG-critical 255 * status change events (from the transceiver) otherwise. 256 */ 257 devctl = dsps_readb(mregs, MUSB_DEVCTL); 258 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 259 usb_otg_state_string(musb->xceiv->state)); 260 261 spin_lock_irqsave(&musb->lock, flags); 262 switch (musb->xceiv->state) { 263 case OTG_STATE_A_WAIT_BCON: 264 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); 265 skip_session = 1; 266 /* fall */ 267 268 case OTG_STATE_A_IDLE: 269 case OTG_STATE_B_IDLE: 270 if (devctl & MUSB_DEVCTL_BDEVICE) { 271 musb->xceiv->state = OTG_STATE_B_IDLE; 272 MUSB_DEV_MODE(musb); 273 } else { 274 musb->xceiv->state = OTG_STATE_A_IDLE; 275 MUSB_HST_MODE(musb); 276 } 277 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session) 278 dsps_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION); 279 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); 280 break; 281 case OTG_STATE_A_WAIT_VFALL: 282 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 283 dsps_writel(musb->ctrl_base, wrp->coreintr_set, 284 MUSB_INTR_VBUSERROR << wrp->usb_shift); 285 break; 286 default: 287 break; 288 } 289 spin_unlock_irqrestore(&musb->lock, flags); 290 } 291 292 static irqreturn_t dsps_interrupt(int irq, void *hci) 293 { 294 struct musb *musb = hci; 295 void __iomem *reg_base = musb->ctrl_base; 296 struct device *dev = musb->controller; 297 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 298 const struct dsps_musb_wrapper *wrp = glue->wrp; 299 unsigned long flags; 300 irqreturn_t ret = IRQ_NONE; 301 u32 epintr, usbintr; 302 303 spin_lock_irqsave(&musb->lock, flags); 304 305 /* Get endpoint interrupts */ 306 epintr = dsps_readl(reg_base, wrp->epintr_status); 307 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; 308 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; 309 310 if (epintr) 311 dsps_writel(reg_base, wrp->epintr_status, epintr); 312 313 /* Get usb core interrupts */ 314 usbintr = dsps_readl(reg_base, wrp->coreintr_status); 315 if (!usbintr && !epintr) 316 goto out; 317 318 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; 319 if (usbintr) 320 dsps_writel(reg_base, wrp->coreintr_status, usbintr); 321 322 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", 323 usbintr, epintr); 324 /* 325 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for 326 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to 327 * switch appropriately between halves of the OTG state machine. 328 * Managing DEVCTL.SESSION per Mentor docs requires that we know its 329 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. 330 * Also, DRVVBUS pulses for SRP (but not at 5V) ... 331 */ 332 if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE) 333 pr_info("CAUTION: musb: Babble Interrupt Occurred\n"); 334 335 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { 336 int drvvbus = dsps_readl(reg_base, wrp->status); 337 void __iomem *mregs = musb->mregs; 338 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL); 339 int err; 340 341 err = musb->int_usb & MUSB_INTR_VBUSERROR; 342 if (err) { 343 /* 344 * The Mentor core doesn't debounce VBUS as needed 345 * to cope with device connect current spikes. This 346 * means it's not uncommon for bus-powered devices 347 * to get VBUS errors during enumeration. 348 * 349 * This is a workaround, but newer RTL from Mentor 350 * seems to allow a better one: "re"-starting sessions 351 * without waiting for VBUS to stop registering in 352 * devctl. 353 */ 354 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 355 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 356 mod_timer(&glue->timer, 357 jiffies + wrp->poll_seconds * HZ); 358 WARNING("VBUS error workaround (delay coming)\n"); 359 } else if (drvvbus) { 360 MUSB_HST_MODE(musb); 361 musb->xceiv->otg->default_a = 1; 362 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 363 del_timer(&glue->timer); 364 } else { 365 musb->is_active = 0; 366 MUSB_DEV_MODE(musb); 367 musb->xceiv->otg->default_a = 0; 368 musb->xceiv->state = OTG_STATE_B_IDLE; 369 } 370 371 /* NOTE: this must complete power-on within 100 ms. */ 372 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 373 drvvbus ? "on" : "off", 374 usb_otg_state_string(musb->xceiv->state), 375 err ? " ERROR" : "", 376 devctl); 377 ret = IRQ_HANDLED; 378 } 379 380 if (musb->int_tx || musb->int_rx || musb->int_usb) 381 ret |= musb_interrupt(musb); 382 383 /* Poll for ID change in OTG port mode */ 384 if (musb->xceiv->state == OTG_STATE_B_IDLE && 385 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) 386 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); 387 out: 388 spin_unlock_irqrestore(&musb->lock, flags); 389 390 return ret; 391 } 392 393 static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue) 394 { 395 struct dentry *root; 396 struct dentry *file; 397 char buf[128]; 398 399 sprintf(buf, "%s.dsps", dev_name(musb->controller)); 400 root = debugfs_create_dir(buf, NULL); 401 if (!root) 402 return -ENOMEM; 403 glue->dbgfs_root = root; 404 405 glue->regset.regs = dsps_musb_regs; 406 glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs); 407 glue->regset.base = musb->ctrl_base; 408 409 file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset); 410 if (!file) { 411 debugfs_remove_recursive(root); 412 return -ENOMEM; 413 } 414 return 0; 415 } 416 417 static int dsps_musb_init(struct musb *musb) 418 { 419 struct device *dev = musb->controller; 420 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 421 struct platform_device *parent = to_platform_device(dev->parent); 422 const struct dsps_musb_wrapper *wrp = glue->wrp; 423 void __iomem *reg_base; 424 struct resource *r; 425 u32 rev, val; 426 int ret; 427 428 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control"); 429 if (!r) 430 return -EINVAL; 431 432 reg_base = devm_ioremap_resource(dev, r); 433 if (IS_ERR(reg_base)) 434 return PTR_ERR(reg_base); 435 musb->ctrl_base = reg_base; 436 437 /* NOP driver needs change if supporting dual instance */ 438 musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0); 439 if (IS_ERR(musb->xceiv)) 440 return PTR_ERR(musb->xceiv); 441 442 /* Returns zero if e.g. not clocked */ 443 rev = dsps_readl(reg_base, wrp->revision); 444 if (!rev) 445 return -ENODEV; 446 447 usb_phy_init(musb->xceiv); 448 setup_timer(&glue->timer, otg_timer, (unsigned long) musb); 449 450 /* Reset the musb */ 451 dsps_writel(reg_base, wrp->control, (1 << wrp->reset)); 452 453 musb->isr = dsps_interrupt; 454 455 /* reset the otgdisable bit, needed for host mode to work */ 456 val = dsps_readl(reg_base, wrp->phy_utmi); 457 val &= ~(1 << wrp->otg_disable); 458 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); 459 460 ret = dsps_musb_dbg_init(musb, glue); 461 if (ret) 462 return ret; 463 464 return 0; 465 } 466 467 static int dsps_musb_exit(struct musb *musb) 468 { 469 struct device *dev = musb->controller; 470 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 471 472 del_timer_sync(&glue->timer); 473 usb_phy_shutdown(musb->xceiv); 474 debugfs_remove_recursive(glue->dbgfs_root); 475 476 return 0; 477 } 478 479 static int dsps_musb_set_mode(struct musb *musb, u8 mode) 480 { 481 struct device *dev = musb->controller; 482 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 483 const struct dsps_musb_wrapper *wrp = glue->wrp; 484 void __iomem *ctrl_base = musb->ctrl_base; 485 void __iomem *base = musb->mregs; 486 u32 reg; 487 488 reg = dsps_readl(base, wrp->mode); 489 490 switch (mode) { 491 case MUSB_HOST: 492 reg &= ~(1 << wrp->iddig); 493 494 /* 495 * if we're setting mode to host-only or device-only, we're 496 * going to ignore whatever the PHY sends us and just force 497 * ID pin status by SW 498 */ 499 reg |= (1 << wrp->iddig_mux); 500 501 dsps_writel(base, wrp->mode, reg); 502 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02); 503 break; 504 case MUSB_PERIPHERAL: 505 reg |= (1 << wrp->iddig); 506 507 /* 508 * if we're setting mode to host-only or device-only, we're 509 * going to ignore whatever the PHY sends us and just force 510 * ID pin status by SW 511 */ 512 reg |= (1 << wrp->iddig_mux); 513 514 dsps_writel(base, wrp->mode, reg); 515 break; 516 case MUSB_OTG: 517 dsps_writel(base, wrp->phy_utmi, 0x02); 518 break; 519 default: 520 dev_err(glue->dev, "unsupported mode %d\n", mode); 521 return -EINVAL; 522 } 523 524 return 0; 525 } 526 527 static struct musb_platform_ops dsps_ops = { 528 .init = dsps_musb_init, 529 .exit = dsps_musb_exit, 530 531 .enable = dsps_musb_enable, 532 .disable = dsps_musb_disable, 533 534 .try_idle = dsps_musb_try_idle, 535 .set_mode = dsps_musb_set_mode, 536 }; 537 538 static u64 musb_dmamask = DMA_BIT_MASK(32); 539 540 static int get_int_prop(struct device_node *dn, const char *s) 541 { 542 int ret; 543 u32 val; 544 545 ret = of_property_read_u32(dn, s, &val); 546 if (ret) 547 return 0; 548 return val; 549 } 550 551 static int get_musb_port_mode(struct device *dev) 552 { 553 enum usb_dr_mode mode; 554 555 mode = of_usb_get_dr_mode(dev->of_node); 556 switch (mode) { 557 case USB_DR_MODE_HOST: 558 return MUSB_PORT_MODE_HOST; 559 560 case USB_DR_MODE_PERIPHERAL: 561 return MUSB_PORT_MODE_GADGET; 562 563 case USB_DR_MODE_UNKNOWN: 564 case USB_DR_MODE_OTG: 565 default: 566 return MUSB_PORT_MODE_DUAL_ROLE; 567 } 568 } 569 570 static int dsps_create_musb_pdev(struct dsps_glue *glue, 571 struct platform_device *parent) 572 { 573 struct musb_hdrc_platform_data pdata; 574 struct resource resources[2]; 575 struct resource *res; 576 struct device *dev = &parent->dev; 577 struct musb_hdrc_config *config; 578 struct platform_device *musb; 579 struct device_node *dn = parent->dev.of_node; 580 int ret; 581 582 memset(resources, 0, sizeof(resources)); 583 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc"); 584 if (!res) { 585 dev_err(dev, "failed to get memory.\n"); 586 return -EINVAL; 587 } 588 resources[0] = *res; 589 590 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc"); 591 if (!res) { 592 dev_err(dev, "failed to get irq.\n"); 593 return -EINVAL; 594 } 595 resources[1] = *res; 596 597 /* allocate the child platform device */ 598 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); 599 if (!musb) { 600 dev_err(dev, "failed to allocate musb device\n"); 601 return -ENOMEM; 602 } 603 604 musb->dev.parent = dev; 605 musb->dev.dma_mask = &musb_dmamask; 606 musb->dev.coherent_dma_mask = musb_dmamask; 607 musb->dev.of_node = of_node_get(dn); 608 609 glue->musb = musb; 610 611 ret = platform_device_add_resources(musb, resources, 612 ARRAY_SIZE(resources)); 613 if (ret) { 614 dev_err(dev, "failed to add resources\n"); 615 goto err; 616 } 617 618 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL); 619 if (!config) { 620 dev_err(dev, "failed to allocate musb hdrc config\n"); 621 ret = -ENOMEM; 622 goto err; 623 } 624 pdata.config = config; 625 pdata.platform_ops = &dsps_ops; 626 627 config->num_eps = get_int_prop(dn, "mentor,num-eps"); 628 config->ram_bits = get_int_prop(dn, "mentor,ram-bits"); 629 config->host_port_deassert_reset_at_resume = 1; 630 pdata.mode = get_musb_port_mode(dev); 631 /* DT keeps this entry in mA, musb expects it as per USB spec */ 632 pdata.power = get_int_prop(dn, "mentor,power") / 2; 633 config->multipoint = of_property_read_bool(dn, "mentor,multipoint"); 634 635 ret = platform_device_add_data(musb, &pdata, sizeof(pdata)); 636 if (ret) { 637 dev_err(dev, "failed to add platform_data\n"); 638 goto err; 639 } 640 641 ret = platform_device_add(musb); 642 if (ret) { 643 dev_err(dev, "failed to register musb device\n"); 644 goto err; 645 } 646 return 0; 647 648 err: 649 platform_device_put(musb); 650 return ret; 651 } 652 653 static int dsps_probe(struct platform_device *pdev) 654 { 655 const struct of_device_id *match; 656 const struct dsps_musb_wrapper *wrp; 657 struct dsps_glue *glue; 658 int ret; 659 660 if (!strcmp(pdev->name, "musb-hdrc")) 661 return -ENODEV; 662 663 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node); 664 if (!match) { 665 dev_err(&pdev->dev, "fail to get matching of_match struct\n"); 666 return -EINVAL; 667 } 668 wrp = match->data; 669 670 /* allocate glue */ 671 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); 672 if (!glue) { 673 dev_err(&pdev->dev, "unable to allocate glue memory\n"); 674 return -ENOMEM; 675 } 676 677 glue->dev = &pdev->dev; 678 glue->wrp = wrp; 679 680 platform_set_drvdata(pdev, glue); 681 pm_runtime_enable(&pdev->dev); 682 683 ret = pm_runtime_get_sync(&pdev->dev); 684 if (ret < 0) { 685 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); 686 goto err2; 687 } 688 689 ret = dsps_create_musb_pdev(glue, pdev); 690 if (ret) 691 goto err3; 692 693 return 0; 694 695 err3: 696 pm_runtime_put(&pdev->dev); 697 err2: 698 pm_runtime_disable(&pdev->dev); 699 return ret; 700 } 701 702 static int dsps_remove(struct platform_device *pdev) 703 { 704 struct dsps_glue *glue = platform_get_drvdata(pdev); 705 706 platform_device_unregister(glue->musb); 707 708 /* disable usbss clocks */ 709 pm_runtime_put(&pdev->dev); 710 pm_runtime_disable(&pdev->dev); 711 712 return 0; 713 } 714 715 static const struct dsps_musb_wrapper am33xx_driver_data = { 716 .revision = 0x00, 717 .control = 0x14, 718 .status = 0x18, 719 .epintr_set = 0x38, 720 .epintr_clear = 0x40, 721 .epintr_status = 0x30, 722 .coreintr_set = 0x3c, 723 .coreintr_clear = 0x44, 724 .coreintr_status = 0x34, 725 .phy_utmi = 0xe0, 726 .mode = 0xe8, 727 .tx_mode = 0x70, 728 .rx_mode = 0x74, 729 .reset = 0, 730 .otg_disable = 21, 731 .iddig = 8, 732 .iddig_mux = 7, 733 .usb_shift = 0, 734 .usb_mask = 0x1ff, 735 .usb_bitmap = (0x1ff << 0), 736 .drvvbus = 8, 737 .txep_shift = 0, 738 .txep_mask = 0xffff, 739 .txep_bitmap = (0xffff << 0), 740 .rxep_shift = 16, 741 .rxep_mask = 0xfffe, 742 .rxep_bitmap = (0xfffe << 16), 743 .poll_seconds = 2, 744 }; 745 746 static const struct of_device_id musb_dsps_of_match[] = { 747 { .compatible = "ti,musb-am33xx", 748 .data = (void *) &am33xx_driver_data, }, 749 { }, 750 }; 751 MODULE_DEVICE_TABLE(of, musb_dsps_of_match); 752 753 #ifdef CONFIG_PM 754 static int dsps_suspend(struct device *dev) 755 { 756 struct dsps_glue *glue = dev_get_drvdata(dev); 757 const struct dsps_musb_wrapper *wrp = glue->wrp; 758 struct musb *musb = platform_get_drvdata(glue->musb); 759 void __iomem *mbase = musb->ctrl_base; 760 761 glue->context.control = dsps_readl(mbase, wrp->control); 762 glue->context.epintr = dsps_readl(mbase, wrp->epintr_set); 763 glue->context.coreintr = dsps_readl(mbase, wrp->coreintr_set); 764 glue->context.phy_utmi = dsps_readl(mbase, wrp->phy_utmi); 765 glue->context.mode = dsps_readl(mbase, wrp->mode); 766 glue->context.tx_mode = dsps_readl(mbase, wrp->tx_mode); 767 glue->context.rx_mode = dsps_readl(mbase, wrp->rx_mode); 768 769 return 0; 770 } 771 772 static int dsps_resume(struct device *dev) 773 { 774 struct dsps_glue *glue = dev_get_drvdata(dev); 775 const struct dsps_musb_wrapper *wrp = glue->wrp; 776 struct musb *musb = platform_get_drvdata(glue->musb); 777 void __iomem *mbase = musb->ctrl_base; 778 779 dsps_writel(mbase, wrp->control, glue->context.control); 780 dsps_writel(mbase, wrp->epintr_set, glue->context.epintr); 781 dsps_writel(mbase, wrp->coreintr_set, glue->context.coreintr); 782 dsps_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi); 783 dsps_writel(mbase, wrp->mode, glue->context.mode); 784 dsps_writel(mbase, wrp->tx_mode, glue->context.tx_mode); 785 dsps_writel(mbase, wrp->rx_mode, glue->context.rx_mode); 786 787 return 0; 788 } 789 #endif 790 791 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); 792 793 static struct platform_driver dsps_usbss_driver = { 794 .probe = dsps_probe, 795 .remove = dsps_remove, 796 .driver = { 797 .name = "musb-dsps", 798 .pm = &dsps_pm_ops, 799 .of_match_table = musb_dsps_of_match, 800 }, 801 }; 802 803 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); 804 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); 805 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); 806 MODULE_LICENSE("GPL v2"); 807 808 module_platform_driver(dsps_usbss_driver); 809