1 /* 2 * Texas Instruments DSPS platforms "glue layer" 3 * 4 * Copyright (C) 2012, by Texas Instruments 5 * 6 * Based on the am35x "glue layer" code. 7 * 8 * This file is part of the Inventra Controller Driver for Linux. 9 * 10 * The Inventra Controller Driver for Linux is free software; you 11 * can redistribute it and/or modify it under the terms of the GNU 12 * General Public License version 2 as published by the Free Software 13 * Foundation. 14 * 15 * The Inventra Controller Driver for Linux is distributed in 16 * the hope that it will be useful, but WITHOUT ANY WARRANTY; 17 * without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 * License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with The Inventra Controller Driver for Linux ; if not, 23 * write to the Free Software Foundation, Inc., 59 Temple Place, 24 * Suite 330, Boston, MA 02111-1307 USA 25 * 26 * musb_dsps.c will be a common file for all the TI DSPS platforms 27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. 28 * For now only ti81x is using this and in future davinci.c, am35x.c 29 * da8xx.c would be merged to this file after testing. 30 */ 31 32 #include <linux/io.h> 33 #include <linux/err.h> 34 #include <linux/platform_device.h> 35 #include <linux/dma-mapping.h> 36 #include <linux/pm_runtime.h> 37 #include <linux/module.h> 38 #include <linux/usb/usb_phy_generic.h> 39 #include <linux/platform_data/usb-omap.h> 40 #include <linux/sizes.h> 41 42 #include <linux/of.h> 43 #include <linux/of_device.h> 44 #include <linux/of_address.h> 45 #include <linux/of_irq.h> 46 #include <linux/usb/of.h> 47 48 #include <linux/debugfs.h> 49 50 #include "musb_core.h" 51 52 static const struct of_device_id musb_dsps_of_match[]; 53 54 /** 55 * DSPS musb wrapper register offset. 56 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS 57 * musb ips. 58 */ 59 struct dsps_musb_wrapper { 60 u16 revision; 61 u16 control; 62 u16 status; 63 u16 epintr_set; 64 u16 epintr_clear; 65 u16 epintr_status; 66 u16 coreintr_set; 67 u16 coreintr_clear; 68 u16 coreintr_status; 69 u16 phy_utmi; 70 u16 mode; 71 u16 tx_mode; 72 u16 rx_mode; 73 74 /* bit positions for control */ 75 unsigned reset:5; 76 77 /* bit positions for interrupt */ 78 unsigned usb_shift:5; 79 u32 usb_mask; 80 u32 usb_bitmap; 81 unsigned drvvbus:5; 82 83 unsigned txep_shift:5; 84 u32 txep_mask; 85 u32 txep_bitmap; 86 87 unsigned rxep_shift:5; 88 u32 rxep_mask; 89 u32 rxep_bitmap; 90 91 /* bit positions for phy_utmi */ 92 unsigned otg_disable:5; 93 94 /* bit positions for mode */ 95 unsigned iddig:5; 96 unsigned iddig_mux:5; 97 /* miscellaneous stuff */ 98 unsigned poll_timeout; 99 }; 100 101 /* 102 * register shadow for suspend 103 */ 104 struct dsps_context { 105 u32 control; 106 u32 epintr; 107 u32 coreintr; 108 u32 phy_utmi; 109 u32 mode; 110 u32 tx_mode; 111 u32 rx_mode; 112 }; 113 114 /** 115 * DSPS glue structure. 116 */ 117 struct dsps_glue { 118 struct device *dev; 119 struct platform_device *musb; /* child musb pdev */ 120 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ 121 struct timer_list timer; /* otg_workaround timer */ 122 unsigned long last_timer; /* last timer data for each instance */ 123 bool sw_babble_enabled; 124 125 struct dsps_context context; 126 struct debugfs_regset32 regset; 127 struct dentry *dbgfs_root; 128 }; 129 130 static const struct debugfs_reg32 dsps_musb_regs[] = { 131 { "revision", 0x00 }, 132 { "control", 0x14 }, 133 { "status", 0x18 }, 134 { "eoi", 0x24 }, 135 { "intr0_stat", 0x30 }, 136 { "intr1_stat", 0x34 }, 137 { "intr0_set", 0x38 }, 138 { "intr1_set", 0x3c }, 139 { "txmode", 0x70 }, 140 { "rxmode", 0x74 }, 141 { "autoreq", 0xd0 }, 142 { "srpfixtime", 0xd4 }, 143 { "tdown", 0xd8 }, 144 { "phy_utmi", 0xe0 }, 145 { "mode", 0xe8 }, 146 }; 147 148 /** 149 * dsps_musb_enable - enable interrupts 150 */ 151 static void dsps_musb_enable(struct musb *musb) 152 { 153 struct device *dev = musb->controller; 154 struct platform_device *pdev = to_platform_device(dev->parent); 155 struct dsps_glue *glue = platform_get_drvdata(pdev); 156 const struct dsps_musb_wrapper *wrp = glue->wrp; 157 void __iomem *reg_base = musb->ctrl_base; 158 u32 epmask, coremask; 159 160 /* Workaround: setup IRQs through both register sets. */ 161 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | 162 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); 163 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); 164 165 musb_writel(reg_base, wrp->epintr_set, epmask); 166 musb_writel(reg_base, wrp->coreintr_set, coremask); 167 /* start polling for ID change in dual-role idle mode */ 168 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE && 169 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) 170 mod_timer(&glue->timer, jiffies + 171 msecs_to_jiffies(wrp->poll_timeout)); 172 } 173 174 /** 175 * dsps_musb_disable - disable HDRC and flush interrupts 176 */ 177 static void dsps_musb_disable(struct musb *musb) 178 { 179 struct device *dev = musb->controller; 180 struct platform_device *pdev = to_platform_device(dev->parent); 181 struct dsps_glue *glue = platform_get_drvdata(pdev); 182 const struct dsps_musb_wrapper *wrp = glue->wrp; 183 void __iomem *reg_base = musb->ctrl_base; 184 185 musb_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); 186 musb_writel(reg_base, wrp->epintr_clear, 187 wrp->txep_bitmap | wrp->rxep_bitmap); 188 musb_writeb(musb->mregs, MUSB_DEVCTL, 0); 189 } 190 191 static void otg_timer(unsigned long _musb) 192 { 193 struct musb *musb = (void *)_musb; 194 void __iomem *mregs = musb->mregs; 195 struct device *dev = musb->controller; 196 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 197 const struct dsps_musb_wrapper *wrp = glue->wrp; 198 u8 devctl; 199 unsigned long flags; 200 int skip_session = 0; 201 int err; 202 203 err = pm_runtime_get_sync(dev); 204 if (err < 0) 205 dev_err(dev, "Poll could not pm_runtime_get: %i\n", err); 206 207 /* 208 * We poll because DSPS IP's won't expose several OTG-critical 209 * status change events (from the transceiver) otherwise. 210 */ 211 devctl = musb_readb(mregs, MUSB_DEVCTL); 212 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 213 usb_otg_state_string(musb->xceiv->otg->state)); 214 215 spin_lock_irqsave(&musb->lock, flags); 216 switch (musb->xceiv->otg->state) { 217 case OTG_STATE_A_WAIT_VRISE: 218 mod_timer(&glue->timer, jiffies + 219 msecs_to_jiffies(wrp->poll_timeout)); 220 break; 221 case OTG_STATE_A_WAIT_BCON: 222 musb_writeb(musb->mregs, MUSB_DEVCTL, 0); 223 skip_session = 1; 224 /* fall */ 225 226 case OTG_STATE_A_IDLE: 227 case OTG_STATE_B_IDLE: 228 if (devctl & MUSB_DEVCTL_BDEVICE) { 229 musb->xceiv->otg->state = OTG_STATE_B_IDLE; 230 MUSB_DEV_MODE(musb); 231 } else { 232 musb->xceiv->otg->state = OTG_STATE_A_IDLE; 233 MUSB_HST_MODE(musb); 234 } 235 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session) 236 musb_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION); 237 mod_timer(&glue->timer, jiffies + 238 msecs_to_jiffies(wrp->poll_timeout)); 239 break; 240 case OTG_STATE_A_WAIT_VFALL: 241 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; 242 musb_writel(musb->ctrl_base, wrp->coreintr_set, 243 MUSB_INTR_VBUSERROR << wrp->usb_shift); 244 break; 245 default: 246 break; 247 } 248 spin_unlock_irqrestore(&musb->lock, flags); 249 250 pm_runtime_mark_last_busy(dev); 251 pm_runtime_put_autosuspend(dev); 252 } 253 254 static irqreturn_t dsps_interrupt(int irq, void *hci) 255 { 256 struct musb *musb = hci; 257 void __iomem *reg_base = musb->ctrl_base; 258 struct device *dev = musb->controller; 259 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 260 const struct dsps_musb_wrapper *wrp = glue->wrp; 261 unsigned long flags; 262 irqreturn_t ret = IRQ_NONE; 263 u32 epintr, usbintr; 264 265 spin_lock_irqsave(&musb->lock, flags); 266 267 /* Get endpoint interrupts */ 268 epintr = musb_readl(reg_base, wrp->epintr_status); 269 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; 270 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; 271 272 if (epintr) 273 musb_writel(reg_base, wrp->epintr_status, epintr); 274 275 /* Get usb core interrupts */ 276 usbintr = musb_readl(reg_base, wrp->coreintr_status); 277 if (!usbintr && !epintr) 278 goto out; 279 280 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; 281 if (usbintr) 282 musb_writel(reg_base, wrp->coreintr_status, usbintr); 283 284 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", 285 usbintr, epintr); 286 287 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { 288 int drvvbus = musb_readl(reg_base, wrp->status); 289 void __iomem *mregs = musb->mregs; 290 u8 devctl = musb_readb(mregs, MUSB_DEVCTL); 291 int err; 292 293 err = musb->int_usb & MUSB_INTR_VBUSERROR; 294 if (err) { 295 /* 296 * The Mentor core doesn't debounce VBUS as needed 297 * to cope with device connect current spikes. This 298 * means it's not uncommon for bus-powered devices 299 * to get VBUS errors during enumeration. 300 * 301 * This is a workaround, but newer RTL from Mentor 302 * seems to allow a better one: "re"-starting sessions 303 * without waiting for VBUS to stop registering in 304 * devctl. 305 */ 306 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 307 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL; 308 mod_timer(&glue->timer, jiffies + 309 msecs_to_jiffies(wrp->poll_timeout)); 310 WARNING("VBUS error workaround (delay coming)\n"); 311 } else if (drvvbus) { 312 MUSB_HST_MODE(musb); 313 musb->xceiv->otg->default_a = 1; 314 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; 315 mod_timer(&glue->timer, jiffies + 316 msecs_to_jiffies(wrp->poll_timeout)); 317 } else { 318 musb->is_active = 0; 319 MUSB_DEV_MODE(musb); 320 musb->xceiv->otg->default_a = 0; 321 musb->xceiv->otg->state = OTG_STATE_B_IDLE; 322 } 323 324 /* NOTE: this must complete power-on within 100 ms. */ 325 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 326 drvvbus ? "on" : "off", 327 usb_otg_state_string(musb->xceiv->otg->state), 328 err ? " ERROR" : "", 329 devctl); 330 ret = IRQ_HANDLED; 331 } 332 333 if (musb->int_tx || musb->int_rx || musb->int_usb) 334 ret |= musb_interrupt(musb); 335 336 /* Poll for ID change and connect */ 337 switch (musb->xceiv->otg->state) { 338 case OTG_STATE_B_IDLE: 339 case OTG_STATE_A_WAIT_BCON: 340 mod_timer(&glue->timer, jiffies + 341 msecs_to_jiffies(wrp->poll_timeout)); 342 break; 343 default: 344 break; 345 } 346 347 out: 348 spin_unlock_irqrestore(&musb->lock, flags); 349 350 return ret; 351 } 352 353 static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue) 354 { 355 struct dentry *root; 356 struct dentry *file; 357 char buf[128]; 358 359 sprintf(buf, "%s.dsps", dev_name(musb->controller)); 360 root = debugfs_create_dir(buf, NULL); 361 if (!root) 362 return -ENOMEM; 363 glue->dbgfs_root = root; 364 365 glue->regset.regs = dsps_musb_regs; 366 glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs); 367 glue->regset.base = musb->ctrl_base; 368 369 file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset); 370 if (!file) { 371 debugfs_remove_recursive(root); 372 return -ENOMEM; 373 } 374 return 0; 375 } 376 377 static int dsps_musb_init(struct musb *musb) 378 { 379 struct device *dev = musb->controller; 380 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 381 struct platform_device *parent = to_platform_device(dev->parent); 382 const struct dsps_musb_wrapper *wrp = glue->wrp; 383 void __iomem *reg_base; 384 struct resource *r; 385 u32 rev, val; 386 int ret; 387 388 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control"); 389 reg_base = devm_ioremap_resource(dev, r); 390 if (IS_ERR(reg_base)) 391 return PTR_ERR(reg_base); 392 musb->ctrl_base = reg_base; 393 394 /* NOP driver needs change if supporting dual instance */ 395 musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent, "phys", 0); 396 if (IS_ERR(musb->xceiv)) 397 return PTR_ERR(musb->xceiv); 398 399 musb->phy = devm_phy_get(dev->parent, "usb2-phy"); 400 401 /* Returns zero if e.g. not clocked */ 402 rev = musb_readl(reg_base, wrp->revision); 403 if (!rev) 404 return -ENODEV; 405 406 usb_phy_init(musb->xceiv); 407 if (IS_ERR(musb->phy)) { 408 musb->phy = NULL; 409 } else { 410 ret = phy_init(musb->phy); 411 if (ret < 0) 412 return ret; 413 ret = phy_power_on(musb->phy); 414 if (ret) { 415 phy_exit(musb->phy); 416 return ret; 417 } 418 } 419 420 setup_timer(&glue->timer, otg_timer, (unsigned long) musb); 421 422 /* Reset the musb */ 423 musb_writel(reg_base, wrp->control, (1 << wrp->reset)); 424 425 musb->isr = dsps_interrupt; 426 427 /* reset the otgdisable bit, needed for host mode to work */ 428 val = musb_readl(reg_base, wrp->phy_utmi); 429 val &= ~(1 << wrp->otg_disable); 430 musb_writel(musb->ctrl_base, wrp->phy_utmi, val); 431 432 /* 433 * Check whether the dsps version has babble control enabled. 434 * In latest silicon revision the babble control logic is enabled. 435 * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control 436 * logic enabled. 437 */ 438 val = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 439 if (val & MUSB_BABBLE_RCV_DISABLE) { 440 glue->sw_babble_enabled = true; 441 val |= MUSB_BABBLE_SW_SESSION_CTRL; 442 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, val); 443 } 444 445 mod_timer(&glue->timer, jiffies + 446 msecs_to_jiffies(glue->wrp->poll_timeout)); 447 448 return dsps_musb_dbg_init(musb, glue); 449 } 450 451 static int dsps_musb_exit(struct musb *musb) 452 { 453 struct device *dev = musb->controller; 454 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 455 456 del_timer_sync(&glue->timer); 457 usb_phy_shutdown(musb->xceiv); 458 phy_power_off(musb->phy); 459 phy_exit(musb->phy); 460 debugfs_remove_recursive(glue->dbgfs_root); 461 462 return 0; 463 } 464 465 static int dsps_musb_set_mode(struct musb *musb, u8 mode) 466 { 467 struct device *dev = musb->controller; 468 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 469 const struct dsps_musb_wrapper *wrp = glue->wrp; 470 void __iomem *ctrl_base = musb->ctrl_base; 471 u32 reg; 472 473 reg = musb_readl(ctrl_base, wrp->mode); 474 475 switch (mode) { 476 case MUSB_HOST: 477 reg &= ~(1 << wrp->iddig); 478 479 /* 480 * if we're setting mode to host-only or device-only, we're 481 * going to ignore whatever the PHY sends us and just force 482 * ID pin status by SW 483 */ 484 reg |= (1 << wrp->iddig_mux); 485 486 musb_writel(ctrl_base, wrp->mode, reg); 487 musb_writel(ctrl_base, wrp->phy_utmi, 0x02); 488 break; 489 case MUSB_PERIPHERAL: 490 reg |= (1 << wrp->iddig); 491 492 /* 493 * if we're setting mode to host-only or device-only, we're 494 * going to ignore whatever the PHY sends us and just force 495 * ID pin status by SW 496 */ 497 reg |= (1 << wrp->iddig_mux); 498 499 musb_writel(ctrl_base, wrp->mode, reg); 500 break; 501 case MUSB_OTG: 502 musb_writel(ctrl_base, wrp->phy_utmi, 0x02); 503 break; 504 default: 505 dev_err(glue->dev, "unsupported mode %d\n", mode); 506 return -EINVAL; 507 } 508 509 return 0; 510 } 511 512 static bool dsps_sw_babble_control(struct musb *musb) 513 { 514 u8 babble_ctl; 515 bool session_restart = false; 516 517 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 518 dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n", 519 babble_ctl); 520 /* 521 * check line monitor flag to check whether babble is 522 * due to noise 523 */ 524 dev_dbg(musb->controller, "STUCK_J is %s\n", 525 babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset"); 526 527 if (babble_ctl & MUSB_BABBLE_STUCK_J) { 528 int timeout = 10; 529 530 /* 531 * babble is due to noise, then set transmit idle (d7 bit) 532 * to resume normal operation 533 */ 534 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 535 babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE; 536 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl); 537 538 /* wait till line monitor flag cleared */ 539 dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n"); 540 do { 541 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 542 udelay(1); 543 } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--); 544 545 /* check whether stuck_at_j bit cleared */ 546 if (babble_ctl & MUSB_BABBLE_STUCK_J) { 547 /* 548 * real babble condition has occurred 549 * restart the controller to start the 550 * session again 551 */ 552 dev_dbg(musb->controller, "J not cleared, misc (%x)\n", 553 babble_ctl); 554 session_restart = true; 555 } 556 } else { 557 session_restart = true; 558 } 559 560 return session_restart; 561 } 562 563 static int dsps_musb_recover(struct musb *musb) 564 { 565 struct device *dev = musb->controller; 566 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 567 int session_restart = 0; 568 569 if (glue->sw_babble_enabled) 570 session_restart = dsps_sw_babble_control(musb); 571 else 572 session_restart = 1; 573 574 return session_restart ? 0 : -EPIPE; 575 } 576 577 /* Similar to am35x, dm81xx support only 32-bit read operation */ 578 static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst) 579 { 580 void __iomem *fifo = hw_ep->fifo; 581 582 if (len >= 4) { 583 ioread32_rep(fifo, dst, len >> 2); 584 dst += len & ~0x03; 585 len &= 0x03; 586 } 587 588 /* Read any remaining 1 to 3 bytes */ 589 if (len > 0) { 590 u32 val = musb_readl(fifo, 0); 591 memcpy(dst, &val, len); 592 } 593 } 594 595 static struct musb_platform_ops dsps_ops = { 596 .quirks = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP, 597 .init = dsps_musb_init, 598 .exit = dsps_musb_exit, 599 600 #ifdef CONFIG_USB_TI_CPPI41_DMA 601 .dma_init = cppi41_dma_controller_create, 602 .dma_exit = cppi41_dma_controller_destroy, 603 #endif 604 .enable = dsps_musb_enable, 605 .disable = dsps_musb_disable, 606 607 .set_mode = dsps_musb_set_mode, 608 .recover = dsps_musb_recover, 609 }; 610 611 static u64 musb_dmamask = DMA_BIT_MASK(32); 612 613 static int get_int_prop(struct device_node *dn, const char *s) 614 { 615 int ret; 616 u32 val; 617 618 ret = of_property_read_u32(dn, s, &val); 619 if (ret) 620 return 0; 621 return val; 622 } 623 624 static int get_musb_port_mode(struct device *dev) 625 { 626 enum usb_dr_mode mode; 627 628 mode = usb_get_dr_mode(dev); 629 switch (mode) { 630 case USB_DR_MODE_HOST: 631 return MUSB_PORT_MODE_HOST; 632 633 case USB_DR_MODE_PERIPHERAL: 634 return MUSB_PORT_MODE_GADGET; 635 636 case USB_DR_MODE_UNKNOWN: 637 case USB_DR_MODE_OTG: 638 default: 639 return MUSB_PORT_MODE_DUAL_ROLE; 640 } 641 } 642 643 static int dsps_create_musb_pdev(struct dsps_glue *glue, 644 struct platform_device *parent) 645 { 646 struct musb_hdrc_platform_data pdata; 647 struct resource resources[2]; 648 struct resource *res; 649 struct device *dev = &parent->dev; 650 struct musb_hdrc_config *config; 651 struct platform_device *musb; 652 struct device_node *dn = parent->dev.of_node; 653 int ret, val; 654 655 memset(resources, 0, sizeof(resources)); 656 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc"); 657 if (!res) { 658 dev_err(dev, "failed to get memory.\n"); 659 return -EINVAL; 660 } 661 resources[0] = *res; 662 663 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc"); 664 if (!res) { 665 dev_err(dev, "failed to get irq.\n"); 666 return -EINVAL; 667 } 668 resources[1] = *res; 669 670 /* allocate the child platform device */ 671 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); 672 if (!musb) { 673 dev_err(dev, "failed to allocate musb device\n"); 674 return -ENOMEM; 675 } 676 677 musb->dev.parent = dev; 678 musb->dev.dma_mask = &musb_dmamask; 679 musb->dev.coherent_dma_mask = musb_dmamask; 680 681 glue->musb = musb; 682 683 ret = platform_device_add_resources(musb, resources, 684 ARRAY_SIZE(resources)); 685 if (ret) { 686 dev_err(dev, "failed to add resources\n"); 687 goto err; 688 } 689 690 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL); 691 if (!config) { 692 ret = -ENOMEM; 693 goto err; 694 } 695 pdata.config = config; 696 pdata.platform_ops = &dsps_ops; 697 698 config->num_eps = get_int_prop(dn, "mentor,num-eps"); 699 config->ram_bits = get_int_prop(dn, "mentor,ram-bits"); 700 config->host_port_deassert_reset_at_resume = 1; 701 pdata.mode = get_musb_port_mode(dev); 702 /* DT keeps this entry in mA, musb expects it as per USB spec */ 703 pdata.power = get_int_prop(dn, "mentor,power") / 2; 704 705 ret = of_property_read_u32(dn, "mentor,multipoint", &val); 706 if (!ret && val) 707 config->multipoint = true; 708 709 config->maximum_speed = usb_get_maximum_speed(&parent->dev); 710 switch (config->maximum_speed) { 711 case USB_SPEED_LOW: 712 case USB_SPEED_FULL: 713 break; 714 case USB_SPEED_SUPER: 715 dev_warn(dev, "ignore incorrect maximum_speed " 716 "(super-speed) setting in dts"); 717 /* fall through */ 718 default: 719 config->maximum_speed = USB_SPEED_HIGH; 720 } 721 722 ret = platform_device_add_data(musb, &pdata, sizeof(pdata)); 723 if (ret) { 724 dev_err(dev, "failed to add platform_data\n"); 725 goto err; 726 } 727 728 ret = platform_device_add(musb); 729 if (ret) { 730 dev_err(dev, "failed to register musb device\n"); 731 goto err; 732 } 733 return 0; 734 735 err: 736 platform_device_put(musb); 737 return ret; 738 } 739 740 static int dsps_probe(struct platform_device *pdev) 741 { 742 const struct of_device_id *match; 743 const struct dsps_musb_wrapper *wrp; 744 struct dsps_glue *glue; 745 int ret; 746 747 if (!strcmp(pdev->name, "musb-hdrc")) 748 return -ENODEV; 749 750 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node); 751 if (!match) { 752 dev_err(&pdev->dev, "fail to get matching of_match struct\n"); 753 return -EINVAL; 754 } 755 wrp = match->data; 756 757 if (of_device_is_compatible(pdev->dev.of_node, "ti,musb-dm816")) 758 dsps_ops.read_fifo = dsps_read_fifo32; 759 760 /* allocate glue */ 761 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); 762 if (!glue) 763 return -ENOMEM; 764 765 glue->dev = &pdev->dev; 766 glue->wrp = wrp; 767 768 platform_set_drvdata(pdev, glue); 769 pm_runtime_enable(&pdev->dev); 770 pm_runtime_use_autosuspend(&pdev->dev); 771 pm_runtime_set_autosuspend_delay(&pdev->dev, 200); 772 773 ret = pm_runtime_get_sync(&pdev->dev); 774 if (ret < 0) { 775 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); 776 goto err2; 777 } 778 779 ret = dsps_create_musb_pdev(glue, pdev); 780 if (ret) 781 goto err3; 782 783 pm_runtime_mark_last_busy(&pdev->dev); 784 pm_runtime_put_autosuspend(&pdev->dev); 785 786 return 0; 787 788 err3: 789 pm_runtime_put_sync(&pdev->dev); 790 err2: 791 pm_runtime_dont_use_autosuspend(&pdev->dev); 792 pm_runtime_disable(&pdev->dev); 793 return ret; 794 } 795 796 static int dsps_remove(struct platform_device *pdev) 797 { 798 struct dsps_glue *glue = platform_get_drvdata(pdev); 799 800 platform_device_unregister(glue->musb); 801 802 /* disable usbss clocks */ 803 pm_runtime_dont_use_autosuspend(&pdev->dev); 804 pm_runtime_put_sync(&pdev->dev); 805 pm_runtime_disable(&pdev->dev); 806 807 return 0; 808 } 809 810 static const struct dsps_musb_wrapper am33xx_driver_data = { 811 .revision = 0x00, 812 .control = 0x14, 813 .status = 0x18, 814 .epintr_set = 0x38, 815 .epintr_clear = 0x40, 816 .epintr_status = 0x30, 817 .coreintr_set = 0x3c, 818 .coreintr_clear = 0x44, 819 .coreintr_status = 0x34, 820 .phy_utmi = 0xe0, 821 .mode = 0xe8, 822 .tx_mode = 0x70, 823 .rx_mode = 0x74, 824 .reset = 0, 825 .otg_disable = 21, 826 .iddig = 8, 827 .iddig_mux = 7, 828 .usb_shift = 0, 829 .usb_mask = 0x1ff, 830 .usb_bitmap = (0x1ff << 0), 831 .drvvbus = 8, 832 .txep_shift = 0, 833 .txep_mask = 0xffff, 834 .txep_bitmap = (0xffff << 0), 835 .rxep_shift = 16, 836 .rxep_mask = 0xfffe, 837 .rxep_bitmap = (0xfffe << 16), 838 .poll_timeout = 2000, /* ms */ 839 }; 840 841 static const struct of_device_id musb_dsps_of_match[] = { 842 { .compatible = "ti,musb-am33xx", 843 .data = &am33xx_driver_data, }, 844 { .compatible = "ti,musb-dm816", 845 .data = &am33xx_driver_data, }, 846 { }, 847 }; 848 MODULE_DEVICE_TABLE(of, musb_dsps_of_match); 849 850 #ifdef CONFIG_PM_SLEEP 851 static int dsps_suspend(struct device *dev) 852 { 853 struct dsps_glue *glue = dev_get_drvdata(dev); 854 const struct dsps_musb_wrapper *wrp = glue->wrp; 855 struct musb *musb = platform_get_drvdata(glue->musb); 856 void __iomem *mbase; 857 858 del_timer_sync(&glue->timer); 859 860 if (!musb) 861 /* This can happen if the musb device is in -EPROBE_DEFER */ 862 return 0; 863 864 mbase = musb->ctrl_base; 865 glue->context.control = musb_readl(mbase, wrp->control); 866 glue->context.epintr = musb_readl(mbase, wrp->epintr_set); 867 glue->context.coreintr = musb_readl(mbase, wrp->coreintr_set); 868 glue->context.phy_utmi = musb_readl(mbase, wrp->phy_utmi); 869 glue->context.mode = musb_readl(mbase, wrp->mode); 870 glue->context.tx_mode = musb_readl(mbase, wrp->tx_mode); 871 glue->context.rx_mode = musb_readl(mbase, wrp->rx_mode); 872 873 return 0; 874 } 875 876 static int dsps_resume(struct device *dev) 877 { 878 struct dsps_glue *glue = dev_get_drvdata(dev); 879 const struct dsps_musb_wrapper *wrp = glue->wrp; 880 struct musb *musb = platform_get_drvdata(glue->musb); 881 void __iomem *mbase; 882 883 if (!musb) 884 return 0; 885 886 mbase = musb->ctrl_base; 887 musb_writel(mbase, wrp->control, glue->context.control); 888 musb_writel(mbase, wrp->epintr_set, glue->context.epintr); 889 musb_writel(mbase, wrp->coreintr_set, glue->context.coreintr); 890 musb_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi); 891 musb_writel(mbase, wrp->mode, glue->context.mode); 892 musb_writel(mbase, wrp->tx_mode, glue->context.tx_mode); 893 musb_writel(mbase, wrp->rx_mode, glue->context.rx_mode); 894 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE && 895 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) 896 mod_timer(&glue->timer, jiffies + 897 msecs_to_jiffies(wrp->poll_timeout)); 898 899 return 0; 900 } 901 #endif 902 903 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); 904 905 static struct platform_driver dsps_usbss_driver = { 906 .probe = dsps_probe, 907 .remove = dsps_remove, 908 .driver = { 909 .name = "musb-dsps", 910 .pm = &dsps_pm_ops, 911 .of_match_table = musb_dsps_of_match, 912 }, 913 }; 914 915 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); 916 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); 917 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); 918 MODULE_LICENSE("GPL v2"); 919 920 module_platform_driver(dsps_usbss_driver); 921