1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Texas Instruments DSPS platforms "glue layer" 4 * 5 * Copyright (C) 2012, by Texas Instruments 6 * 7 * Based on the am35x "glue layer" code. 8 * 9 * This file is part of the Inventra Controller Driver for Linux. 10 * 11 * musb_dsps.c will be a common file for all the TI DSPS platforms 12 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. 13 * For now only ti81x is using this and in future davinci.c, am35x.c 14 * da8xx.c would be merged to this file after testing. 15 */ 16 17 #include <linux/io.h> 18 #include <linux/err.h> 19 #include <linux/platform_device.h> 20 #include <linux/dma-mapping.h> 21 #include <linux/pm_runtime.h> 22 #include <linux/module.h> 23 #include <linux/usb/usb_phy_generic.h> 24 #include <linux/platform_data/usb-omap.h> 25 #include <linux/sizes.h> 26 27 #include <linux/of.h> 28 #include <linux/of_device.h> 29 #include <linux/of_address.h> 30 #include <linux/of_irq.h> 31 #include <linux/usb/of.h> 32 33 #include <linux/debugfs.h> 34 35 #include "musb_core.h" 36 37 static const struct of_device_id musb_dsps_of_match[]; 38 39 /* 40 * DSPS musb wrapper register offset. 41 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS 42 * musb ips. 43 */ 44 struct dsps_musb_wrapper { 45 u16 revision; 46 u16 control; 47 u16 status; 48 u16 epintr_set; 49 u16 epintr_clear; 50 u16 epintr_status; 51 u16 coreintr_set; 52 u16 coreintr_clear; 53 u16 coreintr_status; 54 u16 phy_utmi; 55 u16 mode; 56 u16 tx_mode; 57 u16 rx_mode; 58 59 /* bit positions for control */ 60 unsigned reset:5; 61 62 /* bit positions for interrupt */ 63 unsigned usb_shift:5; 64 u32 usb_mask; 65 u32 usb_bitmap; 66 unsigned drvvbus:5; 67 68 unsigned txep_shift:5; 69 u32 txep_mask; 70 u32 txep_bitmap; 71 72 unsigned rxep_shift:5; 73 u32 rxep_mask; 74 u32 rxep_bitmap; 75 76 /* bit positions for phy_utmi */ 77 unsigned otg_disable:5; 78 79 /* bit positions for mode */ 80 unsigned iddig:5; 81 unsigned iddig_mux:5; 82 /* miscellaneous stuff */ 83 unsigned poll_timeout; 84 }; 85 86 /* 87 * register shadow for suspend 88 */ 89 struct dsps_context { 90 u32 control; 91 u32 epintr; 92 u32 coreintr; 93 u32 phy_utmi; 94 u32 mode; 95 u32 tx_mode; 96 u32 rx_mode; 97 }; 98 99 /* 100 * DSPS glue structure. 101 */ 102 struct dsps_glue { 103 struct device *dev; 104 struct platform_device *musb; /* child musb pdev */ 105 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ 106 int vbus_irq; /* optional vbus irq */ 107 unsigned long last_timer; /* last timer data for each instance */ 108 bool sw_babble_enabled; 109 void __iomem *usbss_base; 110 111 struct dsps_context context; 112 struct debugfs_regset32 regset; 113 struct dentry *dbgfs_root; 114 }; 115 116 static const struct debugfs_reg32 dsps_musb_regs[] = { 117 { "revision", 0x00 }, 118 { "control", 0x14 }, 119 { "status", 0x18 }, 120 { "eoi", 0x24 }, 121 { "intr0_stat", 0x30 }, 122 { "intr1_stat", 0x34 }, 123 { "intr0_set", 0x38 }, 124 { "intr1_set", 0x3c }, 125 { "txmode", 0x70 }, 126 { "rxmode", 0x74 }, 127 { "autoreq", 0xd0 }, 128 { "srpfixtime", 0xd4 }, 129 { "tdown", 0xd8 }, 130 { "phy_utmi", 0xe0 }, 131 { "mode", 0xe8 }, 132 }; 133 134 static void dsps_mod_timer(struct dsps_glue *glue, int wait_ms) 135 { 136 struct musb *musb = platform_get_drvdata(glue->musb); 137 int wait; 138 139 if (wait_ms < 0) 140 wait = msecs_to_jiffies(glue->wrp->poll_timeout); 141 else 142 wait = msecs_to_jiffies(wait_ms); 143 144 mod_timer(&musb->dev_timer, jiffies + wait); 145 } 146 147 /* 148 * If no vbus irq from the PMIC is configured, we need to poll VBUS status. 149 */ 150 static void dsps_mod_timer_optional(struct dsps_glue *glue) 151 { 152 if (glue->vbus_irq) 153 return; 154 155 dsps_mod_timer(glue, -1); 156 } 157 158 /* USBSS / USB AM335x */ 159 #define USBSS_IRQ_STATUS 0x28 160 #define USBSS_IRQ_ENABLER 0x2c 161 #define USBSS_IRQ_CLEARR 0x30 162 163 #define USBSS_IRQ_PD_COMP (1 << 2) 164 165 /* 166 * dsps_musb_enable - enable interrupts 167 */ 168 static void dsps_musb_enable(struct musb *musb) 169 { 170 struct device *dev = musb->controller; 171 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 172 const struct dsps_musb_wrapper *wrp = glue->wrp; 173 void __iomem *reg_base = musb->ctrl_base; 174 u32 epmask, coremask; 175 176 /* Workaround: setup IRQs through both register sets. */ 177 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | 178 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); 179 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); 180 181 musb_writel(reg_base, wrp->epintr_set, epmask); 182 musb_writel(reg_base, wrp->coreintr_set, coremask); 183 /* 184 * start polling for runtime PM active and idle, 185 * and for ID change in dual-role idle mode. 186 */ 187 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE) 188 dsps_mod_timer(glue, -1); 189 } 190 191 /* 192 * dsps_musb_disable - disable HDRC and flush interrupts 193 */ 194 static void dsps_musb_disable(struct musb *musb) 195 { 196 struct device *dev = musb->controller; 197 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 198 const struct dsps_musb_wrapper *wrp = glue->wrp; 199 void __iomem *reg_base = musb->ctrl_base; 200 201 musb_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); 202 musb_writel(reg_base, wrp->epintr_clear, 203 wrp->txep_bitmap | wrp->rxep_bitmap); 204 del_timer_sync(&musb->dev_timer); 205 } 206 207 /* Caller must take musb->lock */ 208 static int dsps_check_status(struct musb *musb, void *unused) 209 { 210 void __iomem *mregs = musb->mregs; 211 struct device *dev = musb->controller; 212 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 213 const struct dsps_musb_wrapper *wrp = glue->wrp; 214 u8 devctl; 215 int skip_session = 0; 216 217 if (glue->vbus_irq) 218 del_timer(&musb->dev_timer); 219 220 /* 221 * We poll because DSPS IP's won't expose several OTG-critical 222 * status change events (from the transceiver) otherwise. 223 */ 224 devctl = musb_readb(mregs, MUSB_DEVCTL); 225 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 226 usb_otg_state_string(musb->xceiv->otg->state)); 227 228 switch (musb->xceiv->otg->state) { 229 case OTG_STATE_A_WAIT_VRISE: 230 if (musb->port_mode == MUSB_HOST) { 231 musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON; 232 dsps_mod_timer_optional(glue); 233 break; 234 } 235 fallthrough; 236 237 case OTG_STATE_A_WAIT_BCON: 238 /* keep VBUS on for host-only mode */ 239 if (musb->port_mode == MUSB_HOST) { 240 dsps_mod_timer_optional(glue); 241 break; 242 } 243 musb_writeb(musb->mregs, MUSB_DEVCTL, 0); 244 skip_session = 1; 245 fallthrough; 246 247 case OTG_STATE_A_IDLE: 248 case OTG_STATE_B_IDLE: 249 if (!glue->vbus_irq) { 250 if (devctl & MUSB_DEVCTL_BDEVICE) { 251 musb->xceiv->otg->state = OTG_STATE_B_IDLE; 252 MUSB_DEV_MODE(musb); 253 } else { 254 musb->xceiv->otg->state = OTG_STATE_A_IDLE; 255 MUSB_HST_MODE(musb); 256 } 257 258 if (musb->port_mode == MUSB_PERIPHERAL) 259 skip_session = 1; 260 261 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session) 262 musb_writeb(mregs, MUSB_DEVCTL, 263 MUSB_DEVCTL_SESSION); 264 } 265 dsps_mod_timer_optional(glue); 266 break; 267 case OTG_STATE_A_WAIT_VFALL: 268 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; 269 musb_writel(musb->ctrl_base, wrp->coreintr_set, 270 MUSB_INTR_VBUSERROR << wrp->usb_shift); 271 break; 272 default: 273 break; 274 } 275 276 return 0; 277 } 278 279 static void otg_timer(struct timer_list *t) 280 { 281 struct musb *musb = from_timer(musb, t, dev_timer); 282 struct device *dev = musb->controller; 283 unsigned long flags; 284 int err; 285 286 err = pm_runtime_get(dev); 287 if ((err != -EINPROGRESS) && err < 0) { 288 dev_err(dev, "Poll could not pm_runtime_get: %i\n", err); 289 pm_runtime_put_noidle(dev); 290 291 return; 292 } 293 294 spin_lock_irqsave(&musb->lock, flags); 295 err = musb_queue_resume_work(musb, dsps_check_status, NULL); 296 if (err < 0) 297 dev_err(dev, "%s resume work: %i\n", __func__, err); 298 spin_unlock_irqrestore(&musb->lock, flags); 299 pm_runtime_mark_last_busy(dev); 300 pm_runtime_put_autosuspend(dev); 301 } 302 303 static void dsps_musb_clear_ep_rxintr(struct musb *musb, int epnum) 304 { 305 u32 epintr; 306 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent); 307 const struct dsps_musb_wrapper *wrp = glue->wrp; 308 309 /* musb->lock might already been held */ 310 epintr = (1 << epnum) << wrp->rxep_shift; 311 musb_writel(musb->ctrl_base, wrp->epintr_status, epintr); 312 } 313 314 static irqreturn_t dsps_interrupt(int irq, void *hci) 315 { 316 struct musb *musb = hci; 317 void __iomem *reg_base = musb->ctrl_base; 318 struct device *dev = musb->controller; 319 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 320 const struct dsps_musb_wrapper *wrp = glue->wrp; 321 unsigned long flags; 322 irqreturn_t ret = IRQ_NONE; 323 u32 epintr, usbintr; 324 325 spin_lock_irqsave(&musb->lock, flags); 326 327 /* Get endpoint interrupts */ 328 epintr = musb_readl(reg_base, wrp->epintr_status); 329 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; 330 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; 331 332 if (epintr) 333 musb_writel(reg_base, wrp->epintr_status, epintr); 334 335 /* Get usb core interrupts */ 336 usbintr = musb_readl(reg_base, wrp->coreintr_status); 337 if (!usbintr && !epintr) 338 goto out; 339 340 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; 341 if (usbintr) 342 musb_writel(reg_base, wrp->coreintr_status, usbintr); 343 344 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", 345 usbintr, epintr); 346 347 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { 348 int drvvbus = musb_readl(reg_base, wrp->status); 349 void __iomem *mregs = musb->mregs; 350 u8 devctl = musb_readb(mregs, MUSB_DEVCTL); 351 int err; 352 353 err = musb->int_usb & MUSB_INTR_VBUSERROR; 354 if (err) { 355 /* 356 * The Mentor core doesn't debounce VBUS as needed 357 * to cope with device connect current spikes. This 358 * means it's not uncommon for bus-powered devices 359 * to get VBUS errors during enumeration. 360 * 361 * This is a workaround, but newer RTL from Mentor 362 * seems to allow a better one: "re"-starting sessions 363 * without waiting for VBUS to stop registering in 364 * devctl. 365 */ 366 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 367 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL; 368 dsps_mod_timer_optional(glue); 369 WARNING("VBUS error workaround (delay coming)\n"); 370 } else if (drvvbus) { 371 MUSB_HST_MODE(musb); 372 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; 373 dsps_mod_timer_optional(glue); 374 } else { 375 musb->is_active = 0; 376 MUSB_DEV_MODE(musb); 377 musb->xceiv->otg->state = OTG_STATE_B_IDLE; 378 } 379 380 /* NOTE: this must complete power-on within 100 ms. */ 381 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 382 drvvbus ? "on" : "off", 383 usb_otg_state_string(musb->xceiv->otg->state), 384 err ? " ERROR" : "", 385 devctl); 386 ret = IRQ_HANDLED; 387 } 388 389 if (musb->int_tx || musb->int_rx || musb->int_usb) 390 ret |= musb_interrupt(musb); 391 392 /* Poll for ID change and connect */ 393 switch (musb->xceiv->otg->state) { 394 case OTG_STATE_B_IDLE: 395 case OTG_STATE_A_WAIT_BCON: 396 dsps_mod_timer_optional(glue); 397 break; 398 default: 399 break; 400 } 401 402 out: 403 spin_unlock_irqrestore(&musb->lock, flags); 404 405 return ret; 406 } 407 408 static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue) 409 { 410 struct dentry *root; 411 char buf[128]; 412 413 sprintf(buf, "%s.dsps", dev_name(musb->controller)); 414 root = debugfs_create_dir(buf, usb_debug_root); 415 glue->dbgfs_root = root; 416 417 glue->regset.regs = dsps_musb_regs; 418 glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs); 419 glue->regset.base = musb->ctrl_base; 420 421 debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset); 422 return 0; 423 } 424 425 static int dsps_musb_init(struct musb *musb) 426 { 427 struct device *dev = musb->controller; 428 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 429 struct platform_device *parent = to_platform_device(dev->parent); 430 const struct dsps_musb_wrapper *wrp = glue->wrp; 431 void __iomem *reg_base; 432 u32 rev, val; 433 int ret; 434 435 reg_base = devm_platform_ioremap_resource_byname(parent, "control"); 436 if (IS_ERR(reg_base)) 437 return PTR_ERR(reg_base); 438 musb->ctrl_base = reg_base; 439 440 /* NOP driver needs change if supporting dual instance */ 441 musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent, "phys", 0); 442 if (IS_ERR(musb->xceiv)) 443 return PTR_ERR(musb->xceiv); 444 445 musb->phy = devm_phy_get(dev->parent, "usb2-phy"); 446 447 /* Returns zero if e.g. not clocked */ 448 rev = musb_readl(reg_base, wrp->revision); 449 if (!rev) 450 return -ENODEV; 451 452 if (IS_ERR(musb->phy)) { 453 musb->phy = NULL; 454 } else { 455 ret = phy_init(musb->phy); 456 if (ret < 0) 457 return ret; 458 ret = phy_power_on(musb->phy); 459 if (ret) { 460 phy_exit(musb->phy); 461 return ret; 462 } 463 } 464 465 timer_setup(&musb->dev_timer, otg_timer, 0); 466 467 /* Reset the musb */ 468 musb_writel(reg_base, wrp->control, (1 << wrp->reset)); 469 470 musb->isr = dsps_interrupt; 471 472 /* reset the otgdisable bit, needed for host mode to work */ 473 val = musb_readl(reg_base, wrp->phy_utmi); 474 val &= ~(1 << wrp->otg_disable); 475 musb_writel(musb->ctrl_base, wrp->phy_utmi, val); 476 477 /* 478 * Check whether the dsps version has babble control enabled. 479 * In latest silicon revision the babble control logic is enabled. 480 * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control 481 * logic enabled. 482 */ 483 val = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 484 if (val & MUSB_BABBLE_RCV_DISABLE) { 485 glue->sw_babble_enabled = true; 486 val |= MUSB_BABBLE_SW_SESSION_CTRL; 487 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, val); 488 } 489 490 dsps_mod_timer(glue, -1); 491 492 return dsps_musb_dbg_init(musb, glue); 493 } 494 495 static int dsps_musb_exit(struct musb *musb) 496 { 497 struct device *dev = musb->controller; 498 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 499 500 del_timer_sync(&musb->dev_timer); 501 phy_power_off(musb->phy); 502 phy_exit(musb->phy); 503 debugfs_remove_recursive(glue->dbgfs_root); 504 505 return 0; 506 } 507 508 static int dsps_musb_set_mode(struct musb *musb, u8 mode) 509 { 510 struct device *dev = musb->controller; 511 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 512 const struct dsps_musb_wrapper *wrp = glue->wrp; 513 void __iomem *ctrl_base = musb->ctrl_base; 514 u32 reg; 515 516 reg = musb_readl(ctrl_base, wrp->mode); 517 518 switch (mode) { 519 case MUSB_HOST: 520 reg &= ~(1 << wrp->iddig); 521 522 /* 523 * if we're setting mode to host-only or device-only, we're 524 * going to ignore whatever the PHY sends us and just force 525 * ID pin status by SW 526 */ 527 reg |= (1 << wrp->iddig_mux); 528 529 musb_writel(ctrl_base, wrp->mode, reg); 530 musb_writel(ctrl_base, wrp->phy_utmi, 0x02); 531 break; 532 case MUSB_PERIPHERAL: 533 reg |= (1 << wrp->iddig); 534 535 /* 536 * if we're setting mode to host-only or device-only, we're 537 * going to ignore whatever the PHY sends us and just force 538 * ID pin status by SW 539 */ 540 reg |= (1 << wrp->iddig_mux); 541 542 musb_writel(ctrl_base, wrp->mode, reg); 543 break; 544 case MUSB_OTG: 545 musb_writel(ctrl_base, wrp->phy_utmi, 0x02); 546 break; 547 default: 548 dev_err(glue->dev, "unsupported mode %d\n", mode); 549 return -EINVAL; 550 } 551 552 return 0; 553 } 554 555 static bool dsps_sw_babble_control(struct musb *musb) 556 { 557 u8 babble_ctl; 558 bool session_restart = false; 559 560 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 561 dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n", 562 babble_ctl); 563 /* 564 * check line monitor flag to check whether babble is 565 * due to noise 566 */ 567 dev_dbg(musb->controller, "STUCK_J is %s\n", 568 babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset"); 569 570 if (babble_ctl & MUSB_BABBLE_STUCK_J) { 571 int timeout = 10; 572 573 /* 574 * babble is due to noise, then set transmit idle (d7 bit) 575 * to resume normal operation 576 */ 577 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 578 babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE; 579 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl); 580 581 /* wait till line monitor flag cleared */ 582 dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n"); 583 do { 584 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 585 udelay(1); 586 } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--); 587 588 /* check whether stuck_at_j bit cleared */ 589 if (babble_ctl & MUSB_BABBLE_STUCK_J) { 590 /* 591 * real babble condition has occurred 592 * restart the controller to start the 593 * session again 594 */ 595 dev_dbg(musb->controller, "J not cleared, misc (%x)\n", 596 babble_ctl); 597 session_restart = true; 598 } 599 } else { 600 session_restart = true; 601 } 602 603 return session_restart; 604 } 605 606 static int dsps_musb_recover(struct musb *musb) 607 { 608 struct device *dev = musb->controller; 609 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 610 int session_restart = 0; 611 612 if (glue->sw_babble_enabled) 613 session_restart = dsps_sw_babble_control(musb); 614 else 615 session_restart = 1; 616 617 return session_restart ? 0 : -EPIPE; 618 } 619 620 /* Similar to am35x, dm81xx support only 32-bit read operation */ 621 static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst) 622 { 623 void __iomem *fifo = hw_ep->fifo; 624 625 if (len >= 4) { 626 ioread32_rep(fifo, dst, len >> 2); 627 dst += len & ~0x03; 628 len &= 0x03; 629 } 630 631 /* Read any remaining 1 to 3 bytes */ 632 if (len > 0) { 633 u32 val = musb_readl(fifo, 0); 634 memcpy(dst, &val, len); 635 } 636 } 637 638 #ifdef CONFIG_USB_TI_CPPI41_DMA 639 static void dsps_dma_controller_callback(struct dma_controller *c) 640 { 641 struct musb *musb = c->musb; 642 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent); 643 void __iomem *usbss_base = glue->usbss_base; 644 u32 status; 645 646 status = musb_readl(usbss_base, USBSS_IRQ_STATUS); 647 if (status & USBSS_IRQ_PD_COMP) 648 musb_writel(usbss_base, USBSS_IRQ_STATUS, USBSS_IRQ_PD_COMP); 649 } 650 651 static struct dma_controller * 652 dsps_dma_controller_create(struct musb *musb, void __iomem *base) 653 { 654 struct dma_controller *controller; 655 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent); 656 void __iomem *usbss_base = glue->usbss_base; 657 658 controller = cppi41_dma_controller_create(musb, base); 659 if (IS_ERR_OR_NULL(controller)) 660 return controller; 661 662 musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP); 663 controller->dma_callback = dsps_dma_controller_callback; 664 665 return controller; 666 } 667 668 #ifdef CONFIG_PM_SLEEP 669 static void dsps_dma_controller_suspend(struct dsps_glue *glue) 670 { 671 void __iomem *usbss_base = glue->usbss_base; 672 673 musb_writel(usbss_base, USBSS_IRQ_CLEARR, USBSS_IRQ_PD_COMP); 674 } 675 676 static void dsps_dma_controller_resume(struct dsps_glue *glue) 677 { 678 void __iomem *usbss_base = glue->usbss_base; 679 680 musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP); 681 } 682 #endif 683 #else /* CONFIG_USB_TI_CPPI41_DMA */ 684 #ifdef CONFIG_PM_SLEEP 685 static void dsps_dma_controller_suspend(struct dsps_glue *glue) {} 686 static void dsps_dma_controller_resume(struct dsps_glue *glue) {} 687 #endif 688 #endif /* CONFIG_USB_TI_CPPI41_DMA */ 689 690 static struct musb_platform_ops dsps_ops = { 691 .quirks = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP, 692 .init = dsps_musb_init, 693 .exit = dsps_musb_exit, 694 695 #ifdef CONFIG_USB_TI_CPPI41_DMA 696 .dma_init = dsps_dma_controller_create, 697 .dma_exit = cppi41_dma_controller_destroy, 698 #endif 699 .enable = dsps_musb_enable, 700 .disable = dsps_musb_disable, 701 702 .set_mode = dsps_musb_set_mode, 703 .recover = dsps_musb_recover, 704 .clear_ep_rxintr = dsps_musb_clear_ep_rxintr, 705 }; 706 707 static u64 musb_dmamask = DMA_BIT_MASK(32); 708 709 static int get_int_prop(struct device_node *dn, const char *s) 710 { 711 int ret; 712 u32 val; 713 714 ret = of_property_read_u32(dn, s, &val); 715 if (ret) 716 return 0; 717 return val; 718 } 719 720 static int dsps_create_musb_pdev(struct dsps_glue *glue, 721 struct platform_device *parent) 722 { 723 struct musb_hdrc_platform_data pdata; 724 struct resource resources[2]; 725 struct resource *res; 726 struct device *dev = &parent->dev; 727 struct musb_hdrc_config *config; 728 struct platform_device *musb; 729 struct device_node *dn = parent->dev.of_node; 730 int ret, val; 731 732 memset(resources, 0, sizeof(resources)); 733 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc"); 734 if (!res) { 735 dev_err(dev, "failed to get memory.\n"); 736 return -EINVAL; 737 } 738 resources[0] = *res; 739 740 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc"); 741 if (!res) { 742 dev_err(dev, "failed to get irq.\n"); 743 return -EINVAL; 744 } 745 resources[1] = *res; 746 747 /* allocate the child platform device */ 748 musb = platform_device_alloc("musb-hdrc", 749 (resources[0].start & 0xFFF) == 0x400 ? 0 : 1); 750 if (!musb) { 751 dev_err(dev, "failed to allocate musb device\n"); 752 return -ENOMEM; 753 } 754 755 musb->dev.parent = dev; 756 musb->dev.dma_mask = &musb_dmamask; 757 musb->dev.coherent_dma_mask = musb_dmamask; 758 device_set_of_node_from_dev(&musb->dev, &parent->dev); 759 760 glue->musb = musb; 761 762 ret = platform_device_add_resources(musb, resources, 763 ARRAY_SIZE(resources)); 764 if (ret) { 765 dev_err(dev, "failed to add resources\n"); 766 goto err; 767 } 768 769 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL); 770 if (!config) { 771 ret = -ENOMEM; 772 goto err; 773 } 774 pdata.config = config; 775 pdata.platform_ops = &dsps_ops; 776 777 config->num_eps = get_int_prop(dn, "mentor,num-eps"); 778 config->ram_bits = get_int_prop(dn, "mentor,ram-bits"); 779 config->host_port_deassert_reset_at_resume = 1; 780 pdata.mode = musb_get_mode(dev); 781 /* DT keeps this entry in mA, musb expects it as per USB spec */ 782 pdata.power = get_int_prop(dn, "mentor,power") / 2; 783 784 ret = of_property_read_u32(dn, "mentor,multipoint", &val); 785 if (!ret && val) 786 config->multipoint = true; 787 788 config->maximum_speed = usb_get_maximum_speed(&parent->dev); 789 switch (config->maximum_speed) { 790 case USB_SPEED_LOW: 791 case USB_SPEED_FULL: 792 break; 793 case USB_SPEED_SUPER: 794 dev_warn(dev, "ignore incorrect maximum_speed " 795 "(super-speed) setting in dts"); 796 fallthrough; 797 default: 798 config->maximum_speed = USB_SPEED_HIGH; 799 } 800 801 ret = platform_device_add_data(musb, &pdata, sizeof(pdata)); 802 if (ret) { 803 dev_err(dev, "failed to add platform_data\n"); 804 goto err; 805 } 806 807 ret = platform_device_add(musb); 808 if (ret) { 809 dev_err(dev, "failed to register musb device\n"); 810 goto err; 811 } 812 return 0; 813 814 err: 815 platform_device_put(musb); 816 return ret; 817 } 818 819 static irqreturn_t dsps_vbus_threaded_irq(int irq, void *priv) 820 { 821 struct dsps_glue *glue = priv; 822 struct musb *musb = platform_get_drvdata(glue->musb); 823 824 if (!musb) 825 return IRQ_NONE; 826 827 dev_dbg(glue->dev, "VBUS interrupt\n"); 828 dsps_mod_timer(glue, 0); 829 830 return IRQ_HANDLED; 831 } 832 833 static int dsps_setup_optional_vbus_irq(struct platform_device *pdev, 834 struct dsps_glue *glue) 835 { 836 int error; 837 838 glue->vbus_irq = platform_get_irq_byname(pdev, "vbus"); 839 if (glue->vbus_irq == -EPROBE_DEFER) 840 return -EPROBE_DEFER; 841 842 if (glue->vbus_irq <= 0) { 843 glue->vbus_irq = 0; 844 return 0; 845 } 846 847 error = devm_request_threaded_irq(glue->dev, glue->vbus_irq, 848 NULL, dsps_vbus_threaded_irq, 849 IRQF_ONESHOT, 850 "vbus", glue); 851 if (error) { 852 glue->vbus_irq = 0; 853 return error; 854 } 855 dev_dbg(glue->dev, "VBUS irq %i configured\n", glue->vbus_irq); 856 857 return 0; 858 } 859 860 static int dsps_probe(struct platform_device *pdev) 861 { 862 const struct of_device_id *match; 863 const struct dsps_musb_wrapper *wrp; 864 struct dsps_glue *glue; 865 int ret; 866 867 if (!strcmp(pdev->name, "musb-hdrc")) 868 return -ENODEV; 869 870 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node); 871 if (!match) { 872 dev_err(&pdev->dev, "fail to get matching of_match struct\n"); 873 return -EINVAL; 874 } 875 wrp = match->data; 876 877 if (of_device_is_compatible(pdev->dev.of_node, "ti,musb-dm816")) 878 dsps_ops.read_fifo = dsps_read_fifo32; 879 880 /* allocate glue */ 881 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); 882 if (!glue) 883 return -ENOMEM; 884 885 glue->dev = &pdev->dev; 886 glue->wrp = wrp; 887 glue->usbss_base = of_iomap(pdev->dev.parent->of_node, 0); 888 if (!glue->usbss_base) 889 return -ENXIO; 890 891 if (usb_get_dr_mode(&pdev->dev) == USB_DR_MODE_PERIPHERAL) { 892 ret = dsps_setup_optional_vbus_irq(pdev, glue); 893 if (ret) 894 goto err_iounmap; 895 } 896 897 platform_set_drvdata(pdev, glue); 898 pm_runtime_enable(&pdev->dev); 899 ret = dsps_create_musb_pdev(glue, pdev); 900 if (ret) 901 goto err; 902 903 return 0; 904 905 err: 906 pm_runtime_disable(&pdev->dev); 907 err_iounmap: 908 iounmap(glue->usbss_base); 909 return ret; 910 } 911 912 static int dsps_remove(struct platform_device *pdev) 913 { 914 struct dsps_glue *glue = platform_get_drvdata(pdev); 915 916 platform_device_unregister(glue->musb); 917 918 pm_runtime_disable(&pdev->dev); 919 iounmap(glue->usbss_base); 920 921 return 0; 922 } 923 924 static const struct dsps_musb_wrapper am33xx_driver_data = { 925 .revision = 0x00, 926 .control = 0x14, 927 .status = 0x18, 928 .epintr_set = 0x38, 929 .epintr_clear = 0x40, 930 .epintr_status = 0x30, 931 .coreintr_set = 0x3c, 932 .coreintr_clear = 0x44, 933 .coreintr_status = 0x34, 934 .phy_utmi = 0xe0, 935 .mode = 0xe8, 936 .tx_mode = 0x70, 937 .rx_mode = 0x74, 938 .reset = 0, 939 .otg_disable = 21, 940 .iddig = 8, 941 .iddig_mux = 7, 942 .usb_shift = 0, 943 .usb_mask = 0x1ff, 944 .usb_bitmap = (0x1ff << 0), 945 .drvvbus = 8, 946 .txep_shift = 0, 947 .txep_mask = 0xffff, 948 .txep_bitmap = (0xffff << 0), 949 .rxep_shift = 16, 950 .rxep_mask = 0xfffe, 951 .rxep_bitmap = (0xfffe << 16), 952 .poll_timeout = 2000, /* ms */ 953 }; 954 955 static const struct of_device_id musb_dsps_of_match[] = { 956 { .compatible = "ti,musb-am33xx", 957 .data = &am33xx_driver_data, }, 958 { .compatible = "ti,musb-dm816", 959 .data = &am33xx_driver_data, }, 960 { }, 961 }; 962 MODULE_DEVICE_TABLE(of, musb_dsps_of_match); 963 964 #ifdef CONFIG_PM_SLEEP 965 static int dsps_suspend(struct device *dev) 966 { 967 struct dsps_glue *glue = dev_get_drvdata(dev); 968 const struct dsps_musb_wrapper *wrp = glue->wrp; 969 struct musb *musb = platform_get_drvdata(glue->musb); 970 void __iomem *mbase; 971 int ret; 972 973 if (!musb) 974 /* This can happen if the musb device is in -EPROBE_DEFER */ 975 return 0; 976 977 ret = pm_runtime_get_sync(dev); 978 if (ret < 0) { 979 pm_runtime_put_noidle(dev); 980 return ret; 981 } 982 983 del_timer_sync(&musb->dev_timer); 984 985 mbase = musb->ctrl_base; 986 glue->context.control = musb_readl(mbase, wrp->control); 987 glue->context.epintr = musb_readl(mbase, wrp->epintr_set); 988 glue->context.coreintr = musb_readl(mbase, wrp->coreintr_set); 989 glue->context.phy_utmi = musb_readl(mbase, wrp->phy_utmi); 990 glue->context.mode = musb_readl(mbase, wrp->mode); 991 glue->context.tx_mode = musb_readl(mbase, wrp->tx_mode); 992 glue->context.rx_mode = musb_readl(mbase, wrp->rx_mode); 993 994 dsps_dma_controller_suspend(glue); 995 996 return 0; 997 } 998 999 static int dsps_resume(struct device *dev) 1000 { 1001 struct dsps_glue *glue = dev_get_drvdata(dev); 1002 const struct dsps_musb_wrapper *wrp = glue->wrp; 1003 struct musb *musb = platform_get_drvdata(glue->musb); 1004 void __iomem *mbase; 1005 1006 if (!musb) 1007 return 0; 1008 1009 dsps_dma_controller_resume(glue); 1010 1011 mbase = musb->ctrl_base; 1012 musb_writel(mbase, wrp->control, glue->context.control); 1013 musb_writel(mbase, wrp->epintr_set, glue->context.epintr); 1014 musb_writel(mbase, wrp->coreintr_set, glue->context.coreintr); 1015 musb_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi); 1016 musb_writel(mbase, wrp->mode, glue->context.mode); 1017 musb_writel(mbase, wrp->tx_mode, glue->context.tx_mode); 1018 musb_writel(mbase, wrp->rx_mode, glue->context.rx_mode); 1019 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE && 1020 musb->port_mode == MUSB_OTG) 1021 dsps_mod_timer(glue, -1); 1022 1023 pm_runtime_put(dev); 1024 1025 return 0; 1026 } 1027 #endif 1028 1029 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); 1030 1031 static struct platform_driver dsps_usbss_driver = { 1032 .probe = dsps_probe, 1033 .remove = dsps_remove, 1034 .driver = { 1035 .name = "musb-dsps", 1036 .pm = &dsps_pm_ops, 1037 .of_match_table = musb_dsps_of_match, 1038 }, 1039 }; 1040 1041 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); 1042 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); 1043 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); 1044 MODULE_LICENSE("GPL v2"); 1045 1046 module_platform_driver(dsps_usbss_driver); 1047