xref: /openbmc/linux/drivers/usb/musb/musb_dsps.c (revision 089a49b6)
1 /*
2  * Texas Instruments DSPS platforms "glue layer"
3  *
4  * Copyright (C) 2012, by Texas Instruments
5  *
6  * Based on the am35x "glue layer" code.
7  *
8  * This file is part of the Inventra Controller Driver for Linux.
9  *
10  * The Inventra Controller Driver for Linux is free software; you
11  * can redistribute it and/or modify it under the terms of the GNU
12  * General Public License version 2 as published by the Free Software
13  * Foundation.
14  *
15  * The Inventra Controller Driver for Linux is distributed in
16  * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17  * without even the implied warranty of MERCHANTABILITY or
18  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
19  * License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with The Inventra Controller Driver for Linux ; if not,
23  * write to the Free Software Foundation, Inc., 59 Temple Place,
24  * Suite 330, Boston, MA  02111-1307  USA
25  *
26  * musb_dsps.c will be a common file for all the TI DSPS platforms
27  * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28  * For now only ti81x is using this and in future davinci.c, am35x.c
29  * da8xx.c would be merged to this file after testing.
30  */
31 
32 #include <linux/init.h>
33 #include <linux/io.h>
34 #include <linux/err.h>
35 #include <linux/platform_device.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/pm_runtime.h>
38 #include <linux/module.h>
39 #include <linux/usb/usb_phy_gen_xceiv.h>
40 #include <linux/platform_data/usb-omap.h>
41 #include <linux/sizes.h>
42 
43 #include <linux/of.h>
44 #include <linux/of_device.h>
45 #include <linux/of_address.h>
46 #include <linux/of_irq.h>
47 #include <linux/usb/of.h>
48 
49 #include "musb_core.h"
50 
51 static const struct of_device_id musb_dsps_of_match[];
52 
53 /**
54  * avoid using musb_readx()/musb_writex() as glue layer should not be
55  * dependent on musb core layer symbols.
56  */
57 static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
58 	{ return __raw_readb(addr + offset); }
59 
60 static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
61 	{ return __raw_readl(addr + offset); }
62 
63 static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
64 	{ __raw_writeb(data, addr + offset); }
65 
66 static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
67 	{ __raw_writel(data, addr + offset); }
68 
69 /**
70  * DSPS musb wrapper register offset.
71  * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
72  * musb ips.
73  */
74 struct dsps_musb_wrapper {
75 	u16	revision;
76 	u16	control;
77 	u16	status;
78 	u16	epintr_set;
79 	u16	epintr_clear;
80 	u16	epintr_status;
81 	u16	coreintr_set;
82 	u16	coreintr_clear;
83 	u16	coreintr_status;
84 	u16	phy_utmi;
85 	u16	mode;
86 
87 	/* bit positions for control */
88 	unsigned	reset:5;
89 
90 	/* bit positions for interrupt */
91 	unsigned	usb_shift:5;
92 	u32		usb_mask;
93 	u32		usb_bitmap;
94 	unsigned	drvvbus:5;
95 
96 	unsigned	txep_shift:5;
97 	u32		txep_mask;
98 	u32		txep_bitmap;
99 
100 	unsigned	rxep_shift:5;
101 	u32		rxep_mask;
102 	u32		rxep_bitmap;
103 
104 	/* bit positions for phy_utmi */
105 	unsigned	otg_disable:5;
106 
107 	/* bit positions for mode */
108 	unsigned	iddig:5;
109 	/* miscellaneous stuff */
110 	u8		poll_seconds;
111 };
112 
113 /**
114  * DSPS glue structure.
115  */
116 struct dsps_glue {
117 	struct device *dev;
118 	struct platform_device *musb;	/* child musb pdev */
119 	const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
120 	struct timer_list timer;	/* otg_workaround timer */
121 	unsigned long last_timer;    /* last timer data for each instance */
122 };
123 
124 /**
125  * dsps_musb_enable - enable interrupts
126  */
127 static void dsps_musb_enable(struct musb *musb)
128 {
129 	struct device *dev = musb->controller;
130 	struct platform_device *pdev = to_platform_device(dev->parent);
131 	struct dsps_glue *glue = platform_get_drvdata(pdev);
132 	const struct dsps_musb_wrapper *wrp = glue->wrp;
133 	void __iomem *reg_base = musb->ctrl_base;
134 	u32 epmask, coremask;
135 
136 	/* Workaround: setup IRQs through both register sets. */
137 	epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
138 	       ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
139 	coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
140 
141 	dsps_writel(reg_base, wrp->epintr_set, epmask);
142 	dsps_writel(reg_base, wrp->coreintr_set, coremask);
143 	/* Force the DRVVBUS IRQ so we can start polling for ID change. */
144 	dsps_writel(reg_base, wrp->coreintr_set,
145 		    (1 << wrp->drvvbus) << wrp->usb_shift);
146 }
147 
148 /**
149  * dsps_musb_disable - disable HDRC and flush interrupts
150  */
151 static void dsps_musb_disable(struct musb *musb)
152 {
153 	struct device *dev = musb->controller;
154 	struct platform_device *pdev = to_platform_device(dev->parent);
155 	struct dsps_glue *glue = platform_get_drvdata(pdev);
156 	const struct dsps_musb_wrapper *wrp = glue->wrp;
157 	void __iomem *reg_base = musb->ctrl_base;
158 
159 	dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
160 	dsps_writel(reg_base, wrp->epintr_clear,
161 			 wrp->txep_bitmap | wrp->rxep_bitmap);
162 	dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
163 }
164 
165 static void otg_timer(unsigned long _musb)
166 {
167 	struct musb *musb = (void *)_musb;
168 	void __iomem *mregs = musb->mregs;
169 	struct device *dev = musb->controller;
170 	struct dsps_glue *glue = dev_get_drvdata(dev->parent);
171 	const struct dsps_musb_wrapper *wrp = glue->wrp;
172 	u8 devctl;
173 	unsigned long flags;
174 
175 	/*
176 	 * We poll because DSPS IP's won't expose several OTG-critical
177 	 * status change events (from the transceiver) otherwise.
178 	 */
179 	devctl = dsps_readb(mregs, MUSB_DEVCTL);
180 	dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
181 				usb_otg_state_string(musb->xceiv->state));
182 
183 	spin_lock_irqsave(&musb->lock, flags);
184 	switch (musb->xceiv->state) {
185 	case OTG_STATE_A_WAIT_BCON:
186 		devctl &= ~MUSB_DEVCTL_SESSION;
187 		dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
188 
189 		devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
190 		if (devctl & MUSB_DEVCTL_BDEVICE) {
191 			musb->xceiv->state = OTG_STATE_B_IDLE;
192 			MUSB_DEV_MODE(musb);
193 		} else {
194 			musb->xceiv->state = OTG_STATE_A_IDLE;
195 			MUSB_HST_MODE(musb);
196 		}
197 		break;
198 	case OTG_STATE_A_WAIT_VFALL:
199 		musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
200 		dsps_writel(musb->ctrl_base, wrp->coreintr_set,
201 			    MUSB_INTR_VBUSERROR << wrp->usb_shift);
202 		break;
203 	case OTG_STATE_B_IDLE:
204 		devctl = dsps_readb(mregs, MUSB_DEVCTL);
205 		if (devctl & MUSB_DEVCTL_BDEVICE)
206 			mod_timer(&glue->timer,
207 					jiffies + wrp->poll_seconds * HZ);
208 		else
209 			musb->xceiv->state = OTG_STATE_A_IDLE;
210 		break;
211 	default:
212 		break;
213 	}
214 	spin_unlock_irqrestore(&musb->lock, flags);
215 }
216 
217 static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
218 {
219 	struct device *dev = musb->controller;
220 	struct dsps_glue *glue = dev_get_drvdata(dev->parent);
221 
222 	if (timeout == 0)
223 		timeout = jiffies + msecs_to_jiffies(3);
224 
225 	/* Never idle if active, or when VBUS timeout is not set as host */
226 	if (musb->is_active || (musb->a_wait_bcon == 0 &&
227 				musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
228 		dev_dbg(musb->controller, "%s active, deleting timer\n",
229 				usb_otg_state_string(musb->xceiv->state));
230 		del_timer(&glue->timer);
231 		glue->last_timer = jiffies;
232 		return;
233 	}
234 	if (musb->port_mode == MUSB_PORT_MODE_HOST)
235 		return;
236 
237 	if (time_after(glue->last_timer, timeout) &&
238 				timer_pending(&glue->timer)) {
239 		dev_dbg(musb->controller,
240 			"Longer idle timer already pending, ignoring...\n");
241 		return;
242 	}
243 	glue->last_timer = timeout;
244 
245 	dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
246 		usb_otg_state_string(musb->xceiv->state),
247 			jiffies_to_msecs(timeout - jiffies));
248 	mod_timer(&glue->timer, timeout);
249 }
250 
251 static irqreturn_t dsps_interrupt(int irq, void *hci)
252 {
253 	struct musb  *musb = hci;
254 	void __iomem *reg_base = musb->ctrl_base;
255 	struct device *dev = musb->controller;
256 	struct dsps_glue *glue = dev_get_drvdata(dev->parent);
257 	const struct dsps_musb_wrapper *wrp = glue->wrp;
258 	unsigned long flags;
259 	irqreturn_t ret = IRQ_NONE;
260 	u32 epintr, usbintr;
261 
262 	spin_lock_irqsave(&musb->lock, flags);
263 
264 	/* Get endpoint interrupts */
265 	epintr = dsps_readl(reg_base, wrp->epintr_status);
266 	musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
267 	musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
268 
269 	if (epintr)
270 		dsps_writel(reg_base, wrp->epintr_status, epintr);
271 
272 	/* Get usb core interrupts */
273 	usbintr = dsps_readl(reg_base, wrp->coreintr_status);
274 	if (!usbintr && !epintr)
275 		goto out;
276 
277 	musb->int_usb =	(usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
278 	if (usbintr)
279 		dsps_writel(reg_base, wrp->coreintr_status, usbintr);
280 
281 	dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
282 			usbintr, epintr);
283 	/*
284 	 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
285 	 * DSPS IP's missing ID change IRQ.  We need an ID change IRQ to
286 	 * switch appropriately between halves of the OTG state machine.
287 	 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
288 	 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
289 	 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
290 	 */
291 	if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE)
292 		pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
293 
294 	if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
295 		int drvvbus = dsps_readl(reg_base, wrp->status);
296 		void __iomem *mregs = musb->mregs;
297 		u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
298 		int err;
299 
300 		err = musb->int_usb & MUSB_INTR_VBUSERROR;
301 		if (err) {
302 			/*
303 			 * The Mentor core doesn't debounce VBUS as needed
304 			 * to cope with device connect current spikes. This
305 			 * means it's not uncommon for bus-powered devices
306 			 * to get VBUS errors during enumeration.
307 			 *
308 			 * This is a workaround, but newer RTL from Mentor
309 			 * seems to allow a better one: "re"-starting sessions
310 			 * without waiting for VBUS to stop registering in
311 			 * devctl.
312 			 */
313 			musb->int_usb &= ~MUSB_INTR_VBUSERROR;
314 			musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
315 			mod_timer(&glue->timer,
316 					jiffies + wrp->poll_seconds * HZ);
317 			WARNING("VBUS error workaround (delay coming)\n");
318 		} else if (drvvbus) {
319 			MUSB_HST_MODE(musb);
320 			musb->xceiv->otg->default_a = 1;
321 			musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
322 			del_timer(&glue->timer);
323 		} else {
324 			musb->is_active = 0;
325 			MUSB_DEV_MODE(musb);
326 			musb->xceiv->otg->default_a = 0;
327 			musb->xceiv->state = OTG_STATE_B_IDLE;
328 		}
329 
330 		/* NOTE: this must complete power-on within 100 ms. */
331 		dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
332 				drvvbus ? "on" : "off",
333 				usb_otg_state_string(musb->xceiv->state),
334 				err ? " ERROR" : "",
335 				devctl);
336 		ret = IRQ_HANDLED;
337 	}
338 
339 	if (musb->int_tx || musb->int_rx || musb->int_usb)
340 		ret |= musb_interrupt(musb);
341 
342 	/* Poll for ID change */
343 	if (musb->xceiv->state == OTG_STATE_B_IDLE)
344 		mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
345 out:
346 	spin_unlock_irqrestore(&musb->lock, flags);
347 
348 	return ret;
349 }
350 
351 static int dsps_musb_init(struct musb *musb)
352 {
353 	struct device *dev = musb->controller;
354 	struct dsps_glue *glue = dev_get_drvdata(dev->parent);
355 	struct platform_device *parent = to_platform_device(dev->parent);
356 	const struct dsps_musb_wrapper *wrp = glue->wrp;
357 	void __iomem *reg_base;
358 	struct resource *r;
359 	u32 rev, val;
360 
361 	r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
362 	if (!r)
363 		return -EINVAL;
364 
365 	reg_base = devm_ioremap_resource(dev, r);
366 	if (IS_ERR(reg_base))
367 		return PTR_ERR(reg_base);
368 	musb->ctrl_base = reg_base;
369 
370 	/* NOP driver needs change if supporting dual instance */
371 	musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0);
372 	if (IS_ERR(musb->xceiv))
373 		return PTR_ERR(musb->xceiv);
374 
375 	/* Returns zero if e.g. not clocked */
376 	rev = dsps_readl(reg_base, wrp->revision);
377 	if (!rev)
378 		return -ENODEV;
379 
380 	usb_phy_init(musb->xceiv);
381 	setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
382 
383 	/* Reset the musb */
384 	dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
385 
386 	musb->isr = dsps_interrupt;
387 
388 	/* reset the otgdisable bit, needed for host mode to work */
389 	val = dsps_readl(reg_base, wrp->phy_utmi);
390 	val &= ~(1 << wrp->otg_disable);
391 	dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
392 
393 	return 0;
394 }
395 
396 static int dsps_musb_exit(struct musb *musb)
397 {
398 	struct device *dev = musb->controller;
399 	struct dsps_glue *glue = dev_get_drvdata(dev->parent);
400 
401 	del_timer_sync(&glue->timer);
402 
403 	usb_phy_shutdown(musb->xceiv);
404 	return 0;
405 }
406 
407 static struct musb_platform_ops dsps_ops = {
408 	.init		= dsps_musb_init,
409 	.exit		= dsps_musb_exit,
410 
411 	.enable		= dsps_musb_enable,
412 	.disable	= dsps_musb_disable,
413 
414 	.try_idle	= dsps_musb_try_idle,
415 };
416 
417 static u64 musb_dmamask = DMA_BIT_MASK(32);
418 
419 static int get_int_prop(struct device_node *dn, const char *s)
420 {
421 	int ret;
422 	u32 val;
423 
424 	ret = of_property_read_u32(dn, s, &val);
425 	if (ret)
426 		return 0;
427 	return val;
428 }
429 
430 static int get_musb_port_mode(struct device *dev)
431 {
432 	enum usb_dr_mode mode;
433 
434 	mode = of_usb_get_dr_mode(dev->of_node);
435 	switch (mode) {
436 	case USB_DR_MODE_HOST:
437 		return MUSB_PORT_MODE_HOST;
438 
439 	case USB_DR_MODE_PERIPHERAL:
440 		return MUSB_PORT_MODE_GADGET;
441 
442 	case USB_DR_MODE_UNKNOWN:
443 	case USB_DR_MODE_OTG:
444 	default:
445 		return MUSB_PORT_MODE_DUAL_ROLE;
446 	};
447 }
448 
449 static int dsps_create_musb_pdev(struct dsps_glue *glue,
450 		struct platform_device *parent)
451 {
452 	struct musb_hdrc_platform_data pdata;
453 	struct resource	resources[2];
454 	struct resource	*res;
455 	struct device *dev = &parent->dev;
456 	struct musb_hdrc_config	*config;
457 	struct platform_device *musb;
458 	struct device_node *dn = parent->dev.of_node;
459 	int ret;
460 
461 	memset(resources, 0, sizeof(resources));
462 	res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
463 	if (!res) {
464 		dev_err(dev, "failed to get memory.\n");
465 		return -EINVAL;
466 	}
467 	resources[0] = *res;
468 
469 	res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc");
470 	if (!res) {
471 		dev_err(dev, "failed to get irq.\n");
472 		return -EINVAL;
473 	}
474 	resources[1] = *res;
475 
476 	/* allocate the child platform device */
477 	musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
478 	if (!musb) {
479 		dev_err(dev, "failed to allocate musb device\n");
480 		return -ENOMEM;
481 	}
482 
483 	musb->dev.parent		= dev;
484 	musb->dev.dma_mask		= &musb_dmamask;
485 	musb->dev.coherent_dma_mask	= musb_dmamask;
486 	musb->dev.of_node		= of_node_get(dn);
487 
488 	glue->musb = musb;
489 
490 	ret = platform_device_add_resources(musb, resources,
491 			ARRAY_SIZE(resources));
492 	if (ret) {
493 		dev_err(dev, "failed to add resources\n");
494 		goto err;
495 	}
496 
497 	config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
498 	if (!config) {
499 		dev_err(dev, "failed to allocate musb hdrc config\n");
500 		ret = -ENOMEM;
501 		goto err;
502 	}
503 	pdata.config = config;
504 	pdata.platform_ops = &dsps_ops;
505 
506 	config->num_eps = get_int_prop(dn, "mentor,num-eps");
507 	config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
508 	pdata.mode = get_musb_port_mode(dev);
509 	/* DT keeps this entry in mA, musb expects it as per USB spec */
510 	pdata.power = get_int_prop(dn, "mentor,power") / 2;
511 	config->multipoint = of_property_read_bool(dn, "mentor,multipoint");
512 
513 	ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
514 	if (ret) {
515 		dev_err(dev, "failed to add platform_data\n");
516 		goto err;
517 	}
518 
519 	ret = platform_device_add(musb);
520 	if (ret) {
521 		dev_err(dev, "failed to register musb device\n");
522 		goto err;
523 	}
524 	return 0;
525 
526 err:
527 	platform_device_put(musb);
528 	return ret;
529 }
530 
531 static int dsps_probe(struct platform_device *pdev)
532 {
533 	const struct of_device_id *match;
534 	const struct dsps_musb_wrapper *wrp;
535 	struct dsps_glue *glue;
536 	int ret;
537 
538 	match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
539 	if (!match) {
540 		dev_err(&pdev->dev, "fail to get matching of_match struct\n");
541 		return -EINVAL;
542 	}
543 	wrp = match->data;
544 
545 	/* allocate glue */
546 	glue = kzalloc(sizeof(*glue), GFP_KERNEL);
547 	if (!glue) {
548 		dev_err(&pdev->dev, "unable to allocate glue memory\n");
549 		return -ENOMEM;
550 	}
551 
552 	glue->dev = &pdev->dev;
553 	glue->wrp = wrp;
554 
555 	platform_set_drvdata(pdev, glue);
556 	pm_runtime_enable(&pdev->dev);
557 
558 	ret = pm_runtime_get_sync(&pdev->dev);
559 	if (ret < 0) {
560 		dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
561 		goto err2;
562 	}
563 
564 	ret = dsps_create_musb_pdev(glue, pdev);
565 	if (ret)
566 		goto err3;
567 
568 	return 0;
569 
570 err3:
571 	pm_runtime_put(&pdev->dev);
572 err2:
573 	pm_runtime_disable(&pdev->dev);
574 	kfree(glue);
575 	return ret;
576 }
577 
578 static int dsps_remove(struct platform_device *pdev)
579 {
580 	struct dsps_glue *glue = platform_get_drvdata(pdev);
581 
582 	platform_device_unregister(glue->musb);
583 
584 	/* disable usbss clocks */
585 	pm_runtime_put(&pdev->dev);
586 	pm_runtime_disable(&pdev->dev);
587 	kfree(glue);
588 	return 0;
589 }
590 
591 static const struct dsps_musb_wrapper am33xx_driver_data = {
592 	.revision		= 0x00,
593 	.control		= 0x14,
594 	.status			= 0x18,
595 	.epintr_set		= 0x38,
596 	.epintr_clear		= 0x40,
597 	.epintr_status		= 0x30,
598 	.coreintr_set		= 0x3c,
599 	.coreintr_clear		= 0x44,
600 	.coreintr_status	= 0x34,
601 	.phy_utmi		= 0xe0,
602 	.mode			= 0xe8,
603 	.reset			= 0,
604 	.otg_disable		= 21,
605 	.iddig			= 8,
606 	.usb_shift		= 0,
607 	.usb_mask		= 0x1ff,
608 	.usb_bitmap		= (0x1ff << 0),
609 	.drvvbus		= 8,
610 	.txep_shift		= 0,
611 	.txep_mask		= 0xffff,
612 	.txep_bitmap		= (0xffff << 0),
613 	.rxep_shift		= 16,
614 	.rxep_mask		= 0xfffe,
615 	.rxep_bitmap		= (0xfffe << 16),
616 	.poll_seconds		= 2,
617 };
618 
619 static const struct of_device_id musb_dsps_of_match[] = {
620 	{ .compatible = "ti,musb-am33xx",
621 		.data = (void *) &am33xx_driver_data, },
622 	{  },
623 };
624 MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
625 
626 static struct platform_driver dsps_usbss_driver = {
627 	.probe		= dsps_probe,
628 	.remove         = dsps_remove,
629 	.driver         = {
630 		.name   = "musb-dsps",
631 		.of_match_table	= of_match_ptr(musb_dsps_of_match),
632 	},
633 };
634 
635 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
636 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
637 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
638 MODULE_LICENSE("GPL v2");
639 
640 module_platform_driver(dsps_usbss_driver);
641