1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * MUSB OTG driver DMA controller abstraction 4 * 5 * Copyright 2005 Mentor Graphics Corporation 6 * Copyright (C) 2005-2006 by Texas Instruments 7 * Copyright (C) 2006-2007 Nokia Corporation 8 */ 9 10 #ifndef __MUSB_DMA_H__ 11 #define __MUSB_DMA_H__ 12 13 struct musb_hw_ep; 14 15 /* 16 * DMA Controller Abstraction 17 * 18 * DMA Controllers are abstracted to allow use of a variety of different 19 * implementations of DMA, as allowed by the Inventra USB cores. On the 20 * host side, usbcore sets up the DMA mappings and flushes caches; on the 21 * peripheral side, the gadget controller driver does. Responsibilities 22 * of a DMA controller driver include: 23 * 24 * - Handling the details of moving multiple USB packets 25 * in cooperation with the Inventra USB core, including especially 26 * the correct RX side treatment of short packets and buffer-full 27 * states (both of which terminate transfers). 28 * 29 * - Knowing the correlation between dma channels and the 30 * Inventra core's local endpoint resources and data direction. 31 * 32 * - Maintaining a list of allocated/available channels. 33 * 34 * - Updating channel status on interrupts, 35 * whether shared with the Inventra core or separate. 36 */ 37 38 #define DMA_ADDR_INVALID (~(dma_addr_t)0) 39 40 #ifdef CONFIG_MUSB_PIO_ONLY 41 #define is_dma_capable() (0) 42 #else 43 #define is_dma_capable() (1) 44 #endif 45 46 #ifdef CONFIG_USB_UX500_DMA 47 #define musb_dma_ux500(musb) (musb->io.quirks & MUSB_DMA_UX500) 48 #else 49 #define musb_dma_ux500(musb) 0 50 #endif 51 52 #ifdef CONFIG_USB_TI_CPPI41_DMA 53 #define musb_dma_cppi41(musb) (musb->io.quirks & MUSB_DMA_CPPI41) 54 #else 55 #define musb_dma_cppi41(musb) 0 56 #endif 57 58 #ifdef CONFIG_USB_TI_CPPI_DMA 59 #define musb_dma_cppi(musb) (musb->io.quirks & MUSB_DMA_CPPI) 60 #else 61 #define musb_dma_cppi(musb) 0 62 #endif 63 64 #ifdef CONFIG_USB_TUSB_OMAP_DMA 65 #define tusb_dma_omap(musb) (musb->io.quirks & MUSB_DMA_TUSB_OMAP) 66 #else 67 #define tusb_dma_omap(musb) 0 68 #endif 69 70 #ifdef CONFIG_USB_INVENTRA_DMA 71 #define musb_dma_inventra(musb) (musb->io.quirks & MUSB_DMA_INVENTRA) 72 #else 73 #define musb_dma_inventra(musb) 0 74 #endif 75 76 #if defined(CONFIG_USB_TI_CPPI_DMA) || defined(CONFIG_USB_TI_CPPI41_DMA) 77 #define is_cppi_enabled(musb) \ 78 (musb_dma_cppi(musb) || musb_dma_cppi41(musb)) 79 #else 80 #define is_cppi_enabled(musb) 0 81 #endif 82 83 /* Anomaly 05000456 - USB Receive Interrupt Is Not Generated in DMA Mode 1 84 * Only allow DMA mode 1 to be used when the USB will actually generate the 85 * interrupts we expect. 86 */ 87 #ifdef CONFIG_BLACKFIN 88 # undef USE_MODE1 89 # if !ANOMALY_05000456 90 # define USE_MODE1 91 # endif 92 #endif 93 94 /* 95 * DMA channel status ... updated by the dma controller driver whenever that 96 * status changes, and protected by the overall controller spinlock. 97 */ 98 enum dma_channel_status { 99 /* unallocated */ 100 MUSB_DMA_STATUS_UNKNOWN, 101 /* allocated ... but not busy, no errors */ 102 MUSB_DMA_STATUS_FREE, 103 /* busy ... transactions are active */ 104 MUSB_DMA_STATUS_BUSY, 105 /* transaction(s) aborted due to ... dma or memory bus error */ 106 MUSB_DMA_STATUS_BUS_ABORT, 107 /* transaction(s) aborted due to ... core error or USB fault */ 108 MUSB_DMA_STATUS_CORE_ABORT 109 }; 110 111 struct dma_controller; 112 113 /** 114 * struct dma_channel - A DMA channel. 115 * @private_data: channel-private data 116 * @max_len: the maximum number of bytes the channel can move in one 117 * transaction (typically representing many USB maximum-sized packets) 118 * @actual_len: how many bytes have been transferred 119 * @status: current channel status (updated e.g. on interrupt) 120 * @desired_mode: true if mode 1 is desired; false if mode 0 is desired 121 * 122 * channels are associated with an endpoint for the duration of at least 123 * one usb transfer. 124 */ 125 struct dma_channel { 126 void *private_data; 127 /* FIXME not void* private_data, but a dma_controller * */ 128 size_t max_len; 129 size_t actual_len; 130 enum dma_channel_status status; 131 bool desired_mode; 132 bool rx_packet_done; 133 }; 134 135 /* 136 * dma_channel_status - return status of dma channel 137 * @c: the channel 138 * 139 * Returns the software's view of the channel status. If that status is BUSY 140 * then it's possible that the hardware has completed (or aborted) a transfer, 141 * so the driver needs to update that status. 142 */ 143 static inline enum dma_channel_status 144 dma_channel_status(struct dma_channel *c) 145 { 146 return (is_dma_capable() && c) ? c->status : MUSB_DMA_STATUS_UNKNOWN; 147 } 148 149 /** 150 * struct dma_controller - A DMA Controller. 151 * @musb: the usb controller 152 * @start: call this to start a DMA controller; 153 * return 0 on success, else negative errno 154 * @stop: call this to stop a DMA controller 155 * return 0 on success, else negative errno 156 * @channel_alloc: call this to allocate a DMA channel 157 * @channel_release: call this to release a DMA channel 158 * @channel_abort: call this to abort a pending DMA transaction, 159 * returning it to FREE (but allocated) state 160 * @dma_callback: invoked on DMA completion, useful to run platform 161 * code such IRQ acknowledgment. 162 * 163 * Controllers manage dma channels. 164 */ 165 struct dma_controller { 166 struct musb *musb; 167 struct dma_channel *(*channel_alloc)(struct dma_controller *, 168 struct musb_hw_ep *, u8 is_tx); 169 void (*channel_release)(struct dma_channel *); 170 int (*channel_program)(struct dma_channel *channel, 171 u16 maxpacket, u8 mode, 172 dma_addr_t dma_addr, 173 u32 length); 174 int (*channel_abort)(struct dma_channel *); 175 int (*is_compatible)(struct dma_channel *channel, 176 u16 maxpacket, 177 void *buf, u32 length); 178 void (*dma_callback)(struct dma_controller *); 179 }; 180 181 /* called after channel_program(), may indicate a fault */ 182 extern void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit); 183 184 #ifdef CONFIG_MUSB_PIO_ONLY 185 static inline struct dma_controller * 186 musb_dma_controller_create(struct musb *m, void __iomem *io) 187 { 188 return NULL; 189 } 190 191 static inline void musb_dma_controller_destroy(struct dma_controller *d) { } 192 193 #else 194 195 extern struct dma_controller * 196 (*musb_dma_controller_create)(struct musb *, void __iomem *); 197 198 extern void (*musb_dma_controller_destroy)(struct dma_controller *); 199 #endif 200 201 /* Platform specific DMA functions */ 202 extern struct dma_controller * 203 musbhs_dma_controller_create(struct musb *musb, void __iomem *base); 204 extern void musbhs_dma_controller_destroy(struct dma_controller *c); 205 206 extern struct dma_controller * 207 tusb_dma_controller_create(struct musb *musb, void __iomem *base); 208 extern void tusb_dma_controller_destroy(struct dma_controller *c); 209 210 extern struct dma_controller * 211 cppi_dma_controller_create(struct musb *musb, void __iomem *base); 212 extern void cppi_dma_controller_destroy(struct dma_controller *c); 213 214 extern struct dma_controller * 215 cppi41_dma_controller_create(struct musb *musb, void __iomem *base); 216 extern void cppi41_dma_controller_destroy(struct dma_controller *c); 217 218 extern struct dma_controller * 219 ux500_dma_controller_create(struct musb *musb, void __iomem *base); 220 extern void ux500_dma_controller_destroy(struct dma_controller *c); 221 222 #endif /* __MUSB_DMA_H__ */ 223