1 /* 2 * MUSB OTG driver debugfs support 3 * 4 * Copyright 2010 Nokia Corporation 5 * Contact: Felipe Balbi <felipe.balbi@nokia.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * version 2 as published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, but 12 * WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 19 * 02110-1301 USA 20 * 21 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED 22 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 24 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 28 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 */ 33 34 #include <linux/module.h> 35 #include <linux/kernel.h> 36 #include <linux/init.h> 37 #include <linux/debugfs.h> 38 #include <linux/seq_file.h> 39 40 #include <linux/uaccess.h> 41 42 #include "musb_core.h" 43 #include "musb_debug.h" 44 45 struct musb_register_map { 46 char *name; 47 unsigned offset; 48 unsigned size; 49 }; 50 51 static const struct musb_register_map musb_regmap[] = { 52 { "FAddr", MUSB_FADDR, 8 }, 53 { "Power", MUSB_POWER, 8 }, 54 { "Frame", MUSB_FRAME, 16 }, 55 { "Index", MUSB_INDEX, 8 }, 56 { "Testmode", MUSB_TESTMODE, 8 }, 57 { "TxMaxPp", MUSB_TXMAXP, 16 }, 58 { "TxCSRp", MUSB_TXCSR, 16 }, 59 { "RxMaxPp", MUSB_RXMAXP, 16 }, 60 { "RxCSR", MUSB_RXCSR, 16 }, 61 { "RxCount", MUSB_RXCOUNT, 16 }, 62 { "IntrRxE", MUSB_INTRRXE, 16 }, 63 { "IntrTxE", MUSB_INTRTXE, 16 }, 64 { "IntrUsbE", MUSB_INTRUSBE, 8 }, 65 { "DevCtl", MUSB_DEVCTL, 8 }, 66 { "VControl", 0x68, 32 }, 67 { "HWVers", 0x69, 16 }, 68 { "LinkInfo", MUSB_LINKINFO, 8 }, 69 { "VPLen", MUSB_VPLEN, 8 }, 70 { "HS_EOF1", MUSB_HS_EOF1, 8 }, 71 { "FS_EOF1", MUSB_FS_EOF1, 8 }, 72 { "LS_EOF1", MUSB_LS_EOF1, 8 }, 73 { "SOFT_RST", 0x7F, 8 }, 74 { "DMA_CNTLch0", 0x204, 16 }, 75 { "DMA_ADDRch0", 0x208, 32 }, 76 { "DMA_COUNTch0", 0x20C, 32 }, 77 { "DMA_CNTLch1", 0x214, 16 }, 78 { "DMA_ADDRch1", 0x218, 32 }, 79 { "DMA_COUNTch1", 0x21C, 32 }, 80 { "DMA_CNTLch2", 0x224, 16 }, 81 { "DMA_ADDRch2", 0x228, 32 }, 82 { "DMA_COUNTch2", 0x22C, 32 }, 83 { "DMA_CNTLch3", 0x234, 16 }, 84 { "DMA_ADDRch3", 0x238, 32 }, 85 { "DMA_COUNTch3", 0x23C, 32 }, 86 { "DMA_CNTLch4", 0x244, 16 }, 87 { "DMA_ADDRch4", 0x248, 32 }, 88 { "DMA_COUNTch4", 0x24C, 32 }, 89 { "DMA_CNTLch5", 0x254, 16 }, 90 { "DMA_ADDRch5", 0x258, 32 }, 91 { "DMA_COUNTch5", 0x25C, 32 }, 92 { "DMA_CNTLch6", 0x264, 16 }, 93 { "DMA_ADDRch6", 0x268, 32 }, 94 { "DMA_COUNTch6", 0x26C, 32 }, 95 { "DMA_CNTLch7", 0x274, 16 }, 96 { "DMA_ADDRch7", 0x278, 32 }, 97 { "DMA_COUNTch7", 0x27C, 32 }, 98 #ifndef CONFIG_BLACKFIN 99 { "ConfigData", MUSB_CONFIGDATA,8 }, 100 { "BabbleCtl", MUSB_BABBLE_CTL,8 }, 101 { "TxFIFOsz", MUSB_TXFIFOSZ, 8 }, 102 { "RxFIFOsz", MUSB_RXFIFOSZ, 8 }, 103 { "TxFIFOadd", MUSB_TXFIFOADD, 16 }, 104 { "RxFIFOadd", MUSB_RXFIFOADD, 16 }, 105 { "EPInfo", MUSB_EPINFO, 8 }, 106 { "RAMInfo", MUSB_RAMINFO, 8 }, 107 #endif 108 { } /* Terminating Entry */ 109 }; 110 111 static int musb_regdump_show(struct seq_file *s, void *unused) 112 { 113 struct musb *musb = s->private; 114 unsigned i; 115 116 seq_printf(s, "MUSB (M)HDRC Register Dump\n"); 117 pm_runtime_get_sync(musb->controller); 118 119 for (i = 0; i < ARRAY_SIZE(musb_regmap); i++) { 120 switch (musb_regmap[i].size) { 121 case 8: 122 seq_printf(s, "%-12s: %02x\n", musb_regmap[i].name, 123 musb_readb(musb->mregs, musb_regmap[i].offset)); 124 break; 125 case 16: 126 seq_printf(s, "%-12s: %04x\n", musb_regmap[i].name, 127 musb_readw(musb->mregs, musb_regmap[i].offset)); 128 break; 129 case 32: 130 seq_printf(s, "%-12s: %08x\n", musb_regmap[i].name, 131 musb_readl(musb->mregs, musb_regmap[i].offset)); 132 break; 133 } 134 } 135 136 pm_runtime_mark_last_busy(musb->controller); 137 pm_runtime_put_autosuspend(musb->controller); 138 return 0; 139 } 140 141 static int musb_regdump_open(struct inode *inode, struct file *file) 142 { 143 return single_open(file, musb_regdump_show, inode->i_private); 144 } 145 146 static int musb_test_mode_show(struct seq_file *s, void *unused) 147 { 148 struct musb *musb = s->private; 149 unsigned test; 150 151 pm_runtime_get_sync(musb->controller); 152 test = musb_readb(musb->mregs, MUSB_TESTMODE); 153 pm_runtime_mark_last_busy(musb->controller); 154 pm_runtime_put_autosuspend(musb->controller); 155 156 if (test & MUSB_TEST_FORCE_HOST) 157 seq_printf(s, "force host\n"); 158 159 if (test & MUSB_TEST_FIFO_ACCESS) 160 seq_printf(s, "fifo access\n"); 161 162 if (test & MUSB_TEST_FORCE_FS) 163 seq_printf(s, "force full-speed\n"); 164 165 if (test & MUSB_TEST_FORCE_HS) 166 seq_printf(s, "force high-speed\n"); 167 168 if (test & MUSB_TEST_PACKET) 169 seq_printf(s, "test packet\n"); 170 171 if (test & MUSB_TEST_K) 172 seq_printf(s, "test K\n"); 173 174 if (test & MUSB_TEST_J) 175 seq_printf(s, "test J\n"); 176 177 if (test & MUSB_TEST_SE0_NAK) 178 seq_printf(s, "test SE0 NAK\n"); 179 180 return 0; 181 } 182 183 static const struct file_operations musb_regdump_fops = { 184 .open = musb_regdump_open, 185 .read = seq_read, 186 .llseek = seq_lseek, 187 .release = single_release, 188 }; 189 190 static int musb_test_mode_open(struct inode *inode, struct file *file) 191 { 192 return single_open(file, musb_test_mode_show, inode->i_private); 193 } 194 195 static ssize_t musb_test_mode_write(struct file *file, 196 const char __user *ubuf, size_t count, loff_t *ppos) 197 { 198 struct seq_file *s = file->private_data; 199 struct musb *musb = s->private; 200 u8 test; 201 char buf[18]; 202 203 pm_runtime_get_sync(musb->controller); 204 test = musb_readb(musb->mregs, MUSB_TESTMODE); 205 if (test) { 206 dev_err(musb->controller, "Error: test mode is already set. " 207 "Please do USB Bus Reset to start a new test.\n"); 208 goto ret; 209 } 210 211 memset(buf, 0x00, sizeof(buf)); 212 213 if (copy_from_user(buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 214 return -EFAULT; 215 216 if (strstarts(buf, "force host")) 217 test = MUSB_TEST_FORCE_HOST; 218 219 if (strstarts(buf, "fifo access")) 220 test = MUSB_TEST_FIFO_ACCESS; 221 222 if (strstarts(buf, "force full-speed")) 223 test = MUSB_TEST_FORCE_FS; 224 225 if (strstarts(buf, "force high-speed")) 226 test = MUSB_TEST_FORCE_HS; 227 228 if (strstarts(buf, "test packet")) { 229 test = MUSB_TEST_PACKET; 230 musb_load_testpacket(musb); 231 } 232 233 if (strstarts(buf, "test K")) 234 test = MUSB_TEST_K; 235 236 if (strstarts(buf, "test J")) 237 test = MUSB_TEST_J; 238 239 if (strstarts(buf, "test SE0 NAK")) 240 test = MUSB_TEST_SE0_NAK; 241 242 musb_writeb(musb->mregs, MUSB_TESTMODE, test); 243 244 ret: 245 pm_runtime_mark_last_busy(musb->controller); 246 pm_runtime_put_autosuspend(musb->controller); 247 return count; 248 } 249 250 static const struct file_operations musb_test_mode_fops = { 251 .open = musb_test_mode_open, 252 .write = musb_test_mode_write, 253 .read = seq_read, 254 .llseek = seq_lseek, 255 .release = single_release, 256 }; 257 258 static int musb_softconnect_show(struct seq_file *s, void *unused) 259 { 260 struct musb *musb = s->private; 261 u8 reg; 262 int connect; 263 264 switch (musb->xceiv->otg->state) { 265 case OTG_STATE_A_HOST: 266 case OTG_STATE_A_WAIT_BCON: 267 pm_runtime_get_sync(musb->controller); 268 269 reg = musb_readb(musb->mregs, MUSB_DEVCTL); 270 connect = reg & MUSB_DEVCTL_SESSION ? 1 : 0; 271 272 pm_runtime_mark_last_busy(musb->controller); 273 pm_runtime_put_autosuspend(musb->controller); 274 break; 275 default: 276 connect = -1; 277 } 278 279 seq_printf(s, "%d\n", connect); 280 281 return 0; 282 } 283 284 static int musb_softconnect_open(struct inode *inode, struct file *file) 285 { 286 return single_open(file, musb_softconnect_show, inode->i_private); 287 } 288 289 static ssize_t musb_softconnect_write(struct file *file, 290 const char __user *ubuf, size_t count, loff_t *ppos) 291 { 292 struct seq_file *s = file->private_data; 293 struct musb *musb = s->private; 294 char buf[2]; 295 u8 reg; 296 297 memset(buf, 0x00, sizeof(buf)); 298 299 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 300 return -EFAULT; 301 302 pm_runtime_get_sync(musb->controller); 303 if (!strncmp(buf, "0", 1)) { 304 switch (musb->xceiv->otg->state) { 305 case OTG_STATE_A_HOST: 306 musb_root_disconnect(musb); 307 reg = musb_readb(musb->mregs, MUSB_DEVCTL); 308 reg &= ~MUSB_DEVCTL_SESSION; 309 musb_writeb(musb->mregs, MUSB_DEVCTL, reg); 310 break; 311 default: 312 break; 313 } 314 } else if (!strncmp(buf, "1", 1)) { 315 switch (musb->xceiv->otg->state) { 316 case OTG_STATE_A_WAIT_BCON: 317 /* 318 * musb_save_context() called in musb_runtime_suspend() 319 * might cache devctl with SESSION bit cleared during 320 * soft-disconnect, so specifically set SESSION bit 321 * here to preserve it for musb_runtime_resume(). 322 */ 323 musb->context.devctl |= MUSB_DEVCTL_SESSION; 324 reg = musb_readb(musb->mregs, MUSB_DEVCTL); 325 reg |= MUSB_DEVCTL_SESSION; 326 musb_writeb(musb->mregs, MUSB_DEVCTL, reg); 327 break; 328 default: 329 break; 330 } 331 } 332 333 pm_runtime_mark_last_busy(musb->controller); 334 pm_runtime_put_autosuspend(musb->controller); 335 return count; 336 } 337 338 /* 339 * In host mode, connect/disconnect the bus without physically 340 * remove the devices. 341 */ 342 static const struct file_operations musb_softconnect_fops = { 343 .open = musb_softconnect_open, 344 .write = musb_softconnect_write, 345 .read = seq_read, 346 .llseek = seq_lseek, 347 .release = single_release, 348 }; 349 350 int musb_init_debugfs(struct musb *musb) 351 { 352 struct dentry *root; 353 struct dentry *file; 354 int ret; 355 356 root = debugfs_create_dir(dev_name(musb->controller), NULL); 357 if (!root) { 358 ret = -ENOMEM; 359 goto err0; 360 } 361 362 file = debugfs_create_file("regdump", S_IRUGO, root, musb, 363 &musb_regdump_fops); 364 if (!file) { 365 ret = -ENOMEM; 366 goto err1; 367 } 368 369 file = debugfs_create_file("testmode", S_IRUGO | S_IWUSR, 370 root, musb, &musb_test_mode_fops); 371 if (!file) { 372 ret = -ENOMEM; 373 goto err1; 374 } 375 376 file = debugfs_create_file("softconnect", S_IRUGO | S_IWUSR, 377 root, musb, &musb_softconnect_fops); 378 if (!file) { 379 ret = -ENOMEM; 380 goto err1; 381 } 382 383 musb->debugfs_root = root; 384 385 return 0; 386 387 err1: 388 debugfs_remove_recursive(root); 389 390 err0: 391 return ret; 392 } 393 394 void /* __init_or_exit */ musb_exit_debugfs(struct musb *musb) 395 { 396 debugfs_remove_recursive(musb->debugfs_root); 397 } 398