xref: /openbmc/linux/drivers/usb/musb/musb_core.h (revision baa7eb025ab14f3cba2e35c0a8648f9c9f01d24f)
1 /*
2  * MUSB OTG driver defines
3  *
4  * Copyright 2005 Mentor Graphics Corporation
5  * Copyright (C) 2005-2006 by Texas Instruments
6  * Copyright (C) 2006-2007 Nokia Corporation
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * version 2 as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but
13  * WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20  * 02110-1301 USA
21  *
22  * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
23  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
25  * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
29  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  *
33  */
34 
35 #ifndef __MUSB_CORE_H__
36 #define __MUSB_CORE_H__
37 
38 #include <linux/slab.h>
39 #include <linux/list.h>
40 #include <linux/interrupt.h>
41 #include <linux/errno.h>
42 #include <linux/timer.h>
43 #include <linux/clk.h>
44 #include <linux/device.h>
45 #include <linux/usb/ch9.h>
46 #include <linux/usb/gadget.h>
47 #include <linux/usb.h>
48 #include <linux/usb/otg.h>
49 #include <linux/usb/musb.h>
50 
51 struct musb;
52 struct musb_hw_ep;
53 struct musb_ep;
54 
55 /* Helper defines for struct musb->hwvers */
56 #define MUSB_HWVERS_MAJOR(x)	((x >> 10) & 0x1f)
57 #define MUSB_HWVERS_MINOR(x)	(x & 0x3ff)
58 #define MUSB_HWVERS_RC		0x8000
59 #define MUSB_HWVERS_1300	0x52C
60 #define MUSB_HWVERS_1400	0x590
61 #define MUSB_HWVERS_1800	0x720
62 #define MUSB_HWVERS_1900	0x784
63 #define MUSB_HWVERS_2000	0x800
64 
65 #include "musb_debug.h"
66 #include "musb_dma.h"
67 
68 #include "musb_io.h"
69 #include "musb_regs.h"
70 
71 #include "musb_gadget.h"
72 #include <linux/usb/hcd.h>
73 #include "musb_host.h"
74 
75 
76 
77 #ifdef CONFIG_USB_MUSB_OTG
78 
79 #define	is_peripheral_enabled(musb)	((musb)->board_mode != MUSB_HOST)
80 #define	is_host_enabled(musb)		((musb)->board_mode != MUSB_PERIPHERAL)
81 #define	is_otg_enabled(musb)		((musb)->board_mode == MUSB_OTG)
82 
83 /* NOTE:  otg and peripheral-only state machines start at B_IDLE.
84  * OTG or host-only go to A_IDLE when ID is sensed.
85  */
86 #define is_peripheral_active(m)		(!(m)->is_host)
87 #define is_host_active(m)		((m)->is_host)
88 
89 #else
90 #define	is_peripheral_enabled(musb)	is_peripheral_capable()
91 #define	is_host_enabled(musb)		is_host_capable()
92 #define	is_otg_enabled(musb)		0
93 
94 #define	is_peripheral_active(musb)	is_peripheral_capable()
95 #define	is_host_active(musb)		is_host_capable()
96 #endif
97 
98 #if defined(CONFIG_USB_MUSB_OTG) || defined(CONFIG_USB_MUSB_PERIPHERAL)
99 /* for some reason, the "select USB_GADGET_MUSB_HDRC" doesn't always
100  * override that choice selection (often USB_GADGET_DUMMY_HCD).
101  */
102 #ifndef CONFIG_USB_GADGET_MUSB_HDRC
103 #error bogus Kconfig output ... select CONFIG_USB_GADGET_MUSB_HDRC
104 #endif
105 #endif	/* need MUSB gadget selection */
106 
107 #ifndef CONFIG_HAVE_CLK
108 /* Dummy stub for clk framework */
109 #define clk_get(dev, id)	NULL
110 #define clk_put(clock)		do {} while (0)
111 #define clk_enable(clock)	do {} while (0)
112 #define clk_disable(clock)	do {} while (0)
113 #endif
114 
115 #ifdef CONFIG_PROC_FS
116 #include <linux/fs.h>
117 #define MUSB_CONFIG_PROC_FS
118 #endif
119 
120 /****************************** PERIPHERAL ROLE *****************************/
121 
122 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
123 
124 #define	is_peripheral_capable()	(1)
125 
126 extern irqreturn_t musb_g_ep0_irq(struct musb *);
127 extern void musb_g_tx(struct musb *, u8);
128 extern void musb_g_rx(struct musb *, u8);
129 extern void musb_g_reset(struct musb *);
130 extern void musb_g_suspend(struct musb *);
131 extern void musb_g_resume(struct musb *);
132 extern void musb_g_wakeup(struct musb *);
133 extern void musb_g_disconnect(struct musb *);
134 
135 #else
136 
137 #define	is_peripheral_capable()	(0)
138 
139 static inline irqreturn_t musb_g_ep0_irq(struct musb *m) { return IRQ_NONE; }
140 static inline void musb_g_reset(struct musb *m) {}
141 static inline void musb_g_suspend(struct musb *m) {}
142 static inline void musb_g_resume(struct musb *m) {}
143 static inline void musb_g_wakeup(struct musb *m) {}
144 static inline void musb_g_disconnect(struct musb *m) {}
145 
146 #endif
147 
148 /****************************** HOST ROLE ***********************************/
149 
150 #ifdef CONFIG_USB_MUSB_HDRC_HCD
151 
152 #define	is_host_capable()	(1)
153 
154 extern irqreturn_t musb_h_ep0_irq(struct musb *);
155 extern void musb_host_tx(struct musb *, u8);
156 extern void musb_host_rx(struct musb *, u8);
157 
158 #else
159 
160 #define	is_host_capable()	(0)
161 
162 static inline irqreturn_t musb_h_ep0_irq(struct musb *m) { return IRQ_NONE; }
163 static inline void musb_host_tx(struct musb *m, u8 e) {}
164 static inline void musb_host_rx(struct musb *m, u8 e) {}
165 
166 #endif
167 
168 
169 /****************************** CONSTANTS ********************************/
170 
171 #ifndef MUSB_C_NUM_EPS
172 #define MUSB_C_NUM_EPS ((u8)16)
173 #endif
174 
175 #ifndef MUSB_MAX_END0_PACKET
176 #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
177 #endif
178 
179 /* host side ep0 states */
180 enum musb_h_ep0_state {
181 	MUSB_EP0_IDLE,
182 	MUSB_EP0_START,			/* expect ack of setup */
183 	MUSB_EP0_IN,			/* expect IN DATA */
184 	MUSB_EP0_OUT,			/* expect ack of OUT DATA */
185 	MUSB_EP0_STATUS,		/* expect ack of STATUS */
186 } __attribute__ ((packed));
187 
188 /* peripheral side ep0 states */
189 enum musb_g_ep0_state {
190 	MUSB_EP0_STAGE_IDLE,		/* idle, waiting for SETUP */
191 	MUSB_EP0_STAGE_SETUP,		/* received SETUP */
192 	MUSB_EP0_STAGE_TX,		/* IN data */
193 	MUSB_EP0_STAGE_RX,		/* OUT data */
194 	MUSB_EP0_STAGE_STATUSIN,	/* (after OUT data) */
195 	MUSB_EP0_STAGE_STATUSOUT,	/* (after IN data) */
196 	MUSB_EP0_STAGE_ACKWAIT,		/* after zlp, before statusin */
197 } __attribute__ ((packed));
198 
199 /*
200  * OTG protocol constants.  See USB OTG 1.3 spec,
201  * sections 5.5 "Device Timings" and 6.6.5 "Timers".
202  */
203 #define OTG_TIME_A_WAIT_VRISE	100		/* msec (max) */
204 #define OTG_TIME_A_WAIT_BCON	1100		/* min 1 second */
205 #define OTG_TIME_A_AIDL_BDIS	200		/* min 200 msec */
206 #define OTG_TIME_B_ASE0_BRST	100		/* min 3.125 ms */
207 
208 
209 /*************************** REGISTER ACCESS ********************************/
210 
211 /* Endpoint registers (other than dynfifo setup) can be accessed either
212  * directly with the "flat" model, or after setting up an index register.
213  */
214 
215 #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_ARCH_OMAP2430) \
216 		|| defined(CONFIG_ARCH_OMAP3430) || defined(CONFIG_BLACKFIN) \
217 		|| defined(CONFIG_ARCH_OMAP4)
218 /* REVISIT indexed access seemed to
219  * misbehave (on DaVinci) for at least peripheral IN ...
220  */
221 #define	MUSB_FLAT_REG
222 #endif
223 
224 /* TUSB mapping: "flat" plus ep0 special cases */
225 #if	defined(CONFIG_USB_TUSB6010)
226 #define musb_ep_select(_mbase, _epnum) \
227 	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
228 #define	MUSB_EP_OFFSET			MUSB_TUSB_OFFSET
229 
230 /* "flat" mapping: each endpoint has its own i/o address */
231 #elif	defined(MUSB_FLAT_REG)
232 #define musb_ep_select(_mbase, _epnum)	(((void)(_mbase)), ((void)(_epnum)))
233 #define	MUSB_EP_OFFSET			MUSB_FLAT_OFFSET
234 
235 /* "indexed" mapping: INDEX register controls register bank select */
236 #else
237 #define musb_ep_select(_mbase, _epnum) \
238 	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
239 #define	MUSB_EP_OFFSET			MUSB_INDEXED_OFFSET
240 #endif
241 
242 /****************************** FUNCTIONS ********************************/
243 
244 #define MUSB_HST_MODE(_musb)\
245 	{ (_musb)->is_host = true; }
246 #define MUSB_DEV_MODE(_musb) \
247 	{ (_musb)->is_host = false; }
248 
249 #define test_devctl_hst_mode(_x) \
250 	(musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
251 
252 #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
253 
254 /******************************** TYPES *************************************/
255 
256 /*
257  * struct musb_hw_ep - endpoint hardware (bidirectional)
258  *
259  * Ordered slightly for better cacheline locality.
260  */
261 struct musb_hw_ep {
262 	struct musb		*musb;
263 	void __iomem		*fifo;
264 	void __iomem		*regs;
265 
266 #ifdef CONFIG_USB_TUSB6010
267 	void __iomem		*conf;
268 #endif
269 
270 	/* index in musb->endpoints[]  */
271 	u8			epnum;
272 
273 	/* hardware configuration, possibly dynamic */
274 	bool			is_shared_fifo;
275 	bool			tx_double_buffered;
276 	bool			rx_double_buffered;
277 	u16			max_packet_sz_tx;
278 	u16			max_packet_sz_rx;
279 
280 	struct dma_channel	*tx_channel;
281 	struct dma_channel	*rx_channel;
282 
283 #ifdef CONFIG_USB_TUSB6010
284 	/* TUSB has "asynchronous" and "synchronous" dma modes */
285 	dma_addr_t		fifo_async;
286 	dma_addr_t		fifo_sync;
287 	void __iomem		*fifo_sync_va;
288 #endif
289 
290 #ifdef CONFIG_USB_MUSB_HDRC_HCD
291 	void __iomem		*target_regs;
292 
293 	/* currently scheduled peripheral endpoint */
294 	struct musb_qh		*in_qh;
295 	struct musb_qh		*out_qh;
296 
297 	u8			rx_reinit;
298 	u8			tx_reinit;
299 #endif
300 
301 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
302 	/* peripheral side */
303 	struct musb_ep		ep_in;			/* TX */
304 	struct musb_ep		ep_out;			/* RX */
305 #endif
306 };
307 
308 static inline struct usb_request *next_in_request(struct musb_hw_ep *hw_ep)
309 {
310 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
311 	return next_request(&hw_ep->ep_in);
312 #else
313 	return NULL;
314 #endif
315 }
316 
317 static inline struct usb_request *next_out_request(struct musb_hw_ep *hw_ep)
318 {
319 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
320 	return next_request(&hw_ep->ep_out);
321 #else
322 	return NULL;
323 #endif
324 }
325 
326 /*
327  * struct musb - Driver instance data.
328  */
329 struct musb {
330 	/* device lock */
331 	spinlock_t		lock;
332 	struct clk		*clock;
333 	struct clk		*phy_clock;
334 	irqreturn_t		(*isr)(int, void *);
335 	struct work_struct	irq_work;
336 	u16			hwvers;
337 
338 /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
339 #define MUSB_PORT_STAT_RESUME	(1 << 31)
340 
341 	u32			port1_status;
342 
343 #ifdef CONFIG_USB_MUSB_HDRC_HCD
344 	unsigned long		rh_timer;
345 
346 	enum musb_h_ep0_state	ep0_stage;
347 
348 	/* bulk traffic normally dedicates endpoint hardware, and each
349 	 * direction has its own ring of host side endpoints.
350 	 * we try to progress the transfer at the head of each endpoint's
351 	 * queue until it completes or NAKs too much; then we try the next
352 	 * endpoint.
353 	 */
354 	struct musb_hw_ep	*bulk_ep;
355 
356 	struct list_head	control;	/* of musb_qh */
357 	struct list_head	in_bulk;	/* of musb_qh */
358 	struct list_head	out_bulk;	/* of musb_qh */
359 
360 	struct timer_list	otg_timer;
361 #endif
362 
363 	/* called with IRQs blocked; ON/nonzero implies starting a session,
364 	 * and waiting at least a_wait_vrise_tmout.
365 	 */
366 	void			(*board_set_vbus)(struct musb *, int is_on);
367 
368 	struct dma_controller	*dma_controller;
369 
370 	struct device		*controller;
371 	void __iomem		*ctrl_base;
372 	void __iomem		*mregs;
373 
374 #ifdef CONFIG_USB_TUSB6010
375 	dma_addr_t		async;
376 	dma_addr_t		sync;
377 	void __iomem		*sync_va;
378 #endif
379 
380 	/* passed down from chip/board specific irq handlers */
381 	u8			int_usb;
382 	u16			int_rx;
383 	u16			int_tx;
384 
385 	struct otg_transceiver	*xceiv;
386 
387 	int nIrq;
388 	unsigned		irq_wake:1;
389 
390 	struct musb_hw_ep	 endpoints[MUSB_C_NUM_EPS];
391 #define control_ep		endpoints
392 
393 #define VBUSERR_RETRY_COUNT	3
394 	u16			vbuserr_retry;
395 	u16 epmask;
396 	u8 nr_endpoints;
397 
398 	u8 board_mode;		/* enum musb_mode */
399 	int			(*board_set_power)(int state);
400 
401 	int			(*set_clock)(struct clk *clk, int is_active);
402 
403 	u8			min_power;	/* vbus for periph, in mA/2 */
404 
405 	bool			is_host;
406 
407 	int			a_wait_bcon;	/* VBUS timeout in msecs */
408 	unsigned long		idle_timeout;	/* Next timeout in jiffies */
409 
410 	/* active means connected and not suspended */
411 	unsigned		is_active:1;
412 
413 	unsigned is_multipoint:1;
414 	unsigned ignore_disconnect:1;	/* during bus resets */
415 
416 	unsigned		hb_iso_rx:1;	/* high bandwidth iso rx? */
417 	unsigned		hb_iso_tx:1;	/* high bandwidth iso tx? */
418 	unsigned		dyn_fifo:1;	/* dynamic FIFO supported? */
419 
420 	unsigned		bulk_split:1;
421 #define	can_bulk_split(musb,type) \
422 	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
423 
424 	unsigned		bulk_combine:1;
425 #define	can_bulk_combine(musb,type) \
426 	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
427 
428 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
429 	/* is_suspended means USB B_PERIPHERAL suspend */
430 	unsigned		is_suspended:1;
431 
432 	/* may_wakeup means remote wakeup is enabled */
433 	unsigned		may_wakeup:1;
434 
435 	/* is_self_powered is reported in device status and the
436 	 * config descriptor.  is_bus_powered means B_PERIPHERAL
437 	 * draws some VBUS current; both can be true.
438 	 */
439 	unsigned		is_self_powered:1;
440 	unsigned		is_bus_powered:1;
441 
442 	unsigned		set_address:1;
443 	unsigned		test_mode:1;
444 	unsigned		softconnect:1;
445 
446 	u8			address;
447 	u8			test_mode_nr;
448 	u16			ackpend;		/* ep0 */
449 	enum musb_g_ep0_state	ep0_state;
450 	struct usb_gadget	g;			/* the gadget */
451 	struct usb_gadget_driver *gadget_driver;	/* its driver */
452 #endif
453 
454 	struct musb_hdrc_config	*config;
455 
456 #ifdef MUSB_CONFIG_PROC_FS
457 	struct proc_dir_entry *proc_entry;
458 #endif
459 };
460 
461 #ifdef CONFIG_PM
462 struct musb_csr_regs {
463 	/* FIFO registers */
464 	u16 txmaxp, txcsr, rxmaxp, rxcsr;
465 	u16 rxfifoadd, txfifoadd;
466 	u8 txtype, txinterval, rxtype, rxinterval;
467 	u8 rxfifosz, txfifosz;
468 	u8 txfunaddr, txhubaddr, txhubport;
469 	u8 rxfunaddr, rxhubaddr, rxhubport;
470 };
471 
472 struct musb_context_registers {
473 
474 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
475     defined(CONFIG_ARCH_OMAP4)
476 	u32 otg_sysconfig, otg_forcestandby;
477 #endif
478 	u8 power;
479 	u16 intrtxe, intrrxe;
480 	u8 intrusbe;
481 	u16 frame;
482 	u8 index, testmode;
483 
484 	u8 devctl, busctl, misc;
485 
486 	struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
487 };
488 
489 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
490     defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_BLACKFIN)
491 extern void musb_platform_save_context(struct musb *musb,
492 		struct musb_context_registers *musb_context);
493 extern void musb_platform_restore_context(struct musb *musb,
494 		struct musb_context_registers *musb_context);
495 #else
496 #define musb_platform_save_context(m, x)	do {} while (0)
497 #define musb_platform_restore_context(m, x)	do {} while (0)
498 #endif
499 
500 #endif
501 
502 static inline void musb_set_vbus(struct musb *musb, int is_on)
503 {
504 	musb->board_set_vbus(musb, is_on);
505 }
506 
507 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
508 static inline struct musb *gadget_to_musb(struct usb_gadget *g)
509 {
510 	return container_of(g, struct musb, g);
511 }
512 #endif
513 
514 #ifdef CONFIG_BLACKFIN
515 static inline int musb_read_fifosize(struct musb *musb,
516 		struct musb_hw_ep *hw_ep, u8 epnum)
517 {
518 	musb->nr_endpoints++;
519 	musb->epmask |= (1 << epnum);
520 
521 	if (epnum < 5) {
522 		hw_ep->max_packet_sz_tx = 128;
523 		hw_ep->max_packet_sz_rx = 128;
524 	} else {
525 		hw_ep->max_packet_sz_tx = 1024;
526 		hw_ep->max_packet_sz_rx = 1024;
527 	}
528 	hw_ep->is_shared_fifo = false;
529 
530 	return 0;
531 }
532 
533 static inline void musb_configure_ep0(struct musb *musb)
534 {
535 	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
536 	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
537 	musb->endpoints[0].is_shared_fifo = true;
538 }
539 
540 #else
541 
542 static inline int musb_read_fifosize(struct musb *musb,
543 		struct musb_hw_ep *hw_ep, u8 epnum)
544 {
545 	void *mbase = musb->mregs;
546 	u8 reg = 0;
547 
548 	/* read from core using indexed model */
549 	reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
550 	/* 0's returned when no more endpoints */
551 	if (!reg)
552 		return -ENODEV;
553 
554 	musb->nr_endpoints++;
555 	musb->epmask |= (1 << epnum);
556 
557 	hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
558 
559 	/* shared TX/RX FIFO? */
560 	if ((reg & 0xf0) == 0xf0) {
561 		hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
562 		hw_ep->is_shared_fifo = true;
563 		return 0;
564 	} else {
565 		hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
566 		hw_ep->is_shared_fifo = false;
567 	}
568 
569 	return 0;
570 }
571 
572 static inline void musb_configure_ep0(struct musb *musb)
573 {
574 	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
575 	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
576 	musb->endpoints[0].is_shared_fifo = true;
577 }
578 #endif /* CONFIG_BLACKFIN */
579 
580 
581 /***************************** Glue it together *****************************/
582 
583 extern const char musb_driver_name[];
584 
585 extern void musb_start(struct musb *musb);
586 extern void musb_stop(struct musb *musb);
587 
588 extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
589 extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
590 
591 extern void musb_load_testpacket(struct musb *);
592 
593 extern irqreturn_t musb_interrupt(struct musb *);
594 
595 extern void musb_platform_enable(struct musb *musb);
596 extern void musb_platform_disable(struct musb *musb);
597 
598 extern void musb_hnp_stop(struct musb *musb);
599 
600 extern int musb_platform_set_mode(struct musb *musb, u8 musb_mode);
601 
602 #if defined(CONFIG_USB_TUSB6010) || defined(CONFIG_BLACKFIN) || \
603 	defined(CONFIG_ARCH_DAVINCI_DA8XX) || \
604 	defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
605 	defined(CONFIG_ARCH_OMAP4)
606 extern void musb_platform_try_idle(struct musb *musb, unsigned long timeout);
607 #else
608 #define musb_platform_try_idle(x, y)		do {} while (0)
609 #endif
610 
611 #if defined(CONFIG_USB_TUSB6010) || defined(CONFIG_BLACKFIN)
612 extern int musb_platform_get_vbus_status(struct musb *musb);
613 #else
614 #define musb_platform_get_vbus_status(x)	0
615 #endif
616 
617 extern int __init musb_platform_init(struct musb *musb, void *board_data);
618 extern int musb_platform_exit(struct musb *musb);
619 
620 #endif	/* __MUSB_CORE_H__ */
621