1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * MUSB OTG driver defines 4 * 5 * Copyright 2005 Mentor Graphics Corporation 6 * Copyright (C) 2005-2006 by Texas Instruments 7 * Copyright (C) 2006-2007 Nokia Corporation 8 */ 9 10 #ifndef __MUSB_CORE_H__ 11 #define __MUSB_CORE_H__ 12 13 #include <linux/slab.h> 14 #include <linux/list.h> 15 #include <linux/interrupt.h> 16 #include <linux/errno.h> 17 #include <linux/timer.h> 18 #include <linux/device.h> 19 #include <linux/usb/ch9.h> 20 #include <linux/usb/gadget.h> 21 #include <linux/usb.h> 22 #include <linux/usb/otg.h> 23 #include <linux/usb/musb.h> 24 #include <linux/phy/phy.h> 25 #include <linux/workqueue.h> 26 27 struct musb; 28 struct musb_hw_ep; 29 struct musb_ep; 30 31 /* Helper defines for struct musb->hwvers */ 32 #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f) 33 #define MUSB_HWVERS_MINOR(x) (x & 0x3ff) 34 #define MUSB_HWVERS_RC 0x8000 35 #define MUSB_HWVERS_1300 0x52C 36 #define MUSB_HWVERS_1400 0x590 37 #define MUSB_HWVERS_1800 0x720 38 #define MUSB_HWVERS_1900 0x784 39 #define MUSB_HWVERS_2000 0x800 40 41 #include "musb_debug.h" 42 #include "musb_dma.h" 43 44 #include "musb_io.h" 45 46 #include "musb_gadget.h" 47 #include <linux/usb/hcd.h> 48 #include "musb_host.h" 49 50 /* NOTE: otg and peripheral-only state machines start at B_IDLE. 51 * OTG or host-only go to A_IDLE when ID is sensed. 52 */ 53 #define is_peripheral_active(m) (!(m)->is_host) 54 #define is_host_active(m) ((m)->is_host) 55 56 enum { 57 MUSB_PORT_MODE_HOST = 1, 58 MUSB_PORT_MODE_GADGET, 59 MUSB_PORT_MODE_DUAL_ROLE, 60 }; 61 62 /****************************** CONSTANTS ********************************/ 63 64 #ifndef MUSB_C_NUM_EPS 65 #define MUSB_C_NUM_EPS ((u8)16) 66 #endif 67 68 #ifndef MUSB_MAX_END0_PACKET 69 #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE) 70 #endif 71 72 /* host side ep0 states */ 73 enum musb_h_ep0_state { 74 MUSB_EP0_IDLE, 75 MUSB_EP0_START, /* expect ack of setup */ 76 MUSB_EP0_IN, /* expect IN DATA */ 77 MUSB_EP0_OUT, /* expect ack of OUT DATA */ 78 MUSB_EP0_STATUS, /* expect ack of STATUS */ 79 } __attribute__ ((packed)); 80 81 /* peripheral side ep0 states */ 82 enum musb_g_ep0_state { 83 MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */ 84 MUSB_EP0_STAGE_SETUP, /* received SETUP */ 85 MUSB_EP0_STAGE_TX, /* IN data */ 86 MUSB_EP0_STAGE_RX, /* OUT data */ 87 MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */ 88 MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */ 89 MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */ 90 } __attribute__ ((packed)); 91 92 /* 93 * OTG protocol constants. See USB OTG 1.3 spec, 94 * sections 5.5 "Device Timings" and 6.6.5 "Timers". 95 */ 96 #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */ 97 #define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */ 98 #define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */ 99 #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */ 100 101 /****************************** FUNCTIONS ********************************/ 102 103 #define MUSB_HST_MODE(_musb)\ 104 { (_musb)->is_host = true; } 105 #define MUSB_DEV_MODE(_musb) \ 106 { (_musb)->is_host = false; } 107 108 #define test_devctl_hst_mode(_x) \ 109 (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM) 110 111 #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral") 112 113 /******************************** TYPES *************************************/ 114 115 struct musb_io; 116 117 /** 118 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer 119 * @quirks: flags for platform specific quirks 120 * @enable: enable device 121 * @disable: disable device 122 * @ep_offset: returns the end point offset 123 * @ep_select: selects the specified end point 124 * @fifo_mode: sets the fifo mode 125 * @fifo_offset: returns the fifo offset 126 * @readb: read 8 bits 127 * @writeb: write 8 bits 128 * @readw: read 16 bits 129 * @writew: write 16 bits 130 * @readl: read 32 bits 131 * @writel: write 32 bits 132 * @read_fifo: reads the fifo 133 * @write_fifo: writes to fifo 134 * @dma_init: platform specific dma init function 135 * @dma_exit: platform specific dma exit function 136 * @init: turns on clocks, sets up platform-specific registers, etc 137 * @exit: undoes @init 138 * @set_mode: forcefully changes operating mode 139 * @try_idle: tries to idle the IP 140 * @recover: platform-specific babble recovery 141 * @vbus_status: returns vbus status if possible 142 * @set_vbus: forces vbus status 143 * @adjust_channel_params: pre check for standard dma channel_program func 144 * @pre_root_reset_end: called before the root usb port reset flag gets cleared 145 * @post_root_reset_end: called after the root usb port reset flag gets cleared 146 * @phy_callback: optional callback function for the phy to call 147 */ 148 struct musb_platform_ops { 149 150 #define MUSB_G_NO_SKB_RESERVE BIT(9) 151 #define MUSB_DA8XX BIT(8) 152 #define MUSB_PRESERVE_SESSION BIT(7) 153 #define MUSB_DMA_UX500 BIT(6) 154 #define MUSB_DMA_CPPI41 BIT(5) 155 #define MUSB_DMA_CPPI BIT(4) 156 #define MUSB_DMA_TUSB_OMAP BIT(3) 157 #define MUSB_DMA_INVENTRA BIT(2) 158 #define MUSB_IN_TUSB BIT(1) 159 #define MUSB_INDEXED_EP BIT(0) 160 u32 quirks; 161 162 int (*init)(struct musb *musb); 163 int (*exit)(struct musb *musb); 164 165 void (*enable)(struct musb *musb); 166 void (*disable)(struct musb *musb); 167 168 u32 (*ep_offset)(u8 epnum, u16 offset); 169 void (*ep_select)(void __iomem *mbase, u8 epnum); 170 u16 fifo_mode; 171 u32 (*fifo_offset)(u8 epnum); 172 u32 (*busctl_offset)(u8 epnum, u16 offset); 173 u8 (*readb)(const void __iomem *addr, unsigned offset); 174 void (*writeb)(void __iomem *addr, unsigned offset, u8 data); 175 u16 (*readw)(const void __iomem *addr, unsigned offset); 176 void (*writew)(void __iomem *addr, unsigned offset, u16 data); 177 u32 (*readl)(const void __iomem *addr, unsigned offset); 178 void (*writel)(void __iomem *addr, unsigned offset, u32 data); 179 void (*read_fifo)(struct musb_hw_ep *hw_ep, u16 len, u8 *buf); 180 void (*write_fifo)(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf); 181 struct dma_controller * 182 (*dma_init) (struct musb *musb, void __iomem *base); 183 void (*dma_exit)(struct dma_controller *c); 184 int (*set_mode)(struct musb *musb, u8 mode); 185 void (*try_idle)(struct musb *musb, unsigned long timeout); 186 int (*recover)(struct musb *musb); 187 188 int (*vbus_status)(struct musb *musb); 189 void (*set_vbus)(struct musb *musb, int on); 190 191 int (*adjust_channel_params)(struct dma_channel *channel, 192 u16 packet_sz, u8 *mode, 193 dma_addr_t *dma_addr, u32 *len); 194 void (*pre_root_reset_end)(struct musb *musb); 195 void (*post_root_reset_end)(struct musb *musb); 196 int (*phy_callback)(enum musb_vbus_id_status status); 197 void (*clear_ep_rxintr)(struct musb *musb, int epnum); 198 }; 199 200 /* 201 * struct musb_hw_ep - endpoint hardware (bidirectional) 202 * 203 * Ordered slightly for better cacheline locality. 204 */ 205 struct musb_hw_ep { 206 struct musb *musb; 207 void __iomem *fifo; 208 void __iomem *regs; 209 210 #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010) 211 void __iomem *conf; 212 #endif 213 214 /* index in musb->endpoints[] */ 215 u8 epnum; 216 217 /* hardware configuration, possibly dynamic */ 218 bool is_shared_fifo; 219 bool tx_double_buffered; 220 bool rx_double_buffered; 221 u16 max_packet_sz_tx; 222 u16 max_packet_sz_rx; 223 224 struct dma_channel *tx_channel; 225 struct dma_channel *rx_channel; 226 227 #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010) 228 /* TUSB has "asynchronous" and "synchronous" dma modes */ 229 dma_addr_t fifo_async; 230 dma_addr_t fifo_sync; 231 void __iomem *fifo_sync_va; 232 #endif 233 234 /* currently scheduled peripheral endpoint */ 235 struct musb_qh *in_qh; 236 struct musb_qh *out_qh; 237 238 u8 rx_reinit; 239 u8 tx_reinit; 240 241 /* peripheral side */ 242 struct musb_ep ep_in; /* TX */ 243 struct musb_ep ep_out; /* RX */ 244 }; 245 246 static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep) 247 { 248 return next_request(&hw_ep->ep_in); 249 } 250 251 static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep) 252 { 253 return next_request(&hw_ep->ep_out); 254 } 255 256 struct musb_csr_regs { 257 /* FIFO registers */ 258 u16 txmaxp, txcsr, rxmaxp, rxcsr; 259 u16 rxfifoadd, txfifoadd; 260 u8 txtype, txinterval, rxtype, rxinterval; 261 u8 rxfifosz, txfifosz; 262 u8 txfunaddr, txhubaddr, txhubport; 263 u8 rxfunaddr, rxhubaddr, rxhubport; 264 }; 265 266 struct musb_context_registers { 267 268 u8 power; 269 u8 intrusbe; 270 u16 frame; 271 u8 index, testmode; 272 273 u8 devctl, busctl, misc; 274 u32 otg_interfsel; 275 276 struct musb_csr_regs index_regs[MUSB_C_NUM_EPS]; 277 }; 278 279 /* 280 * struct musb - Driver instance data. 281 */ 282 struct musb { 283 /* device lock */ 284 spinlock_t lock; 285 spinlock_t list_lock; /* resume work list lock */ 286 287 struct musb_io io; 288 const struct musb_platform_ops *ops; 289 struct musb_context_registers context; 290 291 irqreturn_t (*isr)(int, void *); 292 struct delayed_work irq_work; 293 struct delayed_work deassert_reset_work; 294 struct delayed_work finish_resume_work; 295 struct delayed_work gadget_work; 296 u16 hwvers; 297 298 u16 intrrxe; 299 u16 intrtxe; 300 /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */ 301 #define MUSB_PORT_STAT_RESUME (1 << 31) 302 303 u32 port1_status; 304 305 unsigned long rh_timer; 306 307 enum musb_h_ep0_state ep0_stage; 308 309 /* bulk traffic normally dedicates endpoint hardware, and each 310 * direction has its own ring of host side endpoints. 311 * we try to progress the transfer at the head of each endpoint's 312 * queue until it completes or NAKs too much; then we try the next 313 * endpoint. 314 */ 315 struct musb_hw_ep *bulk_ep; 316 317 struct list_head control; /* of musb_qh */ 318 struct list_head in_bulk; /* of musb_qh */ 319 struct list_head out_bulk; /* of musb_qh */ 320 struct list_head pending_list; /* pending work list */ 321 322 struct timer_list otg_timer; 323 struct timer_list dev_timer; 324 struct notifier_block nb; 325 326 struct dma_controller *dma_controller; 327 328 struct device *controller; 329 void __iomem *ctrl_base; 330 void __iomem *mregs; 331 332 #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010) 333 dma_addr_t async; 334 dma_addr_t sync; 335 void __iomem *sync_va; 336 u8 tusb_revision; 337 #endif 338 339 /* passed down from chip/board specific irq handlers */ 340 u8 int_usb; 341 u16 int_rx; 342 u16 int_tx; 343 344 struct usb_phy *xceiv; 345 struct phy *phy; 346 347 int nIrq; 348 unsigned irq_wake:1; 349 350 struct musb_hw_ep endpoints[MUSB_C_NUM_EPS]; 351 #define control_ep endpoints 352 353 #define VBUSERR_RETRY_COUNT 3 354 u16 vbuserr_retry; 355 u16 epmask; 356 u8 nr_endpoints; 357 358 int (*board_set_power)(int state); 359 360 u8 min_power; /* vbus for periph, in mA/2 */ 361 362 int port_mode; /* MUSB_PORT_MODE_* */ 363 bool session; 364 unsigned long quirk_retries; 365 bool is_host; 366 367 int a_wait_bcon; /* VBUS timeout in msecs */ 368 unsigned long idle_timeout; /* Next timeout in jiffies */ 369 370 unsigned is_initialized:1; 371 unsigned is_runtime_suspended:1; 372 373 /* active means connected and not suspended */ 374 unsigned is_active:1; 375 376 unsigned is_multipoint:1; 377 378 unsigned hb_iso_rx:1; /* high bandwidth iso rx? */ 379 unsigned hb_iso_tx:1; /* high bandwidth iso tx? */ 380 unsigned dyn_fifo:1; /* dynamic FIFO supported? */ 381 382 unsigned bulk_split:1; 383 #define can_bulk_split(musb,type) \ 384 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split) 385 386 unsigned bulk_combine:1; 387 #define can_bulk_combine(musb,type) \ 388 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine) 389 390 /* is_suspended means USB B_PERIPHERAL suspend */ 391 unsigned is_suspended:1; 392 393 /* may_wakeup means remote wakeup is enabled */ 394 unsigned may_wakeup:1; 395 396 /* is_self_powered is reported in device status and the 397 * config descriptor. is_bus_powered means B_PERIPHERAL 398 * draws some VBUS current; both can be true. 399 */ 400 unsigned is_self_powered:1; 401 unsigned is_bus_powered:1; 402 403 unsigned set_address:1; 404 unsigned test_mode:1; 405 unsigned softconnect:1; 406 407 unsigned flush_irq_work:1; 408 409 u8 address; 410 u8 test_mode_nr; 411 u16 ackpend; /* ep0 */ 412 enum musb_g_ep0_state ep0_state; 413 struct usb_gadget g; /* the gadget */ 414 struct usb_gadget_driver *gadget_driver; /* its driver */ 415 struct usb_hcd *hcd; /* the usb hcd */ 416 417 const struct musb_hdrc_config *config; 418 419 int xceiv_old_state; 420 #ifdef CONFIG_DEBUG_FS 421 struct dentry *debugfs_root; 422 #endif 423 }; 424 425 /* This must be included after struct musb is defined */ 426 #include "musb_regs.h" 427 428 static inline struct musb *gadget_to_musb(struct usb_gadget *g) 429 { 430 return container_of(g, struct musb, g); 431 } 432 433 static inline char *musb_ep_xfertype_string(u8 type) 434 { 435 char *s; 436 437 switch (type) { 438 case USB_ENDPOINT_XFER_CONTROL: 439 s = "ctrl"; 440 break; 441 case USB_ENDPOINT_XFER_ISOC: 442 s = "iso"; 443 break; 444 case USB_ENDPOINT_XFER_BULK: 445 s = "bulk"; 446 break; 447 case USB_ENDPOINT_XFER_INT: 448 s = "int"; 449 break; 450 default: 451 s = ""; 452 break; 453 } 454 return s; 455 } 456 457 static inline int musb_read_fifosize(struct musb *musb, 458 struct musb_hw_ep *hw_ep, u8 epnum) 459 { 460 void __iomem *mbase = musb->mregs; 461 u8 reg = 0; 462 463 /* read from core using indexed model */ 464 reg = musb_readb(mbase, musb->io.ep_offset(epnum, MUSB_FIFOSIZE)); 465 /* 0's returned when no more endpoints */ 466 if (!reg) 467 return -ENODEV; 468 469 musb->nr_endpoints++; 470 musb->epmask |= (1 << epnum); 471 472 hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f); 473 474 /* shared TX/RX FIFO? */ 475 if ((reg & 0xf0) == 0xf0) { 476 hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx; 477 hw_ep->is_shared_fifo = true; 478 return 0; 479 } else { 480 hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4); 481 hw_ep->is_shared_fifo = false; 482 } 483 484 return 0; 485 } 486 487 static inline void musb_configure_ep0(struct musb *musb) 488 { 489 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; 490 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; 491 musb->endpoints[0].is_shared_fifo = true; 492 } 493 494 /***************************** Glue it together *****************************/ 495 496 extern const char musb_driver_name[]; 497 498 extern void musb_stop(struct musb *musb); 499 extern void musb_start(struct musb *musb); 500 501 extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src); 502 extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst); 503 504 extern void musb_load_testpacket(struct musb *); 505 506 extern irqreturn_t musb_interrupt(struct musb *); 507 508 extern void musb_hnp_stop(struct musb *musb); 509 510 int musb_queue_resume_work(struct musb *musb, 511 int (*callback)(struct musb *musb, void *data), 512 void *data); 513 514 static inline void musb_platform_set_vbus(struct musb *musb, int is_on) 515 { 516 if (musb->ops->set_vbus) 517 musb->ops->set_vbus(musb, is_on); 518 } 519 520 static inline void musb_platform_enable(struct musb *musb) 521 { 522 if (musb->ops->enable) 523 musb->ops->enable(musb); 524 } 525 526 static inline void musb_platform_disable(struct musb *musb) 527 { 528 if (musb->ops->disable) 529 musb->ops->disable(musb); 530 } 531 532 static inline int musb_platform_set_mode(struct musb *musb, u8 mode) 533 { 534 if (!musb->ops->set_mode) 535 return 0; 536 537 return musb->ops->set_mode(musb, mode); 538 } 539 540 static inline void musb_platform_try_idle(struct musb *musb, 541 unsigned long timeout) 542 { 543 if (musb->ops->try_idle) 544 musb->ops->try_idle(musb, timeout); 545 } 546 547 static inline int musb_platform_recover(struct musb *musb) 548 { 549 if (!musb->ops->recover) 550 return 0; 551 552 return musb->ops->recover(musb); 553 } 554 555 static inline int musb_platform_get_vbus_status(struct musb *musb) 556 { 557 if (!musb->ops->vbus_status) 558 return -EINVAL; 559 560 return musb->ops->vbus_status(musb); 561 } 562 563 static inline int musb_platform_init(struct musb *musb) 564 { 565 if (!musb->ops->init) 566 return -EINVAL; 567 568 return musb->ops->init(musb); 569 } 570 571 static inline int musb_platform_exit(struct musb *musb) 572 { 573 if (!musb->ops->exit) 574 return -EINVAL; 575 576 return musb->ops->exit(musb); 577 } 578 579 static inline void musb_platform_pre_root_reset_end(struct musb *musb) 580 { 581 if (musb->ops->pre_root_reset_end) 582 musb->ops->pre_root_reset_end(musb); 583 } 584 585 static inline void musb_platform_post_root_reset_end(struct musb *musb) 586 { 587 if (musb->ops->post_root_reset_end) 588 musb->ops->post_root_reset_end(musb); 589 } 590 591 static inline void musb_platform_clear_ep_rxintr(struct musb *musb, int epnum) 592 { 593 if (musb->ops->clear_ep_rxintr) 594 musb->ops->clear_ep_rxintr(musb, epnum); 595 } 596 597 /* 598 * gets the "dr_mode" property from DT and converts it into musb_mode 599 * if the property is not found or not recognized returns MUSB_OTG 600 */ 601 extern enum musb_mode musb_get_mode(struct device *dev); 602 603 #endif /* __MUSB_CORE_H__ */ 604