xref: /openbmc/linux/drivers/usb/musb/musb_core.h (revision a36954f5)
1 /*
2  * MUSB OTG driver defines
3  *
4  * Copyright 2005 Mentor Graphics Corporation
5  * Copyright (C) 2005-2006 by Texas Instruments
6  * Copyright (C) 2006-2007 Nokia Corporation
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * version 2 as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but
13  * WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20  * 02110-1301 USA
21  *
22  * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
23  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
25  * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
29  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  *
33  */
34 
35 #ifndef __MUSB_CORE_H__
36 #define __MUSB_CORE_H__
37 
38 #include <linux/slab.h>
39 #include <linux/list.h>
40 #include <linux/interrupt.h>
41 #include <linux/errno.h>
42 #include <linux/timer.h>
43 #include <linux/device.h>
44 #include <linux/usb/ch9.h>
45 #include <linux/usb/gadget.h>
46 #include <linux/usb.h>
47 #include <linux/usb/otg.h>
48 #include <linux/usb/musb.h>
49 #include <linux/phy/phy.h>
50 #include <linux/workqueue.h>
51 
52 struct musb;
53 struct musb_hw_ep;
54 struct musb_ep;
55 
56 /* Helper defines for struct musb->hwvers */
57 #define MUSB_HWVERS_MAJOR(x)	((x >> 10) & 0x1f)
58 #define MUSB_HWVERS_MINOR(x)	(x & 0x3ff)
59 #define MUSB_HWVERS_RC		0x8000
60 #define MUSB_HWVERS_1300	0x52C
61 #define MUSB_HWVERS_1400	0x590
62 #define MUSB_HWVERS_1800	0x720
63 #define MUSB_HWVERS_1900	0x784
64 #define MUSB_HWVERS_2000	0x800
65 
66 #include "musb_debug.h"
67 #include "musb_dma.h"
68 
69 #include "musb_io.h"
70 
71 #include "musb_gadget.h"
72 #include <linux/usb/hcd.h>
73 #include "musb_host.h"
74 
75 /* NOTE:  otg and peripheral-only state machines start at B_IDLE.
76  * OTG or host-only go to A_IDLE when ID is sensed.
77  */
78 #define is_peripheral_active(m)		(!(m)->is_host)
79 #define is_host_active(m)		((m)->is_host)
80 
81 enum {
82 	MUSB_PORT_MODE_HOST	= 1,
83 	MUSB_PORT_MODE_GADGET,
84 	MUSB_PORT_MODE_DUAL_ROLE,
85 };
86 
87 /****************************** CONSTANTS ********************************/
88 
89 #ifndef MUSB_C_NUM_EPS
90 #define MUSB_C_NUM_EPS ((u8)16)
91 #endif
92 
93 #ifndef MUSB_MAX_END0_PACKET
94 #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
95 #endif
96 
97 /* host side ep0 states */
98 enum musb_h_ep0_state {
99 	MUSB_EP0_IDLE,
100 	MUSB_EP0_START,			/* expect ack of setup */
101 	MUSB_EP0_IN,			/* expect IN DATA */
102 	MUSB_EP0_OUT,			/* expect ack of OUT DATA */
103 	MUSB_EP0_STATUS,		/* expect ack of STATUS */
104 } __attribute__ ((packed));
105 
106 /* peripheral side ep0 states */
107 enum musb_g_ep0_state {
108 	MUSB_EP0_STAGE_IDLE,		/* idle, waiting for SETUP */
109 	MUSB_EP0_STAGE_SETUP,		/* received SETUP */
110 	MUSB_EP0_STAGE_TX,		/* IN data */
111 	MUSB_EP0_STAGE_RX,		/* OUT data */
112 	MUSB_EP0_STAGE_STATUSIN,	/* (after OUT data) */
113 	MUSB_EP0_STAGE_STATUSOUT,	/* (after IN data) */
114 	MUSB_EP0_STAGE_ACKWAIT,		/* after zlp, before statusin */
115 } __attribute__ ((packed));
116 
117 /*
118  * OTG protocol constants.  See USB OTG 1.3 spec,
119  * sections 5.5 "Device Timings" and 6.6.5 "Timers".
120  */
121 #define OTG_TIME_A_WAIT_VRISE	100		/* msec (max) */
122 #define OTG_TIME_A_WAIT_BCON	1100		/* min 1 second */
123 #define OTG_TIME_A_AIDL_BDIS	200		/* min 200 msec */
124 #define OTG_TIME_B_ASE0_BRST	100		/* min 3.125 ms */
125 
126 /****************************** FUNCTIONS ********************************/
127 
128 #define MUSB_HST_MODE(_musb)\
129 	{ (_musb)->is_host = true; }
130 #define MUSB_DEV_MODE(_musb) \
131 	{ (_musb)->is_host = false; }
132 
133 #define test_devctl_hst_mode(_x) \
134 	(musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
135 
136 #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
137 
138 /******************************** TYPES *************************************/
139 
140 struct musb_io;
141 
142 /**
143  * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
144  * @quirks:	flags for platform specific quirks
145  * @enable:	enable device
146  * @disable:	disable device
147  * @ep_offset:	returns the end point offset
148  * @ep_select:	selects the specified end point
149  * @fifo_mode:	sets the fifo mode
150  * @fifo_offset: returns the fifo offset
151  * @readb:	read 8 bits
152  * @writeb:	write 8 bits
153  * @readw:	read 16 bits
154  * @writew:	write 16 bits
155  * @readl:	read 32 bits
156  * @writel:	write 32 bits
157  * @read_fifo:	reads the fifo
158  * @write_fifo:	writes to fifo
159  * @dma_init:	platform specific dma init function
160  * @dma_exit:	platform specific dma exit function
161  * @init:	turns on clocks, sets up platform-specific registers, etc
162  * @exit:	undoes @init
163  * @set_mode:	forcefully changes operating mode
164  * @try_idle:	tries to idle the IP
165  * @recover:	platform-specific babble recovery
166  * @vbus_status: returns vbus status if possible
167  * @set_vbus:	forces vbus status
168  * @adjust_channel_params: pre check for standard dma channel_program func
169  * @pre_root_reset_end: called before the root usb port reset flag gets cleared
170  * @post_root_reset_end: called after the root usb port reset flag gets cleared
171  * @phy_callback: optional callback function for the phy to call
172  */
173 struct musb_platform_ops {
174 
175 #define MUSB_DA8XX		BIT(8)
176 #define MUSB_PRESERVE_SESSION	BIT(7)
177 #define MUSB_DMA_UX500		BIT(6)
178 #define MUSB_DMA_CPPI41		BIT(5)
179 #define MUSB_DMA_CPPI		BIT(4)
180 #define MUSB_DMA_TUSB_OMAP	BIT(3)
181 #define MUSB_DMA_INVENTRA	BIT(2)
182 #define MUSB_IN_TUSB		BIT(1)
183 #define MUSB_INDEXED_EP		BIT(0)
184 	u32	quirks;
185 
186 	int	(*init)(struct musb *musb);
187 	int	(*exit)(struct musb *musb);
188 
189 	void	(*enable)(struct musb *musb);
190 	void	(*disable)(struct musb *musb);
191 
192 	u32	(*ep_offset)(u8 epnum, u16 offset);
193 	void	(*ep_select)(void __iomem *mbase, u8 epnum);
194 	u16	fifo_mode;
195 	u32	(*fifo_offset)(u8 epnum);
196 	u32	(*busctl_offset)(u8 epnum, u16 offset);
197 	u8	(*readb)(const void __iomem *addr, unsigned offset);
198 	void	(*writeb)(void __iomem *addr, unsigned offset, u8 data);
199 	u16	(*readw)(const void __iomem *addr, unsigned offset);
200 	void	(*writew)(void __iomem *addr, unsigned offset, u16 data);
201 	u32	(*readl)(const void __iomem *addr, unsigned offset);
202 	void	(*writel)(void __iomem *addr, unsigned offset, u32 data);
203 	void	(*read_fifo)(struct musb_hw_ep *hw_ep, u16 len, u8 *buf);
204 	void	(*write_fifo)(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf);
205 	struct dma_controller *
206 		(*dma_init) (struct musb *musb, void __iomem *base);
207 	void	(*dma_exit)(struct dma_controller *c);
208 	int	(*set_mode)(struct musb *musb, u8 mode);
209 	void	(*try_idle)(struct musb *musb, unsigned long timeout);
210 	int	(*recover)(struct musb *musb);
211 
212 	int	(*vbus_status)(struct musb *musb);
213 	void	(*set_vbus)(struct musb *musb, int on);
214 
215 	int	(*adjust_channel_params)(struct dma_channel *channel,
216 				u16 packet_sz, u8 *mode,
217 				dma_addr_t *dma_addr, u32 *len);
218 	void	(*pre_root_reset_end)(struct musb *musb);
219 	void	(*post_root_reset_end)(struct musb *musb);
220 	int	(*phy_callback)(enum musb_vbus_id_status status);
221 	void	(*clear_ep_rxintr)(struct musb *musb, int epnum);
222 };
223 
224 /*
225  * struct musb_hw_ep - endpoint hardware (bidirectional)
226  *
227  * Ordered slightly for better cacheline locality.
228  */
229 struct musb_hw_ep {
230 	struct musb		*musb;
231 	void __iomem		*fifo;
232 	void __iomem		*regs;
233 
234 #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
235 	void __iomem		*conf;
236 #endif
237 
238 	/* index in musb->endpoints[]  */
239 	u8			epnum;
240 
241 	/* hardware configuration, possibly dynamic */
242 	bool			is_shared_fifo;
243 	bool			tx_double_buffered;
244 	bool			rx_double_buffered;
245 	u16			max_packet_sz_tx;
246 	u16			max_packet_sz_rx;
247 
248 	struct dma_channel	*tx_channel;
249 	struct dma_channel	*rx_channel;
250 
251 #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
252 	/* TUSB has "asynchronous" and "synchronous" dma modes */
253 	dma_addr_t		fifo_async;
254 	dma_addr_t		fifo_sync;
255 	void __iomem		*fifo_sync_va;
256 #endif
257 
258 	/* currently scheduled peripheral endpoint */
259 	struct musb_qh		*in_qh;
260 	struct musb_qh		*out_qh;
261 
262 	u8			rx_reinit;
263 	u8			tx_reinit;
264 
265 	/* peripheral side */
266 	struct musb_ep		ep_in;			/* TX */
267 	struct musb_ep		ep_out;			/* RX */
268 };
269 
270 static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
271 {
272 	return next_request(&hw_ep->ep_in);
273 }
274 
275 static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
276 {
277 	return next_request(&hw_ep->ep_out);
278 }
279 
280 struct musb_csr_regs {
281 	/* FIFO registers */
282 	u16 txmaxp, txcsr, rxmaxp, rxcsr;
283 	u16 rxfifoadd, txfifoadd;
284 	u8 txtype, txinterval, rxtype, rxinterval;
285 	u8 rxfifosz, txfifosz;
286 	u8 txfunaddr, txhubaddr, txhubport;
287 	u8 rxfunaddr, rxhubaddr, rxhubport;
288 };
289 
290 struct musb_context_registers {
291 
292 	u8 power;
293 	u8 intrusbe;
294 	u16 frame;
295 	u8 index, testmode;
296 
297 	u8 devctl, busctl, misc;
298 	u32 otg_interfsel;
299 
300 	struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
301 };
302 
303 /*
304  * struct musb - Driver instance data.
305  */
306 struct musb {
307 	/* device lock */
308 	spinlock_t		lock;
309 	spinlock_t		list_lock;	/* resume work list lock */
310 
311 	struct musb_io		io;
312 	const struct musb_platform_ops *ops;
313 	struct musb_context_registers context;
314 
315 	irqreturn_t		(*isr)(int, void *);
316 	struct delayed_work	irq_work;
317 	struct delayed_work	deassert_reset_work;
318 	struct delayed_work	finish_resume_work;
319 	struct delayed_work	gadget_work;
320 	u16			hwvers;
321 
322 	u16			intrrxe;
323 	u16			intrtxe;
324 /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
325 #define MUSB_PORT_STAT_RESUME	(1 << 31)
326 
327 	u32			port1_status;
328 
329 	unsigned long		rh_timer;
330 
331 	enum musb_h_ep0_state	ep0_stage;
332 
333 	/* bulk traffic normally dedicates endpoint hardware, and each
334 	 * direction has its own ring of host side endpoints.
335 	 * we try to progress the transfer at the head of each endpoint's
336 	 * queue until it completes or NAKs too much; then we try the next
337 	 * endpoint.
338 	 */
339 	struct musb_hw_ep	*bulk_ep;
340 
341 	struct list_head	control;	/* of musb_qh */
342 	struct list_head	in_bulk;	/* of musb_qh */
343 	struct list_head	out_bulk;	/* of musb_qh */
344 	struct list_head	pending_list;	/* pending work list */
345 
346 	struct timer_list	otg_timer;
347 	struct notifier_block	nb;
348 
349 	struct dma_controller	*dma_controller;
350 
351 	struct device		*controller;
352 	void __iomem		*ctrl_base;
353 	void __iomem		*mregs;
354 
355 #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
356 	dma_addr_t		async;
357 	dma_addr_t		sync;
358 	void __iomem		*sync_va;
359 	u8			tusb_revision;
360 #endif
361 
362 	/* passed down from chip/board specific irq handlers */
363 	u8			int_usb;
364 	u16			int_rx;
365 	u16			int_tx;
366 
367 	struct usb_phy		*xceiv;
368 	struct phy		*phy;
369 
370 	int nIrq;
371 	unsigned		irq_wake:1;
372 
373 	struct musb_hw_ep	 endpoints[MUSB_C_NUM_EPS];
374 #define control_ep		endpoints
375 
376 #define VBUSERR_RETRY_COUNT	3
377 	u16			vbuserr_retry;
378 	u16 epmask;
379 	u8 nr_endpoints;
380 
381 	int			(*board_set_power)(int state);
382 
383 	u8			min_power;	/* vbus for periph, in mA/2 */
384 
385 	int			port_mode;	/* MUSB_PORT_MODE_* */
386 	bool			session;
387 	unsigned long		quirk_retries;
388 	bool			is_host;
389 
390 	int			a_wait_bcon;	/* VBUS timeout in msecs */
391 	unsigned long		idle_timeout;	/* Next timeout in jiffies */
392 
393 	unsigned		is_initialized:1;
394 	unsigned		is_runtime_suspended:1;
395 
396 	/* active means connected and not suspended */
397 	unsigned		is_active:1;
398 
399 	unsigned is_multipoint:1;
400 
401 	unsigned		hb_iso_rx:1;	/* high bandwidth iso rx? */
402 	unsigned		hb_iso_tx:1;	/* high bandwidth iso tx? */
403 	unsigned		dyn_fifo:1;	/* dynamic FIFO supported? */
404 
405 	unsigned		bulk_split:1;
406 #define	can_bulk_split(musb,type) \
407 	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
408 
409 	unsigned		bulk_combine:1;
410 #define	can_bulk_combine(musb,type) \
411 	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
412 
413 	/* is_suspended means USB B_PERIPHERAL suspend */
414 	unsigned		is_suspended:1;
415 
416 	/* may_wakeup means remote wakeup is enabled */
417 	unsigned		may_wakeup:1;
418 
419 	/* is_self_powered is reported in device status and the
420 	 * config descriptor.  is_bus_powered means B_PERIPHERAL
421 	 * draws some VBUS current; both can be true.
422 	 */
423 	unsigned		is_self_powered:1;
424 	unsigned		is_bus_powered:1;
425 
426 	unsigned		set_address:1;
427 	unsigned		test_mode:1;
428 	unsigned		softconnect:1;
429 
430 	u8			address;
431 	u8			test_mode_nr;
432 	u16			ackpend;		/* ep0 */
433 	enum musb_g_ep0_state	ep0_state;
434 	struct usb_gadget	g;			/* the gadget */
435 	struct usb_gadget_driver *gadget_driver;	/* its driver */
436 	struct usb_hcd		*hcd;			/* the usb hcd */
437 
438 	/*
439 	 * FIXME: Remove this flag.
440 	 *
441 	 * This is only added to allow Blackfin to work
442 	 * with current driver. For some unknown reason
443 	 * Blackfin doesn't work with double buffering
444 	 * and that's enabled by default.
445 	 *
446 	 * We added this flag to forcefully disable double
447 	 * buffering until we get it working.
448 	 */
449 	unsigned                double_buffer_not_ok:1;
450 
451 	const struct musb_hdrc_config *config;
452 
453 	int			xceiv_old_state;
454 #ifdef CONFIG_DEBUG_FS
455 	struct dentry		*debugfs_root;
456 #endif
457 };
458 
459 /* This must be included after struct musb is defined */
460 #include "musb_regs.h"
461 
462 static inline struct musb *gadget_to_musb(struct usb_gadget *g)
463 {
464 	return container_of(g, struct musb, g);
465 }
466 
467 #ifdef CONFIG_BLACKFIN
468 static inline int musb_read_fifosize(struct musb *musb,
469 		struct musb_hw_ep *hw_ep, u8 epnum)
470 {
471 	musb->nr_endpoints++;
472 	musb->epmask |= (1 << epnum);
473 
474 	if (epnum < 5) {
475 		hw_ep->max_packet_sz_tx = 128;
476 		hw_ep->max_packet_sz_rx = 128;
477 	} else {
478 		hw_ep->max_packet_sz_tx = 1024;
479 		hw_ep->max_packet_sz_rx = 1024;
480 	}
481 	hw_ep->is_shared_fifo = false;
482 
483 	return 0;
484 }
485 
486 static inline void musb_configure_ep0(struct musb *musb)
487 {
488 	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
489 	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
490 	musb->endpoints[0].is_shared_fifo = true;
491 }
492 
493 #else
494 
495 static inline int musb_read_fifosize(struct musb *musb,
496 		struct musb_hw_ep *hw_ep, u8 epnum)
497 {
498 	void __iomem *mbase = musb->mregs;
499 	u8 reg = 0;
500 
501 	/* read from core using indexed model */
502 	reg = musb_readb(mbase, musb->io.ep_offset(epnum, MUSB_FIFOSIZE));
503 	/* 0's returned when no more endpoints */
504 	if (!reg)
505 		return -ENODEV;
506 
507 	musb->nr_endpoints++;
508 	musb->epmask |= (1 << epnum);
509 
510 	hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
511 
512 	/* shared TX/RX FIFO? */
513 	if ((reg & 0xf0) == 0xf0) {
514 		hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
515 		hw_ep->is_shared_fifo = true;
516 		return 0;
517 	} else {
518 		hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
519 		hw_ep->is_shared_fifo = false;
520 	}
521 
522 	return 0;
523 }
524 
525 static inline void musb_configure_ep0(struct musb *musb)
526 {
527 	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
528 	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
529 	musb->endpoints[0].is_shared_fifo = true;
530 }
531 #endif /* CONFIG_BLACKFIN */
532 
533 
534 /***************************** Glue it together *****************************/
535 
536 extern const char musb_driver_name[];
537 
538 extern void musb_stop(struct musb *musb);
539 extern void musb_start(struct musb *musb);
540 
541 extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
542 extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
543 
544 extern void musb_load_testpacket(struct musb *);
545 
546 extern irqreturn_t musb_interrupt(struct musb *);
547 
548 extern void musb_hnp_stop(struct musb *musb);
549 
550 int musb_queue_resume_work(struct musb *musb,
551 			   int (*callback)(struct musb *musb, void *data),
552 			   void *data);
553 
554 static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
555 {
556 	if (musb->ops->set_vbus)
557 		musb->ops->set_vbus(musb, is_on);
558 }
559 
560 static inline void musb_platform_enable(struct musb *musb)
561 {
562 	if (musb->ops->enable)
563 		musb->ops->enable(musb);
564 }
565 
566 static inline void musb_platform_disable(struct musb *musb)
567 {
568 	if (musb->ops->disable)
569 		musb->ops->disable(musb);
570 }
571 
572 static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
573 {
574 	if (!musb->ops->set_mode)
575 		return 0;
576 
577 	return musb->ops->set_mode(musb, mode);
578 }
579 
580 static inline void musb_platform_try_idle(struct musb *musb,
581 		unsigned long timeout)
582 {
583 	if (musb->ops->try_idle)
584 		musb->ops->try_idle(musb, timeout);
585 }
586 
587 static inline int  musb_platform_recover(struct musb *musb)
588 {
589 	if (!musb->ops->recover)
590 		return 0;
591 
592 	return musb->ops->recover(musb);
593 }
594 
595 static inline int musb_platform_get_vbus_status(struct musb *musb)
596 {
597 	if (!musb->ops->vbus_status)
598 		return -EINVAL;
599 
600 	return musb->ops->vbus_status(musb);
601 }
602 
603 static inline int musb_platform_init(struct musb *musb)
604 {
605 	if (!musb->ops->init)
606 		return -EINVAL;
607 
608 	return musb->ops->init(musb);
609 }
610 
611 static inline int musb_platform_exit(struct musb *musb)
612 {
613 	if (!musb->ops->exit)
614 		return -EINVAL;
615 
616 	return musb->ops->exit(musb);
617 }
618 
619 static inline void musb_platform_pre_root_reset_end(struct musb *musb)
620 {
621 	if (musb->ops->pre_root_reset_end)
622 		musb->ops->pre_root_reset_end(musb);
623 }
624 
625 static inline void musb_platform_post_root_reset_end(struct musb *musb)
626 {
627 	if (musb->ops->post_root_reset_end)
628 		musb->ops->post_root_reset_end(musb);
629 }
630 
631 static inline void musb_platform_clear_ep_rxintr(struct musb *musb, int epnum)
632 {
633 	if (musb->ops->clear_ep_rxintr)
634 		musb->ops->clear_ep_rxintr(musb, epnum);
635 }
636 
637 /*
638  * gets the "dr_mode" property from DT and converts it into musb_mode
639  * if the property is not found or not recognized returns MUSB_OTG
640  */
641 extern enum musb_mode musb_get_mode(struct device *dev);
642 
643 #endif	/* __MUSB_CORE_H__ */
644