1 /* 2 * MUSB OTG driver defines 3 * 4 * Copyright 2005 Mentor Graphics Corporation 5 * Copyright (C) 2005-2006 by Texas Instruments 6 * Copyright (C) 2006-2007 Nokia Corporation 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * version 2 as published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, but 13 * WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 20 * 02110-1301 USA 21 * 22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED 23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 */ 34 35 #ifndef __MUSB_CORE_H__ 36 #define __MUSB_CORE_H__ 37 38 #include <linux/slab.h> 39 #include <linux/list.h> 40 #include <linux/interrupt.h> 41 #include <linux/errno.h> 42 #include <linux/timer.h> 43 #include <linux/device.h> 44 #include <linux/usb/ch9.h> 45 #include <linux/usb/gadget.h> 46 #include <linux/usb.h> 47 #include <linux/usb/otg.h> 48 #include <linux/usb/musb.h> 49 #include <linux/phy/phy.h> 50 #include <linux/workqueue.h> 51 52 struct musb; 53 struct musb_hw_ep; 54 struct musb_ep; 55 56 /* Helper defines for struct musb->hwvers */ 57 #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f) 58 #define MUSB_HWVERS_MINOR(x) (x & 0x3ff) 59 #define MUSB_HWVERS_RC 0x8000 60 #define MUSB_HWVERS_1300 0x52C 61 #define MUSB_HWVERS_1400 0x590 62 #define MUSB_HWVERS_1800 0x720 63 #define MUSB_HWVERS_1900 0x784 64 #define MUSB_HWVERS_2000 0x800 65 66 #include "musb_debug.h" 67 #include "musb_dma.h" 68 69 #include "musb_io.h" 70 71 #include "musb_gadget.h" 72 #include <linux/usb/hcd.h> 73 #include "musb_host.h" 74 75 /* NOTE: otg and peripheral-only state machines start at B_IDLE. 76 * OTG or host-only go to A_IDLE when ID is sensed. 77 */ 78 #define is_peripheral_active(m) (!(m)->is_host) 79 #define is_host_active(m) ((m)->is_host) 80 81 enum { 82 MUSB_PORT_MODE_HOST = 1, 83 MUSB_PORT_MODE_GADGET, 84 MUSB_PORT_MODE_DUAL_ROLE, 85 }; 86 87 /****************************** CONSTANTS ********************************/ 88 89 #ifndef MUSB_C_NUM_EPS 90 #define MUSB_C_NUM_EPS ((u8)16) 91 #endif 92 93 #ifndef MUSB_MAX_END0_PACKET 94 #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE) 95 #endif 96 97 /* host side ep0 states */ 98 enum musb_h_ep0_state { 99 MUSB_EP0_IDLE, 100 MUSB_EP0_START, /* expect ack of setup */ 101 MUSB_EP0_IN, /* expect IN DATA */ 102 MUSB_EP0_OUT, /* expect ack of OUT DATA */ 103 MUSB_EP0_STATUS, /* expect ack of STATUS */ 104 } __attribute__ ((packed)); 105 106 /* peripheral side ep0 states */ 107 enum musb_g_ep0_state { 108 MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */ 109 MUSB_EP0_STAGE_SETUP, /* received SETUP */ 110 MUSB_EP0_STAGE_TX, /* IN data */ 111 MUSB_EP0_STAGE_RX, /* OUT data */ 112 MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */ 113 MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */ 114 MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */ 115 } __attribute__ ((packed)); 116 117 /* 118 * OTG protocol constants. See USB OTG 1.3 spec, 119 * sections 5.5 "Device Timings" and 6.6.5 "Timers". 120 */ 121 #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */ 122 #define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */ 123 #define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */ 124 #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */ 125 126 /****************************** FUNCTIONS ********************************/ 127 128 #define MUSB_HST_MODE(_musb)\ 129 { (_musb)->is_host = true; } 130 #define MUSB_DEV_MODE(_musb) \ 131 { (_musb)->is_host = false; } 132 133 #define test_devctl_hst_mode(_x) \ 134 (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM) 135 136 #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral") 137 138 /******************************** TYPES *************************************/ 139 140 struct musb_io; 141 142 /** 143 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer 144 * @quirks: flags for platform specific quirks 145 * @enable: enable device 146 * @disable: disable device 147 * @ep_offset: returns the end point offset 148 * @ep_select: selects the specified end point 149 * @fifo_mode: sets the fifo mode 150 * @fifo_offset: returns the fifo offset 151 * @readb: read 8 bits 152 * @writeb: write 8 bits 153 * @readw: read 16 bits 154 * @writew: write 16 bits 155 * @readl: read 32 bits 156 * @writel: write 32 bits 157 * @read_fifo: reads the fifo 158 * @write_fifo: writes to fifo 159 * @dma_init: platform specific dma init function 160 * @dma_exit: platform specific dma exit function 161 * @init: turns on clocks, sets up platform-specific registers, etc 162 * @exit: undoes @init 163 * @set_mode: forcefully changes operating mode 164 * @try_idle: tries to idle the IP 165 * @recover: platform-specific babble recovery 166 * @vbus_status: returns vbus status if possible 167 * @set_vbus: forces vbus status 168 * @adjust_channel_params: pre check for standard dma channel_program func 169 * @pre_root_reset_end: called before the root usb port reset flag gets cleared 170 * @post_root_reset_end: called after the root usb port reset flag gets cleared 171 * @phy_callback: optional callback function for the phy to call 172 */ 173 struct musb_platform_ops { 174 175 #define MUSB_G_NO_SKB_RESERVE BIT(9) 176 #define MUSB_DA8XX BIT(8) 177 #define MUSB_PRESERVE_SESSION BIT(7) 178 #define MUSB_DMA_UX500 BIT(6) 179 #define MUSB_DMA_CPPI41 BIT(5) 180 #define MUSB_DMA_CPPI BIT(4) 181 #define MUSB_DMA_TUSB_OMAP BIT(3) 182 #define MUSB_DMA_INVENTRA BIT(2) 183 #define MUSB_IN_TUSB BIT(1) 184 #define MUSB_INDEXED_EP BIT(0) 185 u32 quirks; 186 187 int (*init)(struct musb *musb); 188 int (*exit)(struct musb *musb); 189 190 void (*enable)(struct musb *musb); 191 void (*disable)(struct musb *musb); 192 193 u32 (*ep_offset)(u8 epnum, u16 offset); 194 void (*ep_select)(void __iomem *mbase, u8 epnum); 195 u16 fifo_mode; 196 u32 (*fifo_offset)(u8 epnum); 197 u32 (*busctl_offset)(u8 epnum, u16 offset); 198 u8 (*readb)(const void __iomem *addr, unsigned offset); 199 void (*writeb)(void __iomem *addr, unsigned offset, u8 data); 200 u16 (*readw)(const void __iomem *addr, unsigned offset); 201 void (*writew)(void __iomem *addr, unsigned offset, u16 data); 202 u32 (*readl)(const void __iomem *addr, unsigned offset); 203 void (*writel)(void __iomem *addr, unsigned offset, u32 data); 204 void (*read_fifo)(struct musb_hw_ep *hw_ep, u16 len, u8 *buf); 205 void (*write_fifo)(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf); 206 struct dma_controller * 207 (*dma_init) (struct musb *musb, void __iomem *base); 208 void (*dma_exit)(struct dma_controller *c); 209 int (*set_mode)(struct musb *musb, u8 mode); 210 void (*try_idle)(struct musb *musb, unsigned long timeout); 211 int (*recover)(struct musb *musb); 212 213 int (*vbus_status)(struct musb *musb); 214 void (*set_vbus)(struct musb *musb, int on); 215 216 int (*adjust_channel_params)(struct dma_channel *channel, 217 u16 packet_sz, u8 *mode, 218 dma_addr_t *dma_addr, u32 *len); 219 void (*pre_root_reset_end)(struct musb *musb); 220 void (*post_root_reset_end)(struct musb *musb); 221 int (*phy_callback)(enum musb_vbus_id_status status); 222 void (*clear_ep_rxintr)(struct musb *musb, int epnum); 223 }; 224 225 /* 226 * struct musb_hw_ep - endpoint hardware (bidirectional) 227 * 228 * Ordered slightly for better cacheline locality. 229 */ 230 struct musb_hw_ep { 231 struct musb *musb; 232 void __iomem *fifo; 233 void __iomem *regs; 234 235 #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010) 236 void __iomem *conf; 237 #endif 238 239 /* index in musb->endpoints[] */ 240 u8 epnum; 241 242 /* hardware configuration, possibly dynamic */ 243 bool is_shared_fifo; 244 bool tx_double_buffered; 245 bool rx_double_buffered; 246 u16 max_packet_sz_tx; 247 u16 max_packet_sz_rx; 248 249 struct dma_channel *tx_channel; 250 struct dma_channel *rx_channel; 251 252 #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010) 253 /* TUSB has "asynchronous" and "synchronous" dma modes */ 254 dma_addr_t fifo_async; 255 dma_addr_t fifo_sync; 256 void __iomem *fifo_sync_va; 257 #endif 258 259 /* currently scheduled peripheral endpoint */ 260 struct musb_qh *in_qh; 261 struct musb_qh *out_qh; 262 263 u8 rx_reinit; 264 u8 tx_reinit; 265 266 /* peripheral side */ 267 struct musb_ep ep_in; /* TX */ 268 struct musb_ep ep_out; /* RX */ 269 }; 270 271 static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep) 272 { 273 return next_request(&hw_ep->ep_in); 274 } 275 276 static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep) 277 { 278 return next_request(&hw_ep->ep_out); 279 } 280 281 struct musb_csr_regs { 282 /* FIFO registers */ 283 u16 txmaxp, txcsr, rxmaxp, rxcsr; 284 u16 rxfifoadd, txfifoadd; 285 u8 txtype, txinterval, rxtype, rxinterval; 286 u8 rxfifosz, txfifosz; 287 u8 txfunaddr, txhubaddr, txhubport; 288 u8 rxfunaddr, rxhubaddr, rxhubport; 289 }; 290 291 struct musb_context_registers { 292 293 u8 power; 294 u8 intrusbe; 295 u16 frame; 296 u8 index, testmode; 297 298 u8 devctl, busctl, misc; 299 u32 otg_interfsel; 300 301 struct musb_csr_regs index_regs[MUSB_C_NUM_EPS]; 302 }; 303 304 /* 305 * struct musb - Driver instance data. 306 */ 307 struct musb { 308 /* device lock */ 309 spinlock_t lock; 310 spinlock_t list_lock; /* resume work list lock */ 311 312 struct musb_io io; 313 const struct musb_platform_ops *ops; 314 struct musb_context_registers context; 315 316 irqreturn_t (*isr)(int, void *); 317 struct delayed_work irq_work; 318 struct delayed_work deassert_reset_work; 319 struct delayed_work finish_resume_work; 320 struct delayed_work gadget_work; 321 u16 hwvers; 322 323 u16 intrrxe; 324 u16 intrtxe; 325 /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */ 326 #define MUSB_PORT_STAT_RESUME (1 << 31) 327 328 u32 port1_status; 329 330 unsigned long rh_timer; 331 332 enum musb_h_ep0_state ep0_stage; 333 334 /* bulk traffic normally dedicates endpoint hardware, and each 335 * direction has its own ring of host side endpoints. 336 * we try to progress the transfer at the head of each endpoint's 337 * queue until it completes or NAKs too much; then we try the next 338 * endpoint. 339 */ 340 struct musb_hw_ep *bulk_ep; 341 342 struct list_head control; /* of musb_qh */ 343 struct list_head in_bulk; /* of musb_qh */ 344 struct list_head out_bulk; /* of musb_qh */ 345 struct list_head pending_list; /* pending work list */ 346 347 struct timer_list otg_timer; 348 struct notifier_block nb; 349 350 struct dma_controller *dma_controller; 351 352 struct device *controller; 353 void __iomem *ctrl_base; 354 void __iomem *mregs; 355 356 #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010) 357 dma_addr_t async; 358 dma_addr_t sync; 359 void __iomem *sync_va; 360 u8 tusb_revision; 361 #endif 362 363 /* passed down from chip/board specific irq handlers */ 364 u8 int_usb; 365 u16 int_rx; 366 u16 int_tx; 367 368 struct usb_phy *xceiv; 369 struct phy *phy; 370 371 int nIrq; 372 unsigned irq_wake:1; 373 374 struct musb_hw_ep endpoints[MUSB_C_NUM_EPS]; 375 #define control_ep endpoints 376 377 #define VBUSERR_RETRY_COUNT 3 378 u16 vbuserr_retry; 379 u16 epmask; 380 u8 nr_endpoints; 381 382 int (*board_set_power)(int state); 383 384 u8 min_power; /* vbus for periph, in mA/2 */ 385 386 int port_mode; /* MUSB_PORT_MODE_* */ 387 bool session; 388 unsigned long quirk_retries; 389 bool is_host; 390 391 int a_wait_bcon; /* VBUS timeout in msecs */ 392 unsigned long idle_timeout; /* Next timeout in jiffies */ 393 394 unsigned is_initialized:1; 395 unsigned is_runtime_suspended:1; 396 397 /* active means connected and not suspended */ 398 unsigned is_active:1; 399 400 unsigned is_multipoint:1; 401 402 unsigned hb_iso_rx:1; /* high bandwidth iso rx? */ 403 unsigned hb_iso_tx:1; /* high bandwidth iso tx? */ 404 unsigned dyn_fifo:1; /* dynamic FIFO supported? */ 405 406 unsigned bulk_split:1; 407 #define can_bulk_split(musb,type) \ 408 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split) 409 410 unsigned bulk_combine:1; 411 #define can_bulk_combine(musb,type) \ 412 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine) 413 414 /* is_suspended means USB B_PERIPHERAL suspend */ 415 unsigned is_suspended:1; 416 417 /* may_wakeup means remote wakeup is enabled */ 418 unsigned may_wakeup:1; 419 420 /* is_self_powered is reported in device status and the 421 * config descriptor. is_bus_powered means B_PERIPHERAL 422 * draws some VBUS current; both can be true. 423 */ 424 unsigned is_self_powered:1; 425 unsigned is_bus_powered:1; 426 427 unsigned set_address:1; 428 unsigned test_mode:1; 429 unsigned softconnect:1; 430 431 u8 address; 432 u8 test_mode_nr; 433 u16 ackpend; /* ep0 */ 434 enum musb_g_ep0_state ep0_state; 435 struct usb_gadget g; /* the gadget */ 436 struct usb_gadget_driver *gadget_driver; /* its driver */ 437 struct usb_hcd *hcd; /* the usb hcd */ 438 439 /* 440 * FIXME: Remove this flag. 441 * 442 * This is only added to allow Blackfin to work 443 * with current driver. For some unknown reason 444 * Blackfin doesn't work with double buffering 445 * and that's enabled by default. 446 * 447 * We added this flag to forcefully disable double 448 * buffering until we get it working. 449 */ 450 unsigned double_buffer_not_ok:1; 451 452 const struct musb_hdrc_config *config; 453 454 int xceiv_old_state; 455 #ifdef CONFIG_DEBUG_FS 456 struct dentry *debugfs_root; 457 #endif 458 }; 459 460 /* This must be included after struct musb is defined */ 461 #include "musb_regs.h" 462 463 static inline struct musb *gadget_to_musb(struct usb_gadget *g) 464 { 465 return container_of(g, struct musb, g); 466 } 467 468 static inline char *musb_ep_xfertype_string(u8 type) 469 { 470 char *s; 471 472 switch (type) { 473 case USB_ENDPOINT_XFER_CONTROL: 474 s = "ctrl"; 475 break; 476 case USB_ENDPOINT_XFER_ISOC: 477 s = "iso"; 478 break; 479 case USB_ENDPOINT_XFER_BULK: 480 s = "bulk"; 481 break; 482 case USB_ENDPOINT_XFER_INT: 483 s = "int"; 484 break; 485 default: 486 s = ""; 487 break; 488 } 489 return s; 490 } 491 492 #ifdef CONFIG_BLACKFIN 493 static inline int musb_read_fifosize(struct musb *musb, 494 struct musb_hw_ep *hw_ep, u8 epnum) 495 { 496 musb->nr_endpoints++; 497 musb->epmask |= (1 << epnum); 498 499 if (epnum < 5) { 500 hw_ep->max_packet_sz_tx = 128; 501 hw_ep->max_packet_sz_rx = 128; 502 } else { 503 hw_ep->max_packet_sz_tx = 1024; 504 hw_ep->max_packet_sz_rx = 1024; 505 } 506 hw_ep->is_shared_fifo = false; 507 508 return 0; 509 } 510 511 static inline void musb_configure_ep0(struct musb *musb) 512 { 513 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; 514 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; 515 musb->endpoints[0].is_shared_fifo = true; 516 } 517 518 #else 519 520 static inline int musb_read_fifosize(struct musb *musb, 521 struct musb_hw_ep *hw_ep, u8 epnum) 522 { 523 void __iomem *mbase = musb->mregs; 524 u8 reg = 0; 525 526 /* read from core using indexed model */ 527 reg = musb_readb(mbase, musb->io.ep_offset(epnum, MUSB_FIFOSIZE)); 528 /* 0's returned when no more endpoints */ 529 if (!reg) 530 return -ENODEV; 531 532 musb->nr_endpoints++; 533 musb->epmask |= (1 << epnum); 534 535 hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f); 536 537 /* shared TX/RX FIFO? */ 538 if ((reg & 0xf0) == 0xf0) { 539 hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx; 540 hw_ep->is_shared_fifo = true; 541 return 0; 542 } else { 543 hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4); 544 hw_ep->is_shared_fifo = false; 545 } 546 547 return 0; 548 } 549 550 static inline void musb_configure_ep0(struct musb *musb) 551 { 552 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; 553 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; 554 musb->endpoints[0].is_shared_fifo = true; 555 } 556 #endif /* CONFIG_BLACKFIN */ 557 558 559 /***************************** Glue it together *****************************/ 560 561 extern const char musb_driver_name[]; 562 563 extern void musb_stop(struct musb *musb); 564 extern void musb_start(struct musb *musb); 565 566 extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src); 567 extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst); 568 569 extern void musb_load_testpacket(struct musb *); 570 571 extern irqreturn_t musb_interrupt(struct musb *); 572 573 extern void musb_hnp_stop(struct musb *musb); 574 575 int musb_queue_resume_work(struct musb *musb, 576 int (*callback)(struct musb *musb, void *data), 577 void *data); 578 579 static inline void musb_platform_set_vbus(struct musb *musb, int is_on) 580 { 581 if (musb->ops->set_vbus) 582 musb->ops->set_vbus(musb, is_on); 583 } 584 585 static inline void musb_platform_enable(struct musb *musb) 586 { 587 if (musb->ops->enable) 588 musb->ops->enable(musb); 589 } 590 591 static inline void musb_platform_disable(struct musb *musb) 592 { 593 if (musb->ops->disable) 594 musb->ops->disable(musb); 595 } 596 597 static inline int musb_platform_set_mode(struct musb *musb, u8 mode) 598 { 599 if (!musb->ops->set_mode) 600 return 0; 601 602 return musb->ops->set_mode(musb, mode); 603 } 604 605 static inline void musb_platform_try_idle(struct musb *musb, 606 unsigned long timeout) 607 { 608 if (musb->ops->try_idle) 609 musb->ops->try_idle(musb, timeout); 610 } 611 612 static inline int musb_platform_recover(struct musb *musb) 613 { 614 if (!musb->ops->recover) 615 return 0; 616 617 return musb->ops->recover(musb); 618 } 619 620 static inline int musb_platform_get_vbus_status(struct musb *musb) 621 { 622 if (!musb->ops->vbus_status) 623 return -EINVAL; 624 625 return musb->ops->vbus_status(musb); 626 } 627 628 static inline int musb_platform_init(struct musb *musb) 629 { 630 if (!musb->ops->init) 631 return -EINVAL; 632 633 return musb->ops->init(musb); 634 } 635 636 static inline int musb_platform_exit(struct musb *musb) 637 { 638 if (!musb->ops->exit) 639 return -EINVAL; 640 641 return musb->ops->exit(musb); 642 } 643 644 static inline void musb_platform_pre_root_reset_end(struct musb *musb) 645 { 646 if (musb->ops->pre_root_reset_end) 647 musb->ops->pre_root_reset_end(musb); 648 } 649 650 static inline void musb_platform_post_root_reset_end(struct musb *musb) 651 { 652 if (musb->ops->post_root_reset_end) 653 musb->ops->post_root_reset_end(musb); 654 } 655 656 static inline void musb_platform_clear_ep_rxintr(struct musb *musb, int epnum) 657 { 658 if (musb->ops->clear_ep_rxintr) 659 musb->ops->clear_ep_rxintr(musb, epnum); 660 } 661 662 /* 663 * gets the "dr_mode" property from DT and converts it into musb_mode 664 * if the property is not found or not recognized returns MUSB_OTG 665 */ 666 extern enum musb_mode musb_get_mode(struct device *dev); 667 668 #endif /* __MUSB_CORE_H__ */ 669