1 /* 2 * MUSB OTG driver defines 3 * 4 * Copyright 2005 Mentor Graphics Corporation 5 * Copyright (C) 2005-2006 by Texas Instruments 6 * Copyright (C) 2006-2007 Nokia Corporation 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * version 2 as published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, but 13 * WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 20 * 02110-1301 USA 21 * 22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED 23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 */ 34 35 #ifndef __MUSB_CORE_H__ 36 #define __MUSB_CORE_H__ 37 38 #include <linux/slab.h> 39 #include <linux/list.h> 40 #include <linux/interrupt.h> 41 #include <linux/errno.h> 42 #include <linux/timer.h> 43 #include <linux/clk.h> 44 #include <linux/device.h> 45 #include <linux/usb/ch9.h> 46 #include <linux/usb/gadget.h> 47 #include <linux/usb.h> 48 #include <linux/usb/otg.h> 49 #include <linux/usb/musb.h> 50 51 struct musb; 52 struct musb_hw_ep; 53 struct musb_ep; 54 55 /* Helper defines for struct musb->hwvers */ 56 #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f) 57 #define MUSB_HWVERS_MINOR(x) (x & 0x3ff) 58 #define MUSB_HWVERS_RC 0x8000 59 #define MUSB_HWVERS_1300 0x52C 60 #define MUSB_HWVERS_1400 0x590 61 #define MUSB_HWVERS_1800 0x720 62 #define MUSB_HWVERS_1900 0x784 63 #define MUSB_HWVERS_2000 0x800 64 65 #include "musb_debug.h" 66 #include "musb_dma.h" 67 68 #include "musb_io.h" 69 #include "musb_regs.h" 70 71 #include "musb_gadget.h" 72 #include <linux/usb/hcd.h> 73 #include "musb_host.h" 74 75 76 77 #ifdef CONFIG_USB_MUSB_OTG 78 79 #define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST) 80 #define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL) 81 #define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG) 82 83 /* NOTE: otg and peripheral-only state machines start at B_IDLE. 84 * OTG or host-only go to A_IDLE when ID is sensed. 85 */ 86 #define is_peripheral_active(m) (!(m)->is_host) 87 #define is_host_active(m) ((m)->is_host) 88 89 #else 90 #define is_peripheral_enabled(musb) is_peripheral_capable() 91 #define is_host_enabled(musb) is_host_capable() 92 #define is_otg_enabled(musb) 0 93 94 #define is_peripheral_active(musb) is_peripheral_capable() 95 #define is_host_active(musb) is_host_capable() 96 #endif 97 98 #if defined(CONFIG_USB_MUSB_OTG) || defined(CONFIG_USB_MUSB_PERIPHERAL) 99 /* for some reason, the "select USB_GADGET_MUSB_HDRC" doesn't always 100 * override that choice selection (often USB_GADGET_DUMMY_HCD). 101 */ 102 #ifndef CONFIG_USB_GADGET_MUSB_HDRC 103 #error bogus Kconfig output ... select CONFIG_USB_GADGET_MUSB_HDRC 104 #endif 105 #endif /* need MUSB gadget selection */ 106 107 #ifndef CONFIG_HAVE_CLK 108 /* Dummy stub for clk framework */ 109 #define clk_get(dev, id) NULL 110 #define clk_put(clock) do {} while (0) 111 #define clk_enable(clock) do {} while (0) 112 #define clk_disable(clock) do {} while (0) 113 #endif 114 115 #ifdef CONFIG_PROC_FS 116 #include <linux/fs.h> 117 #define MUSB_CONFIG_PROC_FS 118 #endif 119 120 /****************************** PERIPHERAL ROLE *****************************/ 121 122 #ifdef CONFIG_USB_GADGET_MUSB_HDRC 123 124 #define is_peripheral_capable() (1) 125 126 extern irqreturn_t musb_g_ep0_irq(struct musb *); 127 extern void musb_g_tx(struct musb *, u8); 128 extern void musb_g_rx(struct musb *, u8); 129 extern void musb_g_reset(struct musb *); 130 extern void musb_g_suspend(struct musb *); 131 extern void musb_g_resume(struct musb *); 132 extern void musb_g_wakeup(struct musb *); 133 extern void musb_g_disconnect(struct musb *); 134 135 #else 136 137 #define is_peripheral_capable() (0) 138 139 static inline irqreturn_t musb_g_ep0_irq(struct musb *m) { return IRQ_NONE; } 140 static inline void musb_g_reset(struct musb *m) {} 141 static inline void musb_g_suspend(struct musb *m) {} 142 static inline void musb_g_resume(struct musb *m) {} 143 static inline void musb_g_wakeup(struct musb *m) {} 144 static inline void musb_g_disconnect(struct musb *m) {} 145 146 #endif 147 148 /****************************** HOST ROLE ***********************************/ 149 150 #ifdef CONFIG_USB_MUSB_HDRC_HCD 151 152 #define is_host_capable() (1) 153 154 extern irqreturn_t musb_h_ep0_irq(struct musb *); 155 extern void musb_host_tx(struct musb *, u8); 156 extern void musb_host_rx(struct musb *, u8); 157 158 #else 159 160 #define is_host_capable() (0) 161 162 static inline irqreturn_t musb_h_ep0_irq(struct musb *m) { return IRQ_NONE; } 163 static inline void musb_host_tx(struct musb *m, u8 e) {} 164 static inline void musb_host_rx(struct musb *m, u8 e) {} 165 166 #endif 167 168 169 /****************************** CONSTANTS ********************************/ 170 171 #ifndef MUSB_C_NUM_EPS 172 #define MUSB_C_NUM_EPS ((u8)16) 173 #endif 174 175 #ifndef MUSB_MAX_END0_PACKET 176 #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE) 177 #endif 178 179 /* host side ep0 states */ 180 enum musb_h_ep0_state { 181 MUSB_EP0_IDLE, 182 MUSB_EP0_START, /* expect ack of setup */ 183 MUSB_EP0_IN, /* expect IN DATA */ 184 MUSB_EP0_OUT, /* expect ack of OUT DATA */ 185 MUSB_EP0_STATUS, /* expect ack of STATUS */ 186 } __attribute__ ((packed)); 187 188 /* peripheral side ep0 states */ 189 enum musb_g_ep0_state { 190 MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */ 191 MUSB_EP0_STAGE_SETUP, /* received SETUP */ 192 MUSB_EP0_STAGE_TX, /* IN data */ 193 MUSB_EP0_STAGE_RX, /* OUT data */ 194 MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */ 195 MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */ 196 MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */ 197 } __attribute__ ((packed)); 198 199 /* 200 * OTG protocol constants. See USB OTG 1.3 spec, 201 * sections 5.5 "Device Timings" and 6.6.5 "Timers". 202 */ 203 #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */ 204 #define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */ 205 #define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */ 206 #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */ 207 208 209 /*************************** REGISTER ACCESS ********************************/ 210 211 /* Endpoint registers (other than dynfifo setup) can be accessed either 212 * directly with the "flat" model, or after setting up an index register. 213 */ 214 215 #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \ 216 || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \ 217 || defined(CONFIG_ARCH_OMAP4) 218 /* REVISIT indexed access seemed to 219 * misbehave (on DaVinci) for at least peripheral IN ... 220 */ 221 #define MUSB_FLAT_REG 222 #endif 223 224 /* TUSB mapping: "flat" plus ep0 special cases */ 225 #if defined(CONFIG_USB_MUSB_TUSB6010) 226 #define musb_ep_select(_mbase, _epnum) \ 227 musb_writeb((_mbase), MUSB_INDEX, (_epnum)) 228 #define MUSB_EP_OFFSET MUSB_TUSB_OFFSET 229 230 /* "flat" mapping: each endpoint has its own i/o address */ 231 #elif defined(MUSB_FLAT_REG) 232 #define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum))) 233 #define MUSB_EP_OFFSET MUSB_FLAT_OFFSET 234 235 /* "indexed" mapping: INDEX register controls register bank select */ 236 #else 237 #define musb_ep_select(_mbase, _epnum) \ 238 musb_writeb((_mbase), MUSB_INDEX, (_epnum)) 239 #define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET 240 #endif 241 242 /****************************** FUNCTIONS ********************************/ 243 244 #define MUSB_HST_MODE(_musb)\ 245 { (_musb)->is_host = true; } 246 #define MUSB_DEV_MODE(_musb) \ 247 { (_musb)->is_host = false; } 248 249 #define test_devctl_hst_mode(_x) \ 250 (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM) 251 252 #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral") 253 254 /******************************** TYPES *************************************/ 255 256 /** 257 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer 258 * @init: turns on clocks, sets up platform-specific registers, etc 259 * @exit: undoes @init 260 * @set_mode: forcefully changes operating mode 261 * @try_ilde: tries to idle the IP 262 * @vbus_status: returns vbus status if possible 263 * @set_vbus: forces vbus status 264 */ 265 struct musb_platform_ops { 266 int (*init)(struct musb *musb); 267 int (*exit)(struct musb *musb); 268 269 void (*enable)(struct musb *musb); 270 void (*disable)(struct musb *musb); 271 272 int (*set_mode)(struct musb *musb, u8 mode); 273 void (*try_idle)(struct musb *musb, unsigned long timeout); 274 275 int (*vbus_status)(struct musb *musb); 276 void (*set_vbus)(struct musb *musb, int on); 277 }; 278 279 /* 280 * struct musb_hw_ep - endpoint hardware (bidirectional) 281 * 282 * Ordered slightly for better cacheline locality. 283 */ 284 struct musb_hw_ep { 285 struct musb *musb; 286 void __iomem *fifo; 287 void __iomem *regs; 288 289 #ifdef CONFIG_USB_MUSB_TUSB6010 290 void __iomem *conf; 291 #endif 292 293 /* index in musb->endpoints[] */ 294 u8 epnum; 295 296 /* hardware configuration, possibly dynamic */ 297 bool is_shared_fifo; 298 bool tx_double_buffered; 299 bool rx_double_buffered; 300 u16 max_packet_sz_tx; 301 u16 max_packet_sz_rx; 302 303 struct dma_channel *tx_channel; 304 struct dma_channel *rx_channel; 305 306 #ifdef CONFIG_USB_MUSB_TUSB6010 307 /* TUSB has "asynchronous" and "synchronous" dma modes */ 308 dma_addr_t fifo_async; 309 dma_addr_t fifo_sync; 310 void __iomem *fifo_sync_va; 311 #endif 312 313 #ifdef CONFIG_USB_MUSB_HDRC_HCD 314 void __iomem *target_regs; 315 316 /* currently scheduled peripheral endpoint */ 317 struct musb_qh *in_qh; 318 struct musb_qh *out_qh; 319 320 u8 rx_reinit; 321 u8 tx_reinit; 322 #endif 323 324 #ifdef CONFIG_USB_GADGET_MUSB_HDRC 325 /* peripheral side */ 326 struct musb_ep ep_in; /* TX */ 327 struct musb_ep ep_out; /* RX */ 328 #endif 329 }; 330 331 static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep) 332 { 333 #ifdef CONFIG_USB_GADGET_MUSB_HDRC 334 return next_request(&hw_ep->ep_in); 335 #else 336 return NULL; 337 #endif 338 } 339 340 static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep) 341 { 342 #ifdef CONFIG_USB_GADGET_MUSB_HDRC 343 return next_request(&hw_ep->ep_out); 344 #else 345 return NULL; 346 #endif 347 } 348 349 struct musb_csr_regs { 350 /* FIFO registers */ 351 u16 txmaxp, txcsr, rxmaxp, rxcsr; 352 u16 rxfifoadd, txfifoadd; 353 u8 txtype, txinterval, rxtype, rxinterval; 354 u8 rxfifosz, txfifosz; 355 u8 txfunaddr, txhubaddr, txhubport; 356 u8 rxfunaddr, rxhubaddr, rxhubport; 357 }; 358 359 struct musb_context_registers { 360 361 u8 power; 362 u16 intrtxe, intrrxe; 363 u8 intrusbe; 364 u16 frame; 365 u8 index, testmode; 366 367 u8 devctl, busctl, misc; 368 369 struct musb_csr_regs index_regs[MUSB_C_NUM_EPS]; 370 }; 371 372 /* 373 * struct musb - Driver instance data. 374 */ 375 struct musb { 376 /* device lock */ 377 spinlock_t lock; 378 379 const struct musb_platform_ops *ops; 380 struct musb_context_registers context; 381 382 irqreturn_t (*isr)(int, void *); 383 struct work_struct irq_work; 384 u16 hwvers; 385 386 /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */ 387 #define MUSB_PORT_STAT_RESUME (1 << 31) 388 389 u32 port1_status; 390 391 #ifdef CONFIG_USB_MUSB_HDRC_HCD 392 unsigned long rh_timer; 393 394 enum musb_h_ep0_state ep0_stage; 395 396 /* bulk traffic normally dedicates endpoint hardware, and each 397 * direction has its own ring of host side endpoints. 398 * we try to progress the transfer at the head of each endpoint's 399 * queue until it completes or NAKs too much; then we try the next 400 * endpoint. 401 */ 402 struct musb_hw_ep *bulk_ep; 403 404 struct list_head control; /* of musb_qh */ 405 struct list_head in_bulk; /* of musb_qh */ 406 struct list_head out_bulk; /* of musb_qh */ 407 408 struct timer_list otg_timer; 409 #endif 410 struct notifier_block nb; 411 412 struct dma_controller *dma_controller; 413 414 struct device *controller; 415 void __iomem *ctrl_base; 416 void __iomem *mregs; 417 418 #ifdef CONFIG_USB_MUSB_TUSB6010 419 dma_addr_t async; 420 dma_addr_t sync; 421 void __iomem *sync_va; 422 #endif 423 424 /* passed down from chip/board specific irq handlers */ 425 u8 int_usb; 426 u16 int_rx; 427 u16 int_tx; 428 429 struct otg_transceiver *xceiv; 430 431 int nIrq; 432 unsigned irq_wake:1; 433 434 struct musb_hw_ep endpoints[MUSB_C_NUM_EPS]; 435 #define control_ep endpoints 436 437 #define VBUSERR_RETRY_COUNT 3 438 u16 vbuserr_retry; 439 u16 epmask; 440 u8 nr_endpoints; 441 442 u8 board_mode; /* enum musb_mode */ 443 int (*board_set_power)(int state); 444 445 u8 min_power; /* vbus for periph, in mA/2 */ 446 447 bool is_host; 448 449 int a_wait_bcon; /* VBUS timeout in msecs */ 450 unsigned long idle_timeout; /* Next timeout in jiffies */ 451 452 /* active means connected and not suspended */ 453 unsigned is_active:1; 454 455 unsigned is_multipoint:1; 456 unsigned ignore_disconnect:1; /* during bus resets */ 457 458 unsigned hb_iso_rx:1; /* high bandwidth iso rx? */ 459 unsigned hb_iso_tx:1; /* high bandwidth iso tx? */ 460 unsigned dyn_fifo:1; /* dynamic FIFO supported? */ 461 462 unsigned bulk_split:1; 463 #define can_bulk_split(musb,type) \ 464 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split) 465 466 unsigned bulk_combine:1; 467 #define can_bulk_combine(musb,type) \ 468 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine) 469 470 #ifdef CONFIG_USB_GADGET_MUSB_HDRC 471 /* is_suspended means USB B_PERIPHERAL suspend */ 472 unsigned is_suspended:1; 473 474 /* may_wakeup means remote wakeup is enabled */ 475 unsigned may_wakeup:1; 476 477 /* is_self_powered is reported in device status and the 478 * config descriptor. is_bus_powered means B_PERIPHERAL 479 * draws some VBUS current; both can be true. 480 */ 481 unsigned is_self_powered:1; 482 unsigned is_bus_powered:1; 483 484 unsigned set_address:1; 485 unsigned test_mode:1; 486 unsigned softconnect:1; 487 488 u8 address; 489 u8 test_mode_nr; 490 u16 ackpend; /* ep0 */ 491 enum musb_g_ep0_state ep0_state; 492 struct usb_gadget g; /* the gadget */ 493 struct usb_gadget_driver *gadget_driver; /* its driver */ 494 #endif 495 496 /* 497 * FIXME: Remove this flag. 498 * 499 * This is only added to allow Blackfin to work 500 * with current driver. For some unknown reason 501 * Blackfin doesn't work with double buffering 502 * and that's enabled by default. 503 * 504 * We added this flag to forcefully disable double 505 * buffering until we get it working. 506 */ 507 unsigned double_buffer_not_ok:1 __deprecated; 508 509 struct musb_hdrc_config *config; 510 511 #ifdef MUSB_CONFIG_PROC_FS 512 struct proc_dir_entry *proc_entry; 513 #endif 514 }; 515 516 #ifdef CONFIG_USB_GADGET_MUSB_HDRC 517 static inline struct musb *gadget_to_musb(struct usb_gadget *g) 518 { 519 return container_of(g, struct musb, g); 520 } 521 #endif 522 523 #ifdef CONFIG_BLACKFIN 524 static inline int musb_read_fifosize(struct musb *musb, 525 struct musb_hw_ep *hw_ep, u8 epnum) 526 { 527 musb->nr_endpoints++; 528 musb->epmask |= (1 << epnum); 529 530 if (epnum < 5) { 531 hw_ep->max_packet_sz_tx = 128; 532 hw_ep->max_packet_sz_rx = 128; 533 } else { 534 hw_ep->max_packet_sz_tx = 1024; 535 hw_ep->max_packet_sz_rx = 1024; 536 } 537 hw_ep->is_shared_fifo = false; 538 539 return 0; 540 } 541 542 static inline void musb_configure_ep0(struct musb *musb) 543 { 544 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; 545 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; 546 musb->endpoints[0].is_shared_fifo = true; 547 } 548 549 #else 550 551 static inline int musb_read_fifosize(struct musb *musb, 552 struct musb_hw_ep *hw_ep, u8 epnum) 553 { 554 void *mbase = musb->mregs; 555 u8 reg = 0; 556 557 /* read from core using indexed model */ 558 reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE)); 559 /* 0's returned when no more endpoints */ 560 if (!reg) 561 return -ENODEV; 562 563 musb->nr_endpoints++; 564 musb->epmask |= (1 << epnum); 565 566 hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f); 567 568 /* shared TX/RX FIFO? */ 569 if ((reg & 0xf0) == 0xf0) { 570 hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx; 571 hw_ep->is_shared_fifo = true; 572 return 0; 573 } else { 574 hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4); 575 hw_ep->is_shared_fifo = false; 576 } 577 578 return 0; 579 } 580 581 static inline void musb_configure_ep0(struct musb *musb) 582 { 583 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; 584 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; 585 musb->endpoints[0].is_shared_fifo = true; 586 } 587 #endif /* CONFIG_BLACKFIN */ 588 589 590 /***************************** Glue it together *****************************/ 591 592 extern const char musb_driver_name[]; 593 594 extern void musb_start(struct musb *musb); 595 extern void musb_stop(struct musb *musb); 596 597 extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src); 598 extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst); 599 600 extern void musb_load_testpacket(struct musb *); 601 602 extern irqreturn_t musb_interrupt(struct musb *); 603 604 extern void musb_hnp_stop(struct musb *musb); 605 606 static inline void musb_platform_set_vbus(struct musb *musb, int is_on) 607 { 608 if (musb->ops->set_vbus) 609 musb->ops->set_vbus(musb, is_on); 610 } 611 612 static inline void musb_platform_enable(struct musb *musb) 613 { 614 if (musb->ops->enable) 615 musb->ops->enable(musb); 616 } 617 618 static inline void musb_platform_disable(struct musb *musb) 619 { 620 if (musb->ops->disable) 621 musb->ops->disable(musb); 622 } 623 624 static inline int musb_platform_set_mode(struct musb *musb, u8 mode) 625 { 626 if (!musb->ops->set_mode) 627 return 0; 628 629 return musb->ops->set_mode(musb, mode); 630 } 631 632 static inline void musb_platform_try_idle(struct musb *musb, 633 unsigned long timeout) 634 { 635 if (musb->ops->try_idle) 636 musb->ops->try_idle(musb, timeout); 637 } 638 639 static inline int musb_platform_get_vbus_status(struct musb *musb) 640 { 641 if (!musb->ops->vbus_status) 642 return 0; 643 644 return musb->ops->vbus_status(musb); 645 } 646 647 static inline int musb_platform_init(struct musb *musb) 648 { 649 if (!musb->ops->init) 650 return -EINVAL; 651 652 return musb->ops->init(musb); 653 } 654 655 static inline int musb_platform_exit(struct musb *musb) 656 { 657 if (!musb->ops->exit) 658 return -EINVAL; 659 660 return musb->ops->exit(musb); 661 } 662 663 #endif /* __MUSB_CORE_H__ */ 664