xref: /openbmc/linux/drivers/usb/musb/musb_core.h (revision 4ed91d48259d9ddd378424d008f2e6559f7e78f8)
1 /*
2  * MUSB OTG driver defines
3  *
4  * Copyright 2005 Mentor Graphics Corporation
5  * Copyright (C) 2005-2006 by Texas Instruments
6  * Copyright (C) 2006-2007 Nokia Corporation
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * version 2 as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but
13  * WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20  * 02110-1301 USA
21  *
22  * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
23  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
25  * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
29  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  *
33  */
34 
35 #ifndef __MUSB_CORE_H__
36 #define __MUSB_CORE_H__
37 
38 #include <linux/slab.h>
39 #include <linux/list.h>
40 #include <linux/interrupt.h>
41 #include <linux/errno.h>
42 #include <linux/timer.h>
43 #include <linux/device.h>
44 #include <linux/usb/ch9.h>
45 #include <linux/usb/gadget.h>
46 #include <linux/usb.h>
47 #include <linux/usb/otg.h>
48 #include <linux/usb/musb.h>
49 #include <linux/phy/phy.h>
50 #include <linux/workqueue.h>
51 
52 struct musb;
53 struct musb_hw_ep;
54 struct musb_ep;
55 
56 /* Helper defines for struct musb->hwvers */
57 #define MUSB_HWVERS_MAJOR(x)	((x >> 10) & 0x1f)
58 #define MUSB_HWVERS_MINOR(x)	(x & 0x3ff)
59 #define MUSB_HWVERS_RC		0x8000
60 #define MUSB_HWVERS_1300	0x52C
61 #define MUSB_HWVERS_1400	0x590
62 #define MUSB_HWVERS_1800	0x720
63 #define MUSB_HWVERS_1900	0x784
64 #define MUSB_HWVERS_2000	0x800
65 
66 #include "musb_debug.h"
67 #include "musb_dma.h"
68 
69 #include "musb_io.h"
70 
71 #include "musb_gadget.h"
72 #include <linux/usb/hcd.h>
73 #include "musb_host.h"
74 
75 /* NOTE:  otg and peripheral-only state machines start at B_IDLE.
76  * OTG or host-only go to A_IDLE when ID is sensed.
77  */
78 #define is_peripheral_active(m)		(!(m)->is_host)
79 #define is_host_active(m)		((m)->is_host)
80 
81 enum {
82 	MUSB_PORT_MODE_HOST	= 1,
83 	MUSB_PORT_MODE_GADGET,
84 	MUSB_PORT_MODE_DUAL_ROLE,
85 };
86 
87 /****************************** CONSTANTS ********************************/
88 
89 #ifndef MUSB_C_NUM_EPS
90 #define MUSB_C_NUM_EPS ((u8)16)
91 #endif
92 
93 #ifndef MUSB_MAX_END0_PACKET
94 #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
95 #endif
96 
97 /* host side ep0 states */
98 enum musb_h_ep0_state {
99 	MUSB_EP0_IDLE,
100 	MUSB_EP0_START,			/* expect ack of setup */
101 	MUSB_EP0_IN,			/* expect IN DATA */
102 	MUSB_EP0_OUT,			/* expect ack of OUT DATA */
103 	MUSB_EP0_STATUS,		/* expect ack of STATUS */
104 } __attribute__ ((packed));
105 
106 /* peripheral side ep0 states */
107 enum musb_g_ep0_state {
108 	MUSB_EP0_STAGE_IDLE,		/* idle, waiting for SETUP */
109 	MUSB_EP0_STAGE_SETUP,		/* received SETUP */
110 	MUSB_EP0_STAGE_TX,		/* IN data */
111 	MUSB_EP0_STAGE_RX,		/* OUT data */
112 	MUSB_EP0_STAGE_STATUSIN,	/* (after OUT data) */
113 	MUSB_EP0_STAGE_STATUSOUT,	/* (after IN data) */
114 	MUSB_EP0_STAGE_ACKWAIT,		/* after zlp, before statusin */
115 } __attribute__ ((packed));
116 
117 /*
118  * OTG protocol constants.  See USB OTG 1.3 spec,
119  * sections 5.5 "Device Timings" and 6.6.5 "Timers".
120  */
121 #define OTG_TIME_A_WAIT_VRISE	100		/* msec (max) */
122 #define OTG_TIME_A_WAIT_BCON	1100		/* min 1 second */
123 #define OTG_TIME_A_AIDL_BDIS	200		/* min 200 msec */
124 #define OTG_TIME_B_ASE0_BRST	100		/* min 3.125 ms */
125 
126 /****************************** FUNCTIONS ********************************/
127 
128 #define MUSB_HST_MODE(_musb)\
129 	{ (_musb)->is_host = true; }
130 #define MUSB_DEV_MODE(_musb) \
131 	{ (_musb)->is_host = false; }
132 
133 #define test_devctl_hst_mode(_x) \
134 	(musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
135 
136 #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
137 
138 /******************************** TYPES *************************************/
139 
140 struct musb_io;
141 
142 /**
143  * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
144  * @quirks:	flags for platform specific quirks
145  * @enable:	enable device
146  * @disable:	disable device
147  * @ep_offset:	returns the end point offset
148  * @ep_select:	selects the specified end point
149  * @fifo_mode:	sets the fifo mode
150  * @fifo_offset: returns the fifo offset
151  * @readb:	read 8 bits
152  * @writeb:	write 8 bits
153  * @readw:	read 16 bits
154  * @writew:	write 16 bits
155  * @readl:	read 32 bits
156  * @writel:	write 32 bits
157  * @read_fifo:	reads the fifo
158  * @write_fifo:	writes to fifo
159  * @dma_init:	platform specific dma init function
160  * @dma_exit:	platform specific dma exit function
161  * @init:	turns on clocks, sets up platform-specific registers, etc
162  * @exit:	undoes @init
163  * @set_mode:	forcefully changes operating mode
164  * @try_idle:	tries to idle the IP
165  * @recover:	platform-specific babble recovery
166  * @vbus_status: returns vbus status if possible
167  * @set_vbus:	forces vbus status
168  * @adjust_channel_params: pre check for standard dma channel_program func
169  * @pre_root_reset_end: called before the root usb port reset flag gets cleared
170  * @post_root_reset_end: called after the root usb port reset flag gets cleared
171  * @phy_callback: optional callback function for the phy to call
172  */
173 struct musb_platform_ops {
174 
175 #define MUSB_PRESERVE_SESSION	BIT(7)
176 #define MUSB_DMA_UX500		BIT(6)
177 #define MUSB_DMA_CPPI41		BIT(5)
178 #define MUSB_DMA_CPPI		BIT(4)
179 #define MUSB_DMA_TUSB_OMAP	BIT(3)
180 #define MUSB_DMA_INVENTRA	BIT(2)
181 #define MUSB_IN_TUSB		BIT(1)
182 #define MUSB_INDEXED_EP		BIT(0)
183 	u32	quirks;
184 
185 	int	(*init)(struct musb *musb);
186 	int	(*exit)(struct musb *musb);
187 
188 	void	(*enable)(struct musb *musb);
189 	void	(*disable)(struct musb *musb);
190 
191 	u32	(*ep_offset)(u8 epnum, u16 offset);
192 	void	(*ep_select)(void __iomem *mbase, u8 epnum);
193 	u16	fifo_mode;
194 	u32	(*fifo_offset)(u8 epnum);
195 	u32	(*busctl_offset)(u8 epnum, u16 offset);
196 	u8	(*readb)(const void __iomem *addr, unsigned offset);
197 	void	(*writeb)(void __iomem *addr, unsigned offset, u8 data);
198 	u16	(*readw)(const void __iomem *addr, unsigned offset);
199 	void	(*writew)(void __iomem *addr, unsigned offset, u16 data);
200 	u32	(*readl)(const void __iomem *addr, unsigned offset);
201 	void	(*writel)(void __iomem *addr, unsigned offset, u32 data);
202 	void	(*read_fifo)(struct musb_hw_ep *hw_ep, u16 len, u8 *buf);
203 	void	(*write_fifo)(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf);
204 	struct dma_controller *
205 		(*dma_init) (struct musb *musb, void __iomem *base);
206 	void	(*dma_exit)(struct dma_controller *c);
207 	int	(*set_mode)(struct musb *musb, u8 mode);
208 	void	(*try_idle)(struct musb *musb, unsigned long timeout);
209 	int	(*recover)(struct musb *musb);
210 
211 	int	(*vbus_status)(struct musb *musb);
212 	void	(*set_vbus)(struct musb *musb, int on);
213 
214 	int	(*adjust_channel_params)(struct dma_channel *channel,
215 				u16 packet_sz, u8 *mode,
216 				dma_addr_t *dma_addr, u32 *len);
217 	void	(*pre_root_reset_end)(struct musb *musb);
218 	void	(*post_root_reset_end)(struct musb *musb);
219 	int	(*phy_callback)(enum musb_vbus_id_status status);
220 	void	(*clear_ep_rxintr)(struct musb *musb, int epnum);
221 };
222 
223 /*
224  * struct musb_hw_ep - endpoint hardware (bidirectional)
225  *
226  * Ordered slightly for better cacheline locality.
227  */
228 struct musb_hw_ep {
229 	struct musb		*musb;
230 	void __iomem		*fifo;
231 	void __iomem		*regs;
232 
233 #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
234 	void __iomem		*conf;
235 #endif
236 
237 	/* index in musb->endpoints[]  */
238 	u8			epnum;
239 
240 	/* hardware configuration, possibly dynamic */
241 	bool			is_shared_fifo;
242 	bool			tx_double_buffered;
243 	bool			rx_double_buffered;
244 	u16			max_packet_sz_tx;
245 	u16			max_packet_sz_rx;
246 
247 	struct dma_channel	*tx_channel;
248 	struct dma_channel	*rx_channel;
249 
250 #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
251 	/* TUSB has "asynchronous" and "synchronous" dma modes */
252 	dma_addr_t		fifo_async;
253 	dma_addr_t		fifo_sync;
254 	void __iomem		*fifo_sync_va;
255 #endif
256 
257 	/* currently scheduled peripheral endpoint */
258 	struct musb_qh		*in_qh;
259 	struct musb_qh		*out_qh;
260 
261 	u8			rx_reinit;
262 	u8			tx_reinit;
263 
264 	/* peripheral side */
265 	struct musb_ep		ep_in;			/* TX */
266 	struct musb_ep		ep_out;			/* RX */
267 };
268 
269 static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
270 {
271 	return next_request(&hw_ep->ep_in);
272 }
273 
274 static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
275 {
276 	return next_request(&hw_ep->ep_out);
277 }
278 
279 struct musb_csr_regs {
280 	/* FIFO registers */
281 	u16 txmaxp, txcsr, rxmaxp, rxcsr;
282 	u16 rxfifoadd, txfifoadd;
283 	u8 txtype, txinterval, rxtype, rxinterval;
284 	u8 rxfifosz, txfifosz;
285 	u8 txfunaddr, txhubaddr, txhubport;
286 	u8 rxfunaddr, rxhubaddr, rxhubport;
287 };
288 
289 struct musb_context_registers {
290 
291 	u8 power;
292 	u8 intrusbe;
293 	u16 frame;
294 	u8 index, testmode;
295 
296 	u8 devctl, busctl, misc;
297 	u32 otg_interfsel;
298 
299 	struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
300 };
301 
302 /*
303  * struct musb - Driver instance data.
304  */
305 struct musb {
306 	/* device lock */
307 	spinlock_t		lock;
308 	spinlock_t		list_lock;	/* resume work list lock */
309 
310 	struct musb_io		io;
311 	const struct musb_platform_ops *ops;
312 	struct musb_context_registers context;
313 
314 	irqreturn_t		(*isr)(int, void *);
315 	struct delayed_work	irq_work;
316 	struct delayed_work	deassert_reset_work;
317 	struct delayed_work	finish_resume_work;
318 	struct delayed_work	gadget_work;
319 	u16			hwvers;
320 
321 	u16			intrrxe;
322 	u16			intrtxe;
323 /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
324 #define MUSB_PORT_STAT_RESUME	(1 << 31)
325 
326 	u32			port1_status;
327 
328 	unsigned long		rh_timer;
329 
330 	enum musb_h_ep0_state	ep0_stage;
331 
332 	/* bulk traffic normally dedicates endpoint hardware, and each
333 	 * direction has its own ring of host side endpoints.
334 	 * we try to progress the transfer at the head of each endpoint's
335 	 * queue until it completes or NAKs too much; then we try the next
336 	 * endpoint.
337 	 */
338 	struct musb_hw_ep	*bulk_ep;
339 
340 	struct list_head	control;	/* of musb_qh */
341 	struct list_head	in_bulk;	/* of musb_qh */
342 	struct list_head	out_bulk;	/* of musb_qh */
343 	struct list_head	pending_list;	/* pending work list */
344 
345 	struct timer_list	otg_timer;
346 	struct notifier_block	nb;
347 
348 	struct dma_controller	*dma_controller;
349 
350 	struct device		*controller;
351 	void __iomem		*ctrl_base;
352 	void __iomem		*mregs;
353 
354 #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
355 	dma_addr_t		async;
356 	dma_addr_t		sync;
357 	void __iomem		*sync_va;
358 	u8			tusb_revision;
359 #endif
360 
361 	/* passed down from chip/board specific irq handlers */
362 	u8			int_usb;
363 	u16			int_rx;
364 	u16			int_tx;
365 
366 	struct usb_phy		*xceiv;
367 	struct phy		*phy;
368 
369 	int nIrq;
370 	unsigned		irq_wake:1;
371 
372 	struct musb_hw_ep	 endpoints[MUSB_C_NUM_EPS];
373 #define control_ep		endpoints
374 
375 #define VBUSERR_RETRY_COUNT	3
376 	u16			vbuserr_retry;
377 	u16 epmask;
378 	u8 nr_endpoints;
379 
380 	int			(*board_set_power)(int state);
381 
382 	u8			min_power;	/* vbus for periph, in mA/2 */
383 
384 	int			port_mode;	/* MUSB_PORT_MODE_* */
385 	bool			session;
386 	unsigned long		quirk_retries;
387 	bool			is_host;
388 
389 	int			a_wait_bcon;	/* VBUS timeout in msecs */
390 	unsigned long		idle_timeout;	/* Next timeout in jiffies */
391 
392 	unsigned		is_initialized:1;
393 	unsigned		is_runtime_suspended:1;
394 
395 	/* active means connected and not suspended */
396 	unsigned		is_active:1;
397 
398 	unsigned is_multipoint:1;
399 
400 	unsigned		hb_iso_rx:1;	/* high bandwidth iso rx? */
401 	unsigned		hb_iso_tx:1;	/* high bandwidth iso tx? */
402 	unsigned		dyn_fifo:1;	/* dynamic FIFO supported? */
403 
404 	unsigned		bulk_split:1;
405 #define	can_bulk_split(musb,type) \
406 	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
407 
408 	unsigned		bulk_combine:1;
409 #define	can_bulk_combine(musb,type) \
410 	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
411 
412 	/* is_suspended means USB B_PERIPHERAL suspend */
413 	unsigned		is_suspended:1;
414 
415 	/* may_wakeup means remote wakeup is enabled */
416 	unsigned		may_wakeup:1;
417 
418 	/* is_self_powered is reported in device status and the
419 	 * config descriptor.  is_bus_powered means B_PERIPHERAL
420 	 * draws some VBUS current; both can be true.
421 	 */
422 	unsigned		is_self_powered:1;
423 	unsigned		is_bus_powered:1;
424 
425 	unsigned		set_address:1;
426 	unsigned		test_mode:1;
427 	unsigned		softconnect:1;
428 
429 	u8			address;
430 	u8			test_mode_nr;
431 	u16			ackpend;		/* ep0 */
432 	enum musb_g_ep0_state	ep0_state;
433 	struct usb_gadget	g;			/* the gadget */
434 	struct usb_gadget_driver *gadget_driver;	/* its driver */
435 	struct usb_hcd		*hcd;			/* the usb hcd */
436 
437 	/*
438 	 * FIXME: Remove this flag.
439 	 *
440 	 * This is only added to allow Blackfin to work
441 	 * with current driver. For some unknown reason
442 	 * Blackfin doesn't work with double buffering
443 	 * and that's enabled by default.
444 	 *
445 	 * We added this flag to forcefully disable double
446 	 * buffering until we get it working.
447 	 */
448 	unsigned                double_buffer_not_ok:1;
449 
450 	const struct musb_hdrc_config *config;
451 
452 	int			xceiv_old_state;
453 #ifdef CONFIG_DEBUG_FS
454 	struct dentry		*debugfs_root;
455 #endif
456 };
457 
458 /* This must be included after struct musb is defined */
459 #include "musb_regs.h"
460 
461 static inline struct musb *gadget_to_musb(struct usb_gadget *g)
462 {
463 	return container_of(g, struct musb, g);
464 }
465 
466 #ifdef CONFIG_BLACKFIN
467 static inline int musb_read_fifosize(struct musb *musb,
468 		struct musb_hw_ep *hw_ep, u8 epnum)
469 {
470 	musb->nr_endpoints++;
471 	musb->epmask |= (1 << epnum);
472 
473 	if (epnum < 5) {
474 		hw_ep->max_packet_sz_tx = 128;
475 		hw_ep->max_packet_sz_rx = 128;
476 	} else {
477 		hw_ep->max_packet_sz_tx = 1024;
478 		hw_ep->max_packet_sz_rx = 1024;
479 	}
480 	hw_ep->is_shared_fifo = false;
481 
482 	return 0;
483 }
484 
485 static inline void musb_configure_ep0(struct musb *musb)
486 {
487 	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
488 	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
489 	musb->endpoints[0].is_shared_fifo = true;
490 }
491 
492 #else
493 
494 static inline int musb_read_fifosize(struct musb *musb,
495 		struct musb_hw_ep *hw_ep, u8 epnum)
496 {
497 	void __iomem *mbase = musb->mregs;
498 	u8 reg = 0;
499 
500 	/* read from core using indexed model */
501 	reg = musb_readb(mbase, musb->io.ep_offset(epnum, MUSB_FIFOSIZE));
502 	/* 0's returned when no more endpoints */
503 	if (!reg)
504 		return -ENODEV;
505 
506 	musb->nr_endpoints++;
507 	musb->epmask |= (1 << epnum);
508 
509 	hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
510 
511 	/* shared TX/RX FIFO? */
512 	if ((reg & 0xf0) == 0xf0) {
513 		hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
514 		hw_ep->is_shared_fifo = true;
515 		return 0;
516 	} else {
517 		hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
518 		hw_ep->is_shared_fifo = false;
519 	}
520 
521 	return 0;
522 }
523 
524 static inline void musb_configure_ep0(struct musb *musb)
525 {
526 	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
527 	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
528 	musb->endpoints[0].is_shared_fifo = true;
529 }
530 #endif /* CONFIG_BLACKFIN */
531 
532 
533 /***************************** Glue it together *****************************/
534 
535 extern const char musb_driver_name[];
536 
537 extern void musb_stop(struct musb *musb);
538 extern void musb_start(struct musb *musb);
539 
540 extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
541 extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
542 
543 extern void musb_load_testpacket(struct musb *);
544 
545 extern irqreturn_t musb_interrupt(struct musb *);
546 
547 extern void musb_hnp_stop(struct musb *musb);
548 
549 int musb_queue_resume_work(struct musb *musb,
550 			   int (*callback)(struct musb *musb, void *data),
551 			   void *data);
552 
553 static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
554 {
555 	if (musb->ops->set_vbus)
556 		musb->ops->set_vbus(musb, is_on);
557 }
558 
559 static inline void musb_platform_enable(struct musb *musb)
560 {
561 	if (musb->ops->enable)
562 		musb->ops->enable(musb);
563 }
564 
565 static inline void musb_platform_disable(struct musb *musb)
566 {
567 	if (musb->ops->disable)
568 		musb->ops->disable(musb);
569 }
570 
571 static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
572 {
573 	if (!musb->ops->set_mode)
574 		return 0;
575 
576 	return musb->ops->set_mode(musb, mode);
577 }
578 
579 static inline void musb_platform_try_idle(struct musb *musb,
580 		unsigned long timeout)
581 {
582 	if (musb->ops->try_idle)
583 		musb->ops->try_idle(musb, timeout);
584 }
585 
586 static inline int  musb_platform_recover(struct musb *musb)
587 {
588 	if (!musb->ops->recover)
589 		return 0;
590 
591 	return musb->ops->recover(musb);
592 }
593 
594 static inline int musb_platform_get_vbus_status(struct musb *musb)
595 {
596 	if (!musb->ops->vbus_status)
597 		return -EINVAL;
598 
599 	return musb->ops->vbus_status(musb);
600 }
601 
602 static inline int musb_platform_init(struct musb *musb)
603 {
604 	if (!musb->ops->init)
605 		return -EINVAL;
606 
607 	return musb->ops->init(musb);
608 }
609 
610 static inline int musb_platform_exit(struct musb *musb)
611 {
612 	if (!musb->ops->exit)
613 		return -EINVAL;
614 
615 	return musb->ops->exit(musb);
616 }
617 
618 static inline void musb_platform_pre_root_reset_end(struct musb *musb)
619 {
620 	if (musb->ops->pre_root_reset_end)
621 		musb->ops->pre_root_reset_end(musb);
622 }
623 
624 static inline void musb_platform_post_root_reset_end(struct musb *musb)
625 {
626 	if (musb->ops->post_root_reset_end)
627 		musb->ops->post_root_reset_end(musb);
628 }
629 
630 static inline void musb_platform_clear_ep_rxintr(struct musb *musb, int epnum)
631 {
632 	if (musb->ops->clear_ep_rxintr)
633 		musb->ops->clear_ep_rxintr(musb, epnum);
634 }
635 
636 /*
637  * gets the "dr_mode" property from DT and converts it into musb_mode
638  * if the property is not found or not recognized returns MUSB_OTG
639  */
640 extern enum musb_mode musb_get_mode(struct device *dev);
641 
642 #endif	/* __MUSB_CORE_H__ */
643